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-rw-r--r--drivers/usb_ohci.c13
-rw-r--r--drivers/usb_ohci.h13
2 files changed, 22 insertions, 4 deletions
diff --git a/drivers/usb_ohci.c b/drivers/usb_ohci.c
index 9b3ca1232d..be1a615ebe 100644
--- a/drivers/usb_ohci.c
+++ b/drivers/usb_ohci.c
@@ -45,6 +45,7 @@
#ifdef CONFIG_USB_OHCI
+/* mk: are these really required? */
#if defined(CONFIG_S3C2400)
# include <s3c2400.h>
#elif defined(CONFIG_S3C2410)
@@ -53,6 +54,8 @@
# include <asm/arch/hardware.h>
#elif defined(CONFIG_CPU_MONAHANS)
# include <asm/arch/pxa-regs.h>
+#elif defined(CONFIG_MPC5200)
+# include <mpc5xxx.h>
#endif
#include <malloc.h>
@@ -557,8 +560,10 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
* the link from the ed still points to another operational ed or 0
* so the HC can eventually finish the processing of the unlinked ed */
-static int ep_unlink (ohci_t *ohci, ed_t *ed)
+static int ep_unlink (ohci_t *ohci, ed_t *edi)
{
+ volatile ed_t *ed = edi;
+
ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
switch (ed->type) {
@@ -825,6 +830,9 @@ static td_t * dl_reverse_done_list (ohci_t *ohci)
} else
td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
}
+#ifdef CONFIG_MPC5200
+ td_list->hwNextTD = 0;
+#endif
}
td_list->next_dl_td = td_rev;
@@ -1448,7 +1456,8 @@ static int hc_reset (ohci_t *ohci)
readl(&ohci->regs->control));
/* Reset USB (needed by some controllers) */
- writel (0, &ohci->regs->control);
+ ohci->hc_control = 0;
+ writel (ohci->hc_control, &ohci->regs->control);
/* HC Reset requires max 10 us delay */
writel (OHCI_HCR, &ohci->regs->cmdstatus);
diff --git a/drivers/usb_ohci.h b/drivers/usb_ohci.h
index 68dd4ecafe..95fbc44654 100644
--- a/drivers/usb_ohci.h
+++ b/drivers/usb_ohci.h
@@ -113,7 +113,9 @@ struct td {
__u32 hwNextTD; /* Next TD Pointer */
__u32 hwBE; /* Memory Buffer End Pointer */
+/* #ifndef CONFIG_MPC5200 /\* this seems wrong *\/ */
__u16 hwPSW[MAXPSW];
+/* #endif */
__u8 unused;
__u8 index;
struct ed *ed;
@@ -137,8 +139,13 @@ typedef struct td td_t;
#define NUM_INTS 32 /* part of the OHCI standard */
struct ohci_hcca {
__u32 int_table[NUM_INTS]; /* Interrupt ED table */
+#if defined(CONFIG_MPC5200)
+ __u16 pad1; /* set to 0 on each frame_no change */
+ __u16 frame_no; /* current frame number */
+#else
__u16 frame_no; /* current frame number */
__u16 pad1; /* set to 0 on each frame_no change */
+#endif
__u32 done_head; /* info returned for an interrupt */
u8 reserved_for_hc[116];
} __attribute((aligned(256)));
@@ -147,7 +154,9 @@ struct ohci_hcca {
/*
* Maximum number of root hub ports.
*/
-#define MAX_ROOT_PORTS 3 /* maximum OHCI root hub ports */
+#ifndef CFG_USB_OHCI_MAX_ROOT_PORTS
+# error "CFG_USB_OHCI_MAX_ROOT_PORTS undefined!"
+#endif
/*
* This is the structure of the OHCI controller's memory mapped I/O
@@ -181,7 +190,7 @@ struct ohci_regs {
__u32 a;
__u32 b;
__u32 status;
- __u32 portstatus[MAX_ROOT_PORTS];
+ __u32 portstatus[CFG_USB_OHCI_MAX_ROOT_PORTS];
} roothub;
} __attribute((aligned(32)));
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