diff options
Diffstat (limited to 'drivers/serial/serial_lpuart.c')
| -rw-r--r-- | drivers/serial/serial_lpuart.c | 286 |
1 files changed, 246 insertions, 40 deletions
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index 63fc388b26..3f9c4d14ea 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <dm.h> #include <watchdog.h> #include <asm/io.h> #include <serial.h> @@ -12,15 +13,15 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> -#define US1_TDRE (1 << 7) -#define US1_RDRF (1 << 5) -#define US1_OR (1 << 3) -#define UC2_TE (1 << 3) -#define UC2_RE (1 << 2) -#define CFIFO_TXFLUSH (1 << 7) -#define CFIFO_RXFLUSH (1 << 6) -#define SFIFO_RXOF (1 << 2) -#define SFIFO_RXUF (1 << 0) +#define US1_TDRE (1 << 7) +#define US1_RDRF (1 << 5) +#define US1_OR (1 << 3) +#define UC2_TE (1 << 3) +#define UC2_RE (1 << 2) +#define CFIFO_TXFLUSH (1 << 7) +#define CFIFO_RXFLUSH (1 << 6) +#define SFIFO_RXOF (1 << 2) +#define SFIFO_RXUF (1 << 0) #define STAT_LBKDIF (1 << 31) #define STAT_RXEDGIF (1 << 30) @@ -34,7 +35,7 @@ #define STAT_MA1F (1 << 15) #define STAT_MA2F (1 << 14) #define STAT_FLAGS (STAT_LBKDIF | STAT_RXEDGIF | STAT_IDLE | STAT_OR | \ - STAT_NF | STAT_FE | STAT_PF | STAT_MA1F | STAT_MA2F) + STAT_NF | STAT_FE | STAT_PF | STAT_MA1F | STAT_MA2F) #define CTRL_TE (1 << 19) #define CTRL_RE (1 << 18) @@ -49,23 +50,24 @@ DECLARE_GLOBAL_DATA_PTR; struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE; +struct lpuart_serial_platdata { + struct lpuart_fsl *reg; +}; + #ifndef CONFIG_LPUART_32B_REG -static void lpuart_serial_setbrg(void) +static void _lpuart_serial_setbrg(struct lpuart_fsl *base, int baudrate) { u32 clk = mxc_get_clock(MXC_UART_CLK); u16 sbr; - if (!gd->baudrate) - gd->baudrate = CONFIG_BAUDRATE; + sbr = (u16)(clk / (16 * baudrate)); - sbr = (u16)(clk / (16 * gd->baudrate)); /* place adjustment later - n/32 BRFA */ - __raw_writeb(sbr >> 8, &base->ubdh); __raw_writeb(sbr & 0xff, &base->ubdl); } -static int lpuart_serial_getc(void) +static int _lpuart_serial_getc(struct lpuart_fsl *base) { while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR))) WATCHDOG_RESET(); @@ -75,10 +77,10 @@ static int lpuart_serial_getc(void) return __raw_readb(&base->ud); } -static void lpuart_serial_putc(const char c) +static void _lpuart_serial_putc(struct lpuart_fsl *base, const char c) { if (c == '\n') - serial_putc('\r'); + _lpuart_serial_putc(base, '\r'); while (!(__raw_readb(&base->us1) & US1_TDRE)) WATCHDOG_RESET(); @@ -86,10 +88,8 @@ static void lpuart_serial_putc(const char c) __raw_writeb(c, &base->ud); } -/* - * Test whether a character is in the RX buffer - */ -static int lpuart_serial_tstc(void) +/* Test whether a character is in the RX buffer */ +static int _lpuart_serial_tstc(struct lpuart_fsl *base) { if (__raw_readb(&base->urcfifo) == 0) return 0; @@ -101,7 +101,7 @@ static int lpuart_serial_tstc(void) * Initialise the serial port with the given baudrate. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. */ -static int lpuart_serial_init(void) +static int _lpuart_serial_init(struct lpuart_fsl *base) { u8 ctrl; @@ -120,14 +120,39 @@ static int lpuart_serial_init(void) __raw_writeb(CFIFO_TXFLUSH | CFIFO_RXFLUSH, &base->ucfifo); /* provide data bits, parity, stop bit, etc */ - - serial_setbrg(); + _lpuart_serial_setbrg(base, gd->baudrate); __raw_writeb(UC2_RE | UC2_TE, &base->uc2); return 0; } +#ifndef CONFIG_DM_SERIAL +static void lpuart_serial_setbrg(void) +{ + _lpuart_serial_setbrg(base, gd->baudrate); +} + +static int lpuart_serial_getc(void) +{ + return _lpuart_serial_getc(base); +} + +static void lpuart_serial_putc(const char c) +{ + _lpuart_serial_putc(base, c); +} + +static int lpuart_serial_tstc(void) +{ + return _lpuart_serial_tstc(base); +} + +static int lpuart_serial_init(void) +{ + return _lpuart_serial_init(base); +} + static struct serial_device lpuart_serial_drv = { .name = "lpuart_serial", .start = lpuart_serial_init, @@ -138,22 +163,67 @@ static struct serial_device lpuart_serial_drv = { .getc = lpuart_serial_getc, .tstc = lpuart_serial_tstc, }; +#else /* CONFIG_DM_SERIAL */ +static int lpuart_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + _lpuart_serial_setbrg(reg, baudrate); + + return 0; +} + +static int lpuart_serial_getc(struct udevice *dev) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + return _lpuart_serial_getc(reg); +} + +static int lpuart_serial_putc(struct udevice *dev, const char c) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + _lpuart_serial_putc(reg, c); + + return 0; +} + +static int lpuart_serial_pending(struct udevice *dev, bool input) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + if (input) + return _lpuart_serial_tstc(reg); + else + return __raw_readb(®->us1) & US1_TDRE ? 0 : 1; +} + +static int lpuart_serial_probe(struct udevice *dev) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + return _lpuart_serial_init(reg); +} +#endif /* CONFIG_DM_SERIAL */ #else -static void lpuart32_serial_setbrg(void) +static void _lpuart32_serial_setbrg(struct lpuart_fsl *base, int baudrate) { u32 clk = CONFIG_SYS_CLK_FREQ; u32 sbr; - if (!gd->baudrate) - gd->baudrate = CONFIG_BAUDRATE; + sbr = (clk / (16 * baudrate)); - sbr = (clk / (16 * gd->baudrate)); /* place adjustment later - n/32 BRFA */ - out_be32(&base->baud, sbr); } -static int lpuart32_serial_getc(void) +static int _lpuart32_serial_getc(struct lpuart_fsl *base) { u32 stat; @@ -165,10 +235,10 @@ static int lpuart32_serial_getc(void) return in_be32(&base->data) & 0x3ff; } -static void lpuart32_serial_putc(const char c) +static void _lpuart32_serial_putc(struct lpuart_fsl *base, const char c) { if (c == '\n') - serial_putc('\r'); + _lpuart32_serial_putc(base, '\r'); while (!(in_be32(&base->stat) & STAT_TDRE)) WATCHDOG_RESET(); @@ -176,10 +246,8 @@ static void lpuart32_serial_putc(const char c) out_be32(&base->data, c); } -/* - * Test whether a character is in the RX buffer - */ -static int lpuart32_serial_tstc(void) +/* Test whether a character is in the RX buffer */ +static int _lpuart32_serial_tstc(struct lpuart_fsl *base) { if ((in_be32(&base->water) >> 24) == 0) return 0; @@ -191,7 +259,7 @@ static int lpuart32_serial_tstc(void) * Initialise the serial port with the given baudrate. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. */ -static int lpuart32_serial_init(void) +static int _lpuart32_serial_init(struct lpuart_fsl *base) { u8 ctrl; @@ -204,15 +272,41 @@ static int lpuart32_serial_init(void) out_be32(&base->fifo, ~(FIFO_TXFE | FIFO_RXFE)); out_be32(&base->match, 0); - /* provide data bits, parity, stop bit, etc */ - serial_setbrg(); + /* provide data bits, parity, stop bit, etc */ + _lpuart32_serial_setbrg(base, gd->baudrate); out_be32(&base->ctrl, CTRL_RE | CTRL_TE); return 0; } +#ifndef CONFIG_DM_SERIAL +static void lpuart32_serial_setbrg(void) +{ + _lpuart32_serial_setbrg(base, gd->baudrate); +} + +static int lpuart32_serial_getc(void) +{ + return _lpuart32_serial_getc(base); +} + +static void lpuart32_serial_putc(const char c) +{ + _lpuart32_serial_putc(base, c); +} + +static int lpuart32_serial_tstc(void) +{ + return _lpuart32_serial_tstc(base); +} + +static int lpuart32_serial_init(void) +{ + return _lpuart32_serial_init(base); +} + static struct serial_device lpuart32_serial_drv = { .name = "lpuart32_serial", .start = lpuart32_serial_init, @@ -223,8 +317,57 @@ static struct serial_device lpuart32_serial_drv = { .getc = lpuart32_serial_getc, .tstc = lpuart32_serial_tstc, }; +#else /* CONFIG_DM_SERIAL */ +static int lpuart32_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + _lpuart32_serial_setbrg(reg, baudrate); + + return 0; +} + +static int lpuart32_serial_getc(struct udevice *dev) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + return _lpuart32_serial_getc(reg); +} + +static int lpuart32_serial_putc(struct udevice *dev, const char c) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + _lpuart32_serial_putc(reg, c); + + return 0; +} + +static int lpuart32_serial_pending(struct udevice *dev, bool input) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + if (input) + return _lpuart32_serial_tstc(reg); + else + return in_be32(®->stat) & STAT_TDRE ? 0 : 1; +} + +static int lpuart32_serial_probe(struct udevice *dev) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + struct lpuart_fsl *reg = plat->reg; + + return _lpuart32_serial_init(reg); +} +#endif /* CONFIG_DM_SERIAL */ #endif +#ifndef CONFIG_DM_SERIAL void lpuart_serial_initialize(void) { #ifdef CONFIG_LPUART_32B_REG @@ -242,3 +385,66 @@ __weak struct serial_device *default_serial_console(void) return &lpuart_serial_drv; #endif } +#else /* CONFIG_DM_SERIAL */ +static int lpuart_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct lpuart_serial_platdata *plat = dev->platdata; + fdt_addr_t addr; + + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + plat->reg = (struct lpuart_fsl *)addr; + + return 0; +} + +#ifndef CONFIG_LPUART_32B_REG +static const struct dm_serial_ops lpuart_serial_ops = { + .putc = lpuart_serial_putc, + .pending = lpuart_serial_pending, + .getc = lpuart_serial_getc, + .setbrg = lpuart_serial_setbrg, +}; + +static const struct udevice_id lpuart_serial_ids[] = { + { .compatible = "fsl,vf610-lpuart" }, + { } +}; + +U_BOOT_DRIVER(serial_lpuart) = { + .name = "serial_lpuart", + .id = UCLASS_SERIAL, + .of_match = lpuart_serial_ids, + .ofdata_to_platdata = lpuart_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct lpuart_serial_platdata), + .probe = lpuart_serial_probe, + .ops = &lpuart_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; +#else /* CONFIG_LPUART_32B_REG */ +static const struct dm_serial_ops lpuart32_serial_ops = { + .putc = lpuart32_serial_putc, + .pending = lpuart32_serial_pending, + .getc = lpuart32_serial_getc, + .setbrg = lpuart32_serial_setbrg, +}; + +static const struct udevice_id lpuart32_serial_ids[] = { + { .compatible = "fsl,ls1021a-lpuart" }, + { } +}; + +U_BOOT_DRIVER(serial_lpuart32) = { + .name = "serial_lpuart32", + .id = UCLASS_SERIAL, + .of_match = lpuart32_serial_ids, + .ofdata_to_platdata = lpuart_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct lpuart_serial_platdata), + .probe = lpuart32_serial_probe, + .ops = &lpuart32_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; +#endif /* CONFIG_LPUART_32B_REG */ +#endif /* CONFIG_DM_SERIAL */ |
