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-rw-r--r--drivers/i2c/mxs_i2c.c14
-rw-r--r--drivers/i2c/omap24xx_i2c.c66
-rw-r--r--drivers/i2c/tegra_i2c.c12
3 files changed, 47 insertions, 45 deletions
diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
index 48aaaa6268..2a193c220d 100644
--- a/drivers/i2c/mxs_i2c.c
+++ b/drivers/i2c/mxs_i2c.c
@@ -38,10 +38,10 @@
void mxs_i2c_reset(void)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
int ret;
- ret = mx28_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
+ ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
if (ret) {
debug("MXS I2C: Block reset timeout\n");
return;
@@ -57,7 +57,7 @@ void mxs_i2c_reset(void)
void mxs_i2c_setup_read(uint8_t chip, int len)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START |
I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
@@ -76,7 +76,7 @@ void mxs_i2c_setup_read(uint8_t chip, int len)
void mxs_i2c_write(uchar chip, uint addr, int alen,
uchar *buf, int blen, int stop)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
uint32_t data;
int i, remain, off;
@@ -119,7 +119,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen,
int mxs_i2c_wait_for_ack(void)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
uint32_t tmp;
int timeout = MXS_I2C_MAX_TIMEOUT;
@@ -157,7 +157,7 @@ err:
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
uint32_t tmp = 0;
int ret;
int i;
@@ -212,7 +212,7 @@ int i2c_probe(uchar chip)
void i2c_init(int speed, int slaveadd)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
mxs_i2c_reset();
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 81193b0e6e..094305fdf9 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -150,16 +150,19 @@ void i2c_init(int speed, int slaveadd)
bus_initialized[current_bus] = 1;
}
-static int i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value)
+static int i2c_read_byte(u8 devaddr, u16 regoffset, u8 alen, u8 *value)
{
int i2c_error = 0;
u16 status;
+ int i = 2 - alen;
+ u8 tmpbuf[2] = {(regoffset) >> 8, regoffset & 0xff};
+ u16 w;
/* wait until bus not busy */
wait_for_bb();
/* one byte only */
- writew(1, &i2c_base->cnt);
+ writew(alen, &i2c_base->cnt);
/* set slave address */
writew(devaddr, &i2c_base->sa);
/* no stop bit needed here */
@@ -174,8 +177,12 @@ static int i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value)
goto read_exit;
}
if (status & I2C_STAT_XRDY) {
- /* Important: have to use byte access */
- writeb(regoffset, &i2c_base->data);
+ w = tmpbuf[i++];
+#if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
+ defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX))
+ w |= tmpbuf[i++] << 8;
+#endif
+ writew(w, &i2c_base->data);
writew(I2C_STAT_XRDY, &i2c_base->stat);
}
if (status & I2C_STAT_ARDY) {
@@ -303,18 +310,18 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
int i;
- if (alen > 1) {
+ if (alen > 2) {
printf("I2C read: addr len %d not supported\n", alen);
return 1;
}
- if (addr + len > 256) {
+ if (addr + len > (1 << 16)) {
puts("I2C read: address out of range\n");
return 1;
}
for (i = 0; i < len; i++) {
- if (i2c_read_byte(chip, addr + i, &buffer[i])) {
+ if (i2c_read_byte(chip, addr + i, alen, &buffer[i])) {
puts("I2C read: I/O error\n");
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
return 1;
@@ -329,13 +336,15 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
int i;
u16 status;
int i2c_error = 0;
+ u16 w;
+ u8 tmpbuf[2] = {addr >> 8, addr & 0xff};
- if (alen > 1) {
+ if (alen > 2) {
printf("I2C write: addr len %d not supported\n", alen);
return 1;
}
- if (addr + len > 256) {
+ if (addr + len > (1 << 16)) {
printf("I2C write: address 0x%x + 0x%x out of range\n",
addr, len);
return 1;
@@ -353,28 +362,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
I2C_CON_STP, &i2c_base->con);
- /* Send address byte */
- status = wait_for_pin();
-
- if (status == 0 || status & I2C_STAT_NACK) {
- i2c_error = 1;
- printf("error waiting for i2c address ACK (status=0x%x)\n",
- status);
- goto write_exit;
- }
-
- if (status & I2C_STAT_XRDY) {
- writeb(addr & 0xFF, &i2c_base->data);
- writew(I2C_STAT_XRDY, &i2c_base->stat);
- } else {
- i2c_error = 1;
- printf("i2c bus not ready for transmit (status=0x%x)\n",
- status);
- goto write_exit;
- }
-
- /* address phase is over, now write data */
- for (i = 0; i < len; i++) {
+ /* Send address and data */
+ for (i = -alen; i < len; i++) {
status = wait_for_pin();
if (status == 0 || status & I2C_STAT_NACK) {
@@ -385,7 +374,12 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
}
if (status & I2C_STAT_XRDY) {
- writeb(buffer[i], &i2c_base->data);
+ w = (i < 0) ? tmpbuf[2+i] : buffer[i];
+#if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
+ defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX))
+ w |= ((++i < 0) ? tmpbuf[2+i] : buffer[i]) << 8;
+#endif
+ writew(w, &i2c_base->data);
writew(I2C_STAT_XRDY, &i2c_base->stat);
} else {
i2c_error = 1;
@@ -448,6 +442,14 @@ int i2c_set_bus_num(unsigned int bus)
return -1;
}
+#if I2C_BUS_MAX == 4
+ if (bus == 3)
+ i2c_base = (struct i2c *)I2C_BASE4;
+ else
+ if (bus == 2)
+ i2c_base = (struct i2c *)I2C_BASE3;
+ else
+#endif
#if I2C_BUS_MAX == 3
if (bus == 2)
i2c_base = (struct i2c *)I2C_BASE3;
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 5b6ea0e759..e3be14e3cf 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -262,7 +262,7 @@ exit:
return error;
}
-static int tegra2_i2c_write_data(u32 addr, u8 *data, u32 len)
+static int tegra_i2c_write_data(u32 addr, u8 *data, u32 len)
{
int error;
struct i2c_trans_info trans_info;
@@ -275,12 +275,12 @@ static int tegra2_i2c_write_data(u32 addr, u8 *data, u32 len)
error = send_recv_packets(&i2c_controllers[i2c_bus_num], &trans_info);
if (error)
- debug("tegra2_i2c_write_data: Error (%d) !!!\n", error);
+ debug("tegra_i2c_write_data: Error (%d) !!!\n", error);
return error;
}
-static int tegra2_i2c_read_data(u32 addr, u8 *data, u32 len)
+static int tegra_i2c_read_data(u32 addr, u8 *data, u32 len)
{
int error;
struct i2c_trans_info trans_info;
@@ -293,7 +293,7 @@ static int tegra2_i2c_read_data(u32 addr, u8 *data, u32 len)
error = send_recv_packets(&i2c_controllers[i2c_bus_num], &trans_info);
if (error)
- debug("tegra2_i2c_read_data: Error (%d) !!!\n", error);
+ debug("tegra_i2c_read_data: Error (%d) !!!\n", error);
return error;
}
@@ -438,7 +438,7 @@ int i2c_write_data(uchar chip, uchar *buffer, int len)
debug("\n");
/* Shift 7-bit address over for lower-level i2c functions */
- rc = tegra2_i2c_write_data(chip << 1, buffer, len);
+ rc = tegra_i2c_write_data(chip << 1, buffer, len);
if (rc)
debug("i2c_write_data(): rc=%d\n", rc);
@@ -452,7 +452,7 @@ int i2c_read_data(uchar chip, uchar *buffer, int len)
debug("inside i2c_read_data():\n");
/* Shift 7-bit address over for lower-level i2c functions */
- rc = tegra2_i2c_read_data(chip << 1, buffer, len);
+ rc = tegra_i2c_read_data(chip << 1, buffer, len);
if (rc) {
debug("i2c_read_data(): rc=%d\n", rc);
return rc;
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