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Diffstat (limited to 'doc')
-rw-r--r-- | doc/README.Heterogeneous-SoCs | 105 | ||||
-rw-r--r-- | doc/README.esbc_validate | 41 | ||||
-rw-r--r-- | doc/README.gpt | 8 | ||||
-rw-r--r-- | doc/README.scrapyard | 22 | ||||
-rw-r--r-- | doc/git-mailrc | 2 |
5 files changed, 167 insertions, 11 deletions
diff --git a/doc/README.Heterogeneous-SoCs b/doc/README.Heterogeneous-SoCs new file mode 100644 index 0000000000..9da652e459 --- /dev/null +++ b/doc/README.Heterogeneous-SoCs @@ -0,0 +1,105 @@ +DSP side awareness for Freescale heterogeneous multicore chips based on +StarCore and Power Architecture +=============================================================== +powerpc/mpc85xx code ve APIs and function to get the number, +configuration and frequencies of all PowerPC cores and devices +connected to them, but it didnt have the similar code ofr HEterogeneous +SC3900/DSP cores and such devices like CPRI, MAPLE, MAPLE-ULB etc. + +Code for DSP side awareness provides such functionality for Freescale +Heterogeneous SoCs which are chasis-2 compliant like B4860 and B4420 + +As part of this feature, following changes have been made: +========================================================== + +1. Changed files: +================= +- arch/powerpc/cpu/mpc85xx/cpu.c + +Code added in this file to print the DSP cores and other device's(CPRI, +MAPLE etc) frequencies + +- arch/powerpc/cpu/mpc85xx/speed.c + +Added Defines and code to extract the frequncy information for all +required cores and devices from RCW and System frequency + +- arch/powerpc/cpu/mpc8xxx/cpu.c + +Added API to get the number of SC cores in running system and Their BIT +MASK, similar to the code written for PowerPC + +- arch/powerpc/include/asm/config_mpc85xx.h + +Added top level CONFIG to identify presence of HETEROGENUOUS clusters +in the system and CONFIGS for SC3900/DSP components + +- arch/powerpc/include/asm/processor.h +- include/common.h + +Added newly added Functions Declaration + +- include/e500.h + +Global structure updated for dsp cores and other components + +2. CONFIGs ADDED +================ + +CONFIG_HETROGENOUS_CLUSTERS - Define for checking the presence of + DSP/SC3900 core clusters + +CONFIG_SYS_FSL_NUM_CC_PLLS - Define for number of PLLs + +Though there are only 4 PLLs in B4, but in sequence of PLLs from PLL1 - +PLL5, PLL3 is Reserved(as mentioned in RM), so this define contains the +value as 5 not 4, to iterate over all PLLs while coding + +CONFIG_SYS_MAPLE - Define for MAPLE Baseband Accelerator +CONFIG_SYS_CPRI - Define for CPRI Interface +CONFIG_PPC_CLUSTER_START - Start index of ppc clusters +CONFIG_DSP_CLUSTER_START - Start index of dsp clusters + +Following are the defines for PLL's index that provide the Clocking to +CPRI, ULB and ETVE components + +CONFIG_SYS_CPRI_CLK - Define PLL index for CPRI clock +CONFIG_SYS_ULB_CLK - Define PLL index for ULB clock +CONFIG_SYS_ETVPE_CLK - Define PLL index for ETVPE clock + +3. Changes in MPC85xx_SYS_INFO Global structure +=============================================== + +DSP cores and other device's components have been added in this structure. + +freq_processor_dsp[CONFIG_MAX_DSP_CPUS] - Array to contain the DSP core's frequencies +freq_cpri - To store CPRI frequency +freq_maple - To store MAPLE frequency +freq_maple_ulb - To store MAPLE-ULB frequency +freq_maple_etvpe - To store MAPLE-eTVPE frequency + +4. U-BOOT LOGS +============== +4.1 B4860QDS board + Boot from NOR flash + +U-Boot 2014.07-00222-g70587a8-dirty (Aug 07 2014 - 13:15:47) + +CPU0: B4860E, Version: 2.0, (0x86880020) +Core: e6500, Version: 2.0, (0x80400020) Clock Configuration: + CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz, + DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz, + DSP CPU4:1200 MHz, DSP CPU5:1200 MHz, + CCB:666.667 MHz, + DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz + CPRI:600 MHz + MAPLE:600 MHz, MAPLE-ULB:800 MHz, MAPLE-eTVPE:1000 MHz + FMAN1: 666.667 MHz + QMAN: 333.333 MHz + +CPUn - PowerPC core +DSP CPUn - SC3900 core + +Shaveta Leekha(shaveta@freescale.com) +Created August 7, 2014 +=========================================== diff --git a/doc/README.esbc_validate b/doc/README.esbc_validate new file mode 100644 index 0000000000..941b60724d --- /dev/null +++ b/doc/README.esbc_validate @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2015 + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +esbc_validate command +======================================== + +1. esbc_validate command is meant for validating header and + signature of images (Boot Script and ESBC uboot client). + SHA-256 and RSA operations are performed using SEC block in HW. + This command works on both PBL based and Non PBL based Freescale + platforms. + Command usage: + esbc_validate img_hdr_addr [pub_key_hash] + esbc_validate hdr_addr <hash_val> + Validates signature using RSA verification. + $hdr_addr Address of header of the image to be validated. + $hash_val -Optional. It provides Hash of public/srk key to be + used to verify signature. + +2. ESBC uboot client can be linux. Additionally, rootfs and device + tree blob can also be signed. +3. In the event of header or signature failure in validation, + ITS and ITF bits determine further course of action. +4. In case of soft failure, appropriate error is dumped on console. +5. In case of hard failure, SoC is issued RESET REQUEST after + dumping error on the console. +6. KEY REVOCATION Feature: + QorIQ platforms like B4/T4 have support of srk key table and key + revocation in ISBC code in Silicon. + The srk key table allows the user to have a key table with multiple + keys and revoke any key in case of particular key gets compromised. + In case the ISBC code uses the key revocation and srk key table to + verify the u-boot code, the subsequent chain of trust should also + use the same. +6. ISBC KEY EXTENSION Feature: + This feature allows large number of keys to be used for esbc validation + of images. A set of public keys is being signed and validated by ISBC + which can be further used for esbc validation of images. diff --git a/doc/README.gpt b/doc/README.gpt index ec0156d8aa..59fdeebfe8 100644 --- a/doc/README.gpt +++ b/doc/README.gpt @@ -157,11 +157,13 @@ To restore GUID partition table one needs to: "partitions=uuid_disk=${uuid_gpt_disk};name=${uboot_name}, size=${uboot_size},uuid=${uboot_uuid};" - Fields 'name', 'size' and 'uuid' are mandatory for every partition. + The fields 'name' and 'size' are mandatory for every partition. The field 'start' is optional. - option: CONFIG_RANDOM_UUID - If any partition "UUID" no exists then it is randomly generated. + The fields 'uuid' and 'uuid_disk' are optional if CONFIG_RANDOM_UUID is + enabled. A random uuid will be used if omitted or they point to an empty/ + non-existent environment variable. The environment variable will be set to + the generated UUID. 2. Define 'CONFIG_EFI_PARTITION' and 'CONFIG_CMD_GPT' diff --git a/doc/README.scrapyard b/doc/README.scrapyard index cd8f4aeaf3..59d2142db5 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,13 +12,21 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= -hawkboard arm arm926ejs - - Syed Mohammed Khasim <sm.khasim@gmail.com>:Sughosh Ganu <urwithsughosh@gmail.com> -tnetv107x arm arm1176 - - Chan-Taek Park <c-park@ti.com> -a320evb arm arm920t - - Po-Yu Chuang <ratbert@faraday-tech.com> -cm4008 arm arm920t - - Greg Ungerer <greg.ungerer@opengear.com> -cm41xx arm arm920t - - -dkb arm arm926ejs - - Lei Wen <leiwen@marvell.com> -jadecpu arm arm926ejs - - Matthias Weisser <weisserm@arcor.de> +korat powerpc ppc4xx - - Larry Johnson <lrj@acm.org> +galaxy5200 powerpc mpc5xxx - - Eric Millbrandt <emillbrandt@dekaresearch.com> +W7OLMC powerpc ppc4xx - - Erik Theisen <etheisen@mindspring.com> +W7OLMG powerpc ppc4xx - - Erik Theisen <etheisen@mindspring.com> +aev powerpc mpc5xxx - - +TB5200 powerpc mpc5xxx - - +JSE powerpc ppc4xx - - Stephen Williams <steve@icarus.com> +BC3450 powerpc mpc5xxx - - +hawkboard arm arm926ejs cb957cda 2015-02-24 Syed Mohammed Khasim <sm.khasim@gmail.com>:Sughosh Ganu <urwithsughosh@gmail.com> +tnetv107x arm arm1176 50b82c4b 2015-02-24 Chan-Taek Park <c-park@ti.com> +a320evb arm arm920t 29fc6f24 2015-02-24 Po-Yu Chuang <ratbert@faraday-tech.com> +cm4008 arm arm920t a2f39e83 2015-02-24 Greg Ungerer <greg.ungerer@opengear.com> +cm41xx arm arm920t a2f39e83 2015-02-24 +dkb arm arm926ejs 346cfba4 2015-02-24 Lei Wen <leiwen@marvell.com> +jadecpu arm arm926ejs 41fbbbbc 2015-02-24 Matthias Weisser <weisserm@arcor.de> icecube_5200 powerpc mpc5xxx 37b608a5 2015-01-23 Wolfgang Denk <wd@denx.de> Lite5200 powerpc mpc5xxx 37b608a5 2015-01-23 cpci5200 powerpc mpc5xxx 37b608a5 2015-01-23 Reinhard Arlt <reinhard.arlt@esd-electronics.com> diff --git a/doc/git-mailrc b/doc/git-mailrc index 025c0b3cac..5f8438e891 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -31,7 +31,7 @@ alias luka Luka Perkov <luka.perkov@sartura.hr> alias lukma Lukasz Majewski <l.majewski@samsung.com> alias macpaul Macpaul Lin <macpaul@andestech.com> alias marex Marek Vasut <marex@denx.de> -alias masahiro Masahiro Yamada <yamada.m@jp.panasonic.com> +alias masahiro Masahiro Yamada <yamada.masahiro@socionext.com> alias monstr Michal Simek <monstr@monstr.eu> alias panto Pantelis Antoniou <panto@antoniou-consulting.com> alias prafulla Prafulla Wadaskar <prafulla@marvell.com> |