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Diffstat (limited to 'doc/README.fsl-ddr')
| -rw-r--r-- | doc/README.fsl-ddr | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/doc/README.fsl-ddr b/doc/README.fsl-ddr index 6e4f6e9244..8c37bbead1 100644 --- a/doc/README.fsl-ddr +++ b/doc/README.fsl-ddr @@ -27,6 +27,9 @@ Table of interleaving modes supported in cpu/8xxx/ddr/ from each controller. {CS2+CS3} on each controller are only rank interleaved on that controller. + For memory controller interleaving, identical DIMMs are suggested. Software + doesn't check the size or organization of interleaved DIMMs. + The ways to configure the ddr interleaving mode ============================================== 1. In board header file(e.g.MPC8572DS.h), add default interleaving setting |
