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-rw-r--r--cpu/arm1136/cpu.c2
-rw-r--r--cpu/arm1136/interrupts.c13
-rw-r--r--cpu/arm1136/start.S11
-rw-r--r--cpu/arm720t/cpu.c7
-rw-r--r--cpu/arm720t/interrupts.c10
-rw-r--r--cpu/arm720t/serial_netarm.c14
-rw-r--r--cpu/arm720t/start.S9
-rw-r--r--cpu/arm920t/at91rm9200/ether.c22
-rw-r--r--cpu/arm920t/start.S2
-rw-r--r--cpu/arm925t/start.S2
-rw-r--r--cpu/arm926ejs/start.S2
-rw-r--r--cpu/arm946es/start.S2
-rw-r--r--cpu/ppc4xx/speed.c7
13 files changed, 78 insertions, 25 deletions
diff --git a/cpu/arm1136/cpu.c b/cpu/arm1136/cpu.c
index 7fa5ddcac6..85a48491b3 100644
--- a/cpu/arm1136/cpu.c
+++ b/cpu/arm1136/cpu.c
@@ -33,7 +33,9 @@
#include <common.h>
#include <command.h>
+#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
#include <asm/arch/omap2420.h>
+#endif
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
diff --git a/cpu/arm1136/interrupts.c b/cpu/arm1136/interrupts.c
index 23236dcb0f..1dc36d0344 100644
--- a/cpu/arm1136/interrupts.c
+++ b/cpu/arm1136/interrupts.c
@@ -32,7 +32,11 @@
#include <common.h>
#include <asm/arch/bits.h>
-#include <asm/arch/omap2420.h>
+
+#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
+# include <asm/arch/omap2420.h>
+#endif
+
#include <asm/proc-armv/ptrace.h>
#define TIMER_LOAD_VAL 0
@@ -172,6 +176,10 @@ void do_irq (struct pt_regs *pt_regs)
bad_mode ();
}
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR)
+/* Use the IntegratorCP function from board/integratorcp.c */
+#else
+
static ulong timestamp;
static ulong lastinc;
@@ -189,7 +197,6 @@ int interrupt_init (void)
return(0);
}
-
/*
* timer without interrupts
*/
@@ -281,7 +288,6 @@ unsigned long long get_ticks(void)
{
return get_timer(0);
}
-
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
@@ -292,3 +298,4 @@ ulong get_tbclk (void)
tbclk = CFG_HZ;
return tbclk;
}
+#endif /* !Integrator/CP */
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index c3bf6e37e1..17c7a83491 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -30,8 +30,9 @@
#include <config.h>
#include <version.h>
+#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
#include <asm/arch/omap2420.h>
-
+#endif
.globl _start
_start: b reset
ldr pc, _undefined_instruction
@@ -210,7 +211,7 @@ cpu_init_crit:
* basic memory. Go here to bump up clock rate and handle wake up conditions.
*/
mov ip, lr /* persevere link reg across call */
- bl platformsetup /* go setup pll,mux,memory */
+ bl lowlevel_init /* go setup pll,mux,memory */
mov lr, ip /* restore link */
mov pc, lr /* back to my caller */
/*
@@ -397,6 +398,10 @@ arm1136_cache_flush:
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
mov pc, lr @ back to caller
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR)
+/* Use the IntegratorCP function from board/integratorcp/platform.S */
+#else
+
.align 5
.globl reset_cpu
reset_cpu:
@@ -408,3 +413,5 @@ _loop_forever:
b _loop_forever
rstctl:
.word PM_RSTCTRL_WKUP
+
+#endif
diff --git a/cpu/arm720t/cpu.c b/cpu/arm720t/cpu.c
index fcca360732..a5b6de7605 100644
--- a/cpu/arm720t/cpu.c
+++ b/cpu/arm720t/cpu.c
@@ -76,6 +76,8 @@ int cleanup_before_linux (void)
#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B)
disable_interrupts ();
/* Nothing more needed */
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No cleanup before linux for IntegratorAP/CM720T as yet */
#else
#error No cleanup_before_linux() defined for this CPU type
#endif
@@ -245,6 +247,11 @@ int dcache_status (void)
return icache_status();
}
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No specific cache setup for IntegratorAP/CM720T as yet */
+ void icache_enable (void)
+ {
+ }
#else
#error No icache/dcache enable/disable functions defined for this CPU type
#endif
diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c
index d0eaca5e02..da62502d61 100644
--- a/cpu/arm720t/interrupts.c
+++ b/cpu/arm720t/interrupts.c
@@ -193,6 +193,8 @@ void do_irq (struct pt_regs *pt_regs)
/* clear pending interrupt */
PUT_REG( REG_INTPEND, (1<<(pending>>2)));
}
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No do_irq() for IntegratorAP/CM720T as yet */
#else
#error do_irq() not defined for this CPU type
#endif
@@ -216,6 +218,10 @@ static void timer_isr( void *data) {
}
#endif
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* Use IntegratorAP routines in board/integratorap.c */
+#else
+
static ulong timestamp;
static ulong lastdec;
@@ -296,6 +302,8 @@ int interrupt_init (void)
return (0);
}
+#endif /* ! IntegratorAP */
+
/*
* timer without interrupts
*/
@@ -398,6 +406,8 @@ void udelay (unsigned long usec)
}
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No timer routines for IntegratorAP/CM720T as yet */
#else
#error Timer routines not defined for this CPU type
#endif
diff --git a/cpu/arm720t/serial_netarm.c b/cpu/arm720t/serial_netarm.c
index 5b41949e0a..5ad98f06fd 100644
--- a/cpu/arm720t/serial_netarm.c
+++ b/cpu/arm720t/serial_netarm.c
@@ -35,7 +35,11 @@
#include <asm/hardware.h>
#define PORTA (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTA))
+#if !defined(CONFIG_NETARM_NS7520)
#define PORTB (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTB))
+#else
+#define PORTC (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTC))
+#endif
/* wait until transmitter is ready for another character */
#define TXWAITRDY(registers) \
@@ -48,8 +52,13 @@
}
+#ifndef CONFIG_UART1_CONSOLE
volatile netarm_serial_channel_t *serial_reg_ch1 = get_serial_channel(0);
volatile netarm_serial_channel_t *serial_reg_ch2 = get_serial_channel(1);
+#else
+volatile netarm_serial_channel_t *serial_reg_ch1 = get_serial_channel(1);
+volatile netarm_serial_channel_t *serial_reg_ch2 = get_serial_channel(0);
+#endif
extern void _netarm_led_FAIL1(void);
@@ -62,8 +71,13 @@ void serial_setbrg (void)
DECLARE_GLOBAL_DATA_PTR;
/* set 0 ... make sure pins are configured for serial */
+#if !defined(CONFIG_NETARM_NS7520)
PORTA = PORTB =
NETARM_GEN_PORT_MODE (0xef) | NETARM_GEN_PORT_DIR (0xe0);
+#else
+ PORTA = NETARM_GEN_PORT_MODE (0xef) | NETARM_GEN_PORT_DIR (0xe0);
+ PORTC = NETARM_GEN_PORT_CSF (0xef) | NETARM_GEN_PORT_MODE (0xef) | NETARM_GEN_PORT_DIR (0xe0);
+#endif
/* first turn em off */
serial_reg_ch1->ctrl_a = serial_reg_ch2->ctrl_a = 0;
diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S
index eb26476a66..e66d109443 100644
--- a/cpu/arm720t/start.S
+++ b/cpu/arm720t/start.S
@@ -272,12 +272,15 @@ cpu_init_crit:
str r1, [r0, #+NETARM_GEN_SYSTEM_CONTROL]
+#ifndef CONFIG_NETARM_PLL_BYPASS
ldr r1, =( NETARM_GEN_PLL_CTL_PLLCNT(NETARM_PLL_COUNT_VAL) | \
NETARM_GEN_PLL_CTL_POLTST_DEF | \
NETARM_GEN_PLL_CTL_INDIV(1) | \
NETARM_GEN_PLL_CTL_ICP_DEF | \
NETARM_GEN_PLL_CTL_OUTDIV(2) )
str r1, [r0, #+NETARM_GEN_PLL_CONTROL]
+#endif
+
/*
* mask all IRQs by clearing all bits in the INTMRs
*/
@@ -301,6 +304,8 @@ cpu_init_crit:
ldr r1, =0x83ffffa0 /* cache-disabled */
str r1, [r0]
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No specific initialisation for IntegratorAP/CM720T as yet */
#else
#error No cpu_init_crit() defined for current CPU type
#endif
@@ -316,12 +321,12 @@ cpu_init_crit:
str r1, [r0]
#endif
+ mov ip, lr
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependent, you will
* find a lowlevel_init.S in your board directory.
*/
- mov ip, lr
bl lowlevel_init
mov lr, ip
@@ -530,6 +535,8 @@ reset_cpu:
#elif defined(CONFIG_S3C4510B)
/* Nothing done here as reseting the CPU is board specific, depending
* on external peripherals such as watchdog timers, etc. */
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No specific reset actions for IntegratorAP/CM720T as yet */
#else
#error No reset_cpu() defined for current CPU type
#endif
diff --git a/cpu/arm920t/at91rm9200/ether.c b/cpu/arm920t/at91rm9200/ether.c
index bff95b6eac..ca5b7d198c 100644
--- a/cpu/arm920t/at91rm9200/ether.c
+++ b/cpu/arm920t/at91rm9200/ether.c
@@ -44,21 +44,19 @@ typedef struct {
#define RBF_LOCAL2 (1<<24)
#define RBF_LOCAL1 (1<<23)
-/* Emac Buffers in last 512KBytes of SDRAM*/
-/* Be careful, buffer size is limited to 512KBytes !!! */
-#define RBF_FRAMEMAX 100
-/*#define RBF_FRAMEMEM 0x200000 */
-#define RBF_FRAMEMEM 0x21F80000
+#define RBF_FRAMEMAX 64
#define RBF_FRAMELEN 0x600
-#define RBF_FRAMEBTD RBF_FRAMEMEM
-#define RBF_FRAMEBUF (RBF_FRAMEMEM + RBF_FRAMEMAX*sizeof(rbf_t))
-
-
#ifdef CONFIG_DRIVER_ETHER
#if (CONFIG_COMMANDS & CFG_CMD_NET)
+/* alignment as per Errata #11 (64 bytes) is insufficient! */
+rbf_t rbfdt[RBF_FRAMEMAX] __attribute((aligned(512)));
+rbf_t *rbfp;
+
+unsigned char rbf_framebuf[RBF_FRAMEMAX][RBF_FRAMELEN] __attribute((aligned(4)));
+
/* structure to interface the PHY */
AT91S_PhyOps PhyOps;
@@ -153,9 +151,6 @@ UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac,
}
-rbf_t *rbfdt;
-rbf_t *rbfp;
-
int eth_init (bd_t * bd)
{
int ret;
@@ -188,9 +183,8 @@ int eth_init (bd_t * bd)
p_mac->EMAC_CFG |= AT91C_EMAC_CSR; /* Clear statistics */
/* Init Ehternet buffers */
- rbfdt = (rbf_t *) RBF_FRAMEBTD;
for (i = 0; i < RBF_FRAMEMAX; i++) {
- rbfdt[i].addr = RBF_FRAMEBUF + RBF_FRAMELEN * i;
+ rbfdt[i].addr = (unsigned long)rbf_framebuf[i];
rbfdt[i].size = 0;
}
rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 74a97d5290..4603cf5733 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -255,7 +255,6 @@ cpu_init_crit:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
-
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
@@ -264,7 +263,6 @@ cpu_init_crit:
mov ip, lr
bl lowlevel_init
mov lr, ip
-
mov pc, lr
diff --git a/cpu/arm925t/start.S b/cpu/arm925t/start.S
index 238925936e..acd77426d3 100644
--- a/cpu/arm925t/start.S
+++ b/cpu/arm925t/start.S
@@ -246,7 +246,7 @@ cpu_init_crit:
* Go setup Memory and board specific bits prior to relocation.
*/
mov ip, lr /* perserve link reg across call */
- bl platformsetup /* go setup pll,mux,memory */
+ bl lowlevel_init /* go setup pll,mux,memory */
mov lr, ip /* restore link */
mov pc, lr /* back to my caller */
/*
diff --git a/cpu/arm926ejs/start.S b/cpu/arm926ejs/start.S
index 5f5a1c5969..fc6b20b21e 100644
--- a/cpu/arm926ejs/start.S
+++ b/cpu/arm926ejs/start.S
@@ -222,7 +222,7 @@ cpu_init_crit:
* Go setup Memory and board specific bits prior to relocation.
*/
mov ip, lr /* perserve link reg across call */
- bl platformsetup /* go setup pll,mux,memory */
+ bl lowlevel_init /* go setup pll,mux,memory */
mov lr, ip /* restore link */
mov pc, lr /* back to my caller */
/*
diff --git a/cpu/arm946es/start.S b/cpu/arm946es/start.S
index ef3be8ec93..e8c908bf28 100644
--- a/cpu/arm946es/start.S
+++ b/cpu/arm946es/start.S
@@ -214,7 +214,7 @@ cpu_init_crit:
* Go setup Memory and board specific bits prior to relocation.
*/
mov ip, lr /* perserve link reg across call */
- bl platformsetup /* go setup memory */
+ bl lowlevel_init /* go setup memory */
mov lr, ip /* restore link */
mov pc, lr /* back to my caller */
/*
diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c
index 469f97d6f0..cbd7b24555 100644
--- a/cpu/ppc4xx/speed.c
+++ b/cpu/ppc4xx/speed.c
@@ -381,6 +381,13 @@ ulong get_OPB_freq (void)
extern void get_sys_info (sys_info_t * sysInfo);
extern ulong get_PCI_freq (void);
+#elif defined(CONFIG_AP1000)
+void get_sys_info (sys_info_t * sysInfo) {
+ sysInfo->freqProcessor = 240 * 1000 * 1000;
+ sysInfo->freqPLB = 80 * 1000 * 1000;
+ sysInfo->freqPCI = 33 * 1000 * 1000;
+}
+
#elif defined(CONFIG_405)
void get_sys_info (sys_info_t * sysInfo) {
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