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Diffstat (limited to 'cpu/mpc86xx/cpu_init.c')
-rw-r--r--cpu/mpc86xx/cpu_init.c92
1 files changed, 46 insertions, 46 deletions
diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c
index 1fda3fe805..4ab88f0b0a 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/cpu/mpc86xx/cpu_init.c
@@ -43,11 +43,11 @@ DECLARE_GLOBAL_DATA_PTR;
void cpu_init_f(void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_lbc_t *memctl = &immap->im_lbc;
/* Pointer is writable since we allocated a register for it */
- gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
+ gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
/* Clear initial global data */
memset ((void *) gd, 0, sizeof (gd_t));
@@ -61,52 +61,52 @@ void cpu_init_f(void)
* has been determined
*/
-#if defined(CFG_OR0_REMAP)
- memctl->or0 = CFG_OR0_REMAP;
+#if defined(CONFIG_SYS_OR0_REMAP)
+ memctl->or0 = CONFIG_SYS_OR0_REMAP;
#endif
-#if defined(CFG_OR1_REMAP)
- memctl->or1 = CFG_OR1_REMAP;
+#if defined(CONFIG_SYS_OR1_REMAP)
+ memctl->or1 = CONFIG_SYS_OR1_REMAP;
#endif
/* now restrict to preliminary range */
-#if defined(CFG_BR0_PRELIM) && defined(CFG_OR0_PRELIM)
- memctl->br0 = CFG_BR0_PRELIM;
- memctl->or0 = CFG_OR0_PRELIM;
+#if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM)
+ memctl->br0 = CONFIG_SYS_BR0_PRELIM;
+ memctl->or0 = CONFIG_SYS_OR0_PRELIM;
#endif
-#if defined(CFG_BR1_PRELIM) && defined(CFG_OR1_PRELIM)
- memctl->or1 = CFG_OR1_PRELIM;
- memctl->br1 = CFG_BR1_PRELIM;
+#if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM)
+ memctl->or1 = CONFIG_SYS_OR1_PRELIM;
+ memctl->br1 = CONFIG_SYS_BR1_PRELIM;
#endif
-#if defined(CFG_BR2_PRELIM) && defined(CFG_OR2_PRELIM)
- memctl->or2 = CFG_OR2_PRELIM;
- memctl->br2 = CFG_BR2_PRELIM;
+#if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
+ memctl->or2 = CONFIG_SYS_OR2_PRELIM;
+ memctl->br2 = CONFIG_SYS_BR2_PRELIM;
#endif
-#if defined(CFG_BR3_PRELIM) && defined(CFG_OR3_PRELIM)
- memctl->or3 = CFG_OR3_PRELIM;
- memctl->br3 = CFG_BR3_PRELIM;
+#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
+ memctl->or3 = CONFIG_SYS_OR3_PRELIM;
+ memctl->br3 = CONFIG_SYS_BR3_PRELIM;
#endif
-#if defined(CFG_BR4_PRELIM) && defined(CFG_OR4_PRELIM)
- memctl->or4 = CFG_OR4_PRELIM;
- memctl->br4 = CFG_BR4_PRELIM;
+#if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM)
+ memctl->or4 = CONFIG_SYS_OR4_PRELIM;
+ memctl->br4 = CONFIG_SYS_BR4_PRELIM;
#endif
-#if defined(CFG_BR5_PRELIM) && defined(CFG_OR5_PRELIM)
- memctl->or5 = CFG_OR5_PRELIM;
- memctl->br5 = CFG_BR5_PRELIM;
+#if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM)
+ memctl->or5 = CONFIG_SYS_OR5_PRELIM;
+ memctl->br5 = CONFIG_SYS_BR5_PRELIM;
#endif
-#if defined(CFG_BR6_PRELIM) && defined(CFG_OR6_PRELIM)
- memctl->or6 = CFG_OR6_PRELIM;
- memctl->br6 = CFG_BR6_PRELIM;
+#if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM)
+ memctl->or6 = CONFIG_SYS_OR6_PRELIM;
+ memctl->br6 = CONFIG_SYS_BR6_PRELIM;
#endif
-#if defined(CFG_BR7_PRELIM) && defined(CFG_OR7_PRELIM)
- memctl->or7 = CFG_OR7_PRELIM;
- memctl->br7 = CFG_BR7_PRELIM;
+#if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM)
+ memctl->or7 = CONFIG_SYS_OR7_PRELIM;
+ memctl->br7 = CONFIG_SYS_BR7_PRELIM;
#endif
/* enable the timebase bit in HID0 */
@@ -127,22 +127,22 @@ int cpu_init_r(void)
/* Set up BAT registers */
void setup_bats(void)
{
- write_bat(DBAT0, CFG_DBAT0U, CFG_DBAT0L);
- write_bat(IBAT0, CFG_IBAT0U, CFG_IBAT0L);
- write_bat(DBAT1, CFG_DBAT1U, CFG_DBAT1L);
- write_bat(IBAT1, CFG_IBAT1U, CFG_IBAT1L);
- write_bat(DBAT2, CFG_DBAT2U, CFG_DBAT2L);
- write_bat(IBAT2, CFG_IBAT2U, CFG_IBAT2L);
- write_bat(DBAT3, CFG_DBAT3U, CFG_DBAT3L);
- write_bat(IBAT3, CFG_IBAT3U, CFG_IBAT3L);
- write_bat(DBAT4, CFG_DBAT4U, CFG_DBAT4L);
- write_bat(IBAT4, CFG_IBAT4U, CFG_IBAT4L);
- write_bat(DBAT5, CFG_DBAT5U, CFG_DBAT5L);
- write_bat(IBAT5, CFG_IBAT5U, CFG_IBAT5L);
- write_bat(DBAT6, CFG_DBAT6U, CFG_DBAT6L);
- write_bat(IBAT6, CFG_IBAT6U, CFG_IBAT6L);
- write_bat(DBAT7, CFG_DBAT7U, CFG_DBAT7L);
- write_bat(IBAT7, CFG_IBAT7U, CFG_IBAT7L);
+ write_bat(DBAT0, CONFIG_SYS_DBAT0U, CONFIG_SYS_DBAT0L);
+ write_bat(IBAT0, CONFIG_SYS_IBAT0U, CONFIG_SYS_IBAT0L);
+ write_bat(DBAT1, CONFIG_SYS_DBAT1U, CONFIG_SYS_DBAT1L);
+ write_bat(IBAT1, CONFIG_SYS_IBAT1U, CONFIG_SYS_IBAT1L);
+ write_bat(DBAT2, CONFIG_SYS_DBAT2U, CONFIG_SYS_DBAT2L);
+ write_bat(IBAT2, CONFIG_SYS_IBAT2U, CONFIG_SYS_IBAT2L);
+ write_bat(DBAT3, CONFIG_SYS_DBAT3U, CONFIG_SYS_DBAT3L);
+ write_bat(IBAT3, CONFIG_SYS_IBAT3U, CONFIG_SYS_IBAT3L);
+ write_bat(DBAT4, CONFIG_SYS_DBAT4U, CONFIG_SYS_DBAT4L);
+ write_bat(IBAT4, CONFIG_SYS_IBAT4U, CONFIG_SYS_IBAT4L);
+ write_bat(DBAT5, CONFIG_SYS_DBAT5U, CONFIG_SYS_DBAT5L);
+ write_bat(IBAT5, CONFIG_SYS_IBAT5U, CONFIG_SYS_IBAT5L);
+ write_bat(DBAT6, CONFIG_SYS_DBAT6U, CONFIG_SYS_DBAT6L);
+ write_bat(IBAT6, CONFIG_SYS_IBAT6U, CONFIG_SYS_IBAT6L);
+ write_bat(DBAT7, CONFIG_SYS_DBAT7U, CONFIG_SYS_DBAT7L);
+ write_bat(IBAT7, CONFIG_SYS_IBAT7U, CONFIG_SYS_IBAT7L);
return;
}
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