summaryrefslogtreecommitdiffstats
path: root/board
diff options
context:
space:
mode:
Diffstat (limited to 'board')
-rw-r--r--board/atmel/sama5d2_ptc/Kconfig15
-rw-r--r--board/atmel/sama5d2_ptc/MAINTAINERS7
-rw-r--r--board/atmel/sama5d2_ptc/Makefile8
-rw-r--r--board/atmel/sama5d2_ptc/sama5d2_ptc.c285
-rw-r--r--board/atmel/sama5d2_xplained/sama5d2_xplained.c5
-rw-r--r--board/cm5200/fwupdate.c2
-rw-r--r--board/compulab/common/eeprom.c344
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/.gitignore3
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/Makefile1
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl13
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/dsdt.asl14
-rw-r--r--board/imgtec/malta/lowlevel_init.S1
-rw-r--r--board/intel/bayleybay/.gitignore3
-rw-r--r--board/intel/bayleybay/Makefile1
-rw-r--r--board/intel/bayleybay/acpi/mainboard.asl11
-rw-r--r--board/intel/bayleybay/dsdt.asl14
-rw-r--r--board/intel/galileo/Kconfig11
-rw-r--r--board/intel/minnowmax/.gitignore3
-rw-r--r--board/intel/minnowmax/Makefile1
-rw-r--r--board/intel/minnowmax/acpi/mainboard.asl11
-rw-r--r--board/intel/minnowmax/dsdt.asl14
-rw-r--r--board/keymile/km83xx/km83xx_i2c.c28
-rw-r--r--board/mpl/pip405/README6
-rw-r--r--board/qca/ap121/Kconfig12
-rw-r--r--board/qca/ap121/MAINTAINERS6
-rw-r--r--board/qca/ap121/Makefile5
-rw-r--r--board/qca/ap121/ap121.c50
-rw-r--r--board/qca/ap143/Kconfig12
-rw-r--r--board/qca/ap143/MAINTAINERS6
-rw-r--r--board/qca/ap143/Makefile5
-rw-r--r--board/qca/ap143/ap143.c66
-rw-r--r--board/sandbox/MAINTAINERS7
-rw-r--r--board/tplink/wdr4300/Kconfig15
-rw-r--r--board/tplink/wdr4300/MAINTAINERS6
-rw-r--r--board/tplink/wdr4300/Makefile5
-rw-r--r--board/tplink/wdr4300/wdr4300.c74
-rw-r--r--board/xilinx/zynq/Makefile12
-rw-r--r--board/xilinx/zynq/custom_hw_platform/.gitignore1
-rw-r--r--board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c (renamed from board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h (renamed from board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c (renamed from board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h (renamed from board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c (renamed from board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h (renamed from board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynq/zynq-zed/ps7_init_gpl.c (renamed from board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-zed/ps7_init_gpl.h (renamed from board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c (renamed from board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h (renamed from board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynqmp/Makefile23
-rw-r--r--board/xilinx/zynqmp/xil_io.h35
-rw-r--r--board/xilinx/zynqmp/zynqmp.c17
51 files changed, 1125 insertions, 33 deletions
diff --git a/board/atmel/sama5d2_ptc/Kconfig b/board/atmel/sama5d2_ptc/Kconfig
new file mode 100644
index 0000000000..d2661c689a
--- /dev/null
+++ b/board/atmel/sama5d2_ptc/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_SAMA5D2_PTC
+
+config SYS_BOARD
+ default "sama5d2_ptc"
+
+config SYS_VENDOR
+ default "atmel"
+
+config SYS_SOC
+ default "at91"
+
+config SYS_CONFIG_NAME
+ default "sama5d2_ptc"
+
+endif
diff --git a/board/atmel/sama5d2_ptc/MAINTAINERS b/board/atmel/sama5d2_ptc/MAINTAINERS
new file mode 100644
index 0000000000..7ab03d6eaf
--- /dev/null
+++ b/board/atmel/sama5d2_ptc/MAINTAINERS
@@ -0,0 +1,7 @@
+SAMA5D2 PTC Engineering BOARD
+M: Wenyou Yang <wenyou.yang@atmel.com>
+S: Maintained
+F: board/atmel/sama5d2_ptc/
+F: include/configs/sama5d2_ptc.h
+F: configs/sama5d2_ptc_spiflash_defconfig
+F: configs/sama5d2_ptc_nandflash_defconfig
diff --git a/board/atmel/sama5d2_ptc/Makefile b/board/atmel/sama5d2_ptc/Makefile
new file mode 100644
index 0000000000..1fe0392da0
--- /dev/null
+++ b/board/atmel/sama5d2_ptc/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2016 Atmel
+# Wenyou Yang <wenyou.yang@atmel.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += sama5d2_ptc.o
diff --git a/board/atmel/sama5d2_ptc/sama5d2_ptc.c b/board/atmel/sama5d2_ptc/sama5d2_ptc.c
new file mode 100644
index 0000000000..9e6544bc07
--- /dev/null
+++ b/board/atmel/sama5d2_ptc/sama5d2_ptc.c
@@ -0,0 +1,285 @@
+/*
+ * Copyright (C) 2016 Atmel
+ * Wenyou.Yang <wenyou.yang@atmel.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <atmel_hlcdc.h>
+#include <lcd.h>
+#include <mmc.h>
+#include <net.h>
+#include <netdev.h>
+#include <spi.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/atmel_pio4.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/atmel_usba_udc.h>
+#include <asm/arch/atmel_sdhci.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/sama5_sfr.h>
+#include <asm/arch/sama5d2.h>
+#include <asm/arch/sama5d3_smc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 1);
+}
+
+static void board_spi0_hw_init(void)
+{
+ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 14, 0);
+ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 15, 0);
+ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 16, 0);
+
+ atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 1);
+
+ at91_periph_clk_enable(ATMEL_ID_SPI0);
+}
+
+static void board_nand_hw_init(void)
+{
+ struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+ struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
+
+ at91_periph_clk_enable(ATMEL_ID_HSMC);
+
+ writel(AT91_SFR_EBICFG_DRIVE0_HIGH |
+ AT91_SFR_EBICFG_PULL0_NONE |
+ AT91_SFR_EBICFG_DRIVE1_HIGH |
+ AT91_SFR_EBICFG_PULL1_NONE, &sfr->ebicfg);
+
+ /* Configure SMC CS3 for NAND */
+ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
+ AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
+ &smc->cs[3].setup);
+ writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) |
+ AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3),
+ &smc->cs[3].pulse);
+ writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+ &smc->cs[3].cycle);
+ writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) |
+ AT91_SMC_TIMINGS_TAR(2) | AT91_SMC_TIMINGS_TRR(3) |
+ AT91_SMC_TIMINGS_TWB(7) | AT91_SMC_TIMINGS_RBNSEL(3) |
+ AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
+ AT91_SMC_MODE_DBW_8 |
+ AT91_SMC_MODE_TDF_CYCLE(3),
+ &smc->cs[3].mode);
+
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 0, 0); /* D0 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 1, 0); /* D1 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 2, 0); /* D2 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 3, 0); /* D3 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 4, 0); /* D4 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 5, 0); /* D5 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 6, 0); /* D6 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 7, 0); /* D7 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 12, 0); /* RE */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 8, 0); /* WE */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 9, 1); /* NCS */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 21, 1); /* RDY */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 10, 1); /* ALE */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 11, 1); /* CLE */
+}
+
+static void board_usb_hw_init(void)
+{
+ atmel_pio4_set_pio_output(AT91_PIO_PORTA, 28, 1);
+}
+
+static void board_gmac_hw_init(void)
+{
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 14, 0); /* GTXCK */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 15, 0); /* GTXEN */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 16, 0); /* GRXDV */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 17, 0); /* GRXER */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 18, 0); /* GRX0 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 19, 0); /* GRX1 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 20, 0); /* GTX0 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 21, 0); /* GTX1 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 22, 0); /* GMDC */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 23, 0); /* GMDIO */
+
+ at91_periph_clk_enable(ATMEL_ID_GMAC);
+}
+
+static void board_uart0_hw_init(void)
+{
+ atmel_pio4_set_c_periph(AT91_PIO_PORTB, 26, 1); /* URXD0 */
+ atmel_pio4_set_c_periph(AT91_PIO_PORTB, 27, 0); /* UTXD0 */
+
+ at91_periph_clk_enable(CONFIG_USART_ID);
+}
+
+int board_early_init_f(void)
+{
+ at91_periph_clk_enable(ATMEL_ID_PIOA);
+ at91_periph_clk_enable(ATMEL_ID_PIOB);
+ at91_periph_clk_enable(ATMEL_ID_PIOC);
+ at91_periph_clk_enable(ATMEL_ID_PIOD);
+
+ board_uart0_hw_init();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_ATMEL_SPI
+ board_spi0_hw_init();
+#endif
+#ifdef CONFIG_NAND_ATMEL
+ board_nand_hw_init();
+#endif
+#ifdef CONFIG_MACB
+ board_gmac_hw_init();
+#endif
+#ifdef CONFIG_CMD_USB
+ board_usb_hw_init();
+#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+ at91_udp_hw_init();
+#endif
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+
+#ifdef CONFIG_MACB
+ rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
+ if (rc)
+ printf("GMAC register failed\n");
+#endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+ usba_udc_probe(&pdata);
+#ifdef CONFIG_USB_ETH_RNDIS
+ usb_eth_initialize(bis);
+#endif
+#endif
+
+ return rc;
+}
+
+/* SPL */
+#ifdef CONFIG_SPL_BUILD
+void spl_board_init(void)
+{
+#ifdef CONFIG_SYS_USE_SERIALFLASH
+ board_spi0_hw_init();
+#endif
+
+#ifdef CONFIG_SYS_USE_NANDFLASH
+ board_nand_hw_init();
+#endif
+}
+
+static void ddrc_conf(struct atmel_mpddrc_config *ddrc)
+{
+ ddrc->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR3_SDRAM);
+
+ ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+ ATMEL_MPDDRC_CR_NR_ROW_14 |
+ ATMEL_MPDDRC_CR_CAS_DDR_CAS5 |
+ ATMEL_MPDDRC_CR_DIC_DS |
+ ATMEL_MPDDRC_CR_DIS_DLL |
+ ATMEL_MPDDRC_CR_NB_8BANKS |
+ ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
+ ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
+
+ ddrc->rtr = 0x511;
+
+ ddrc->tpr0 = ((6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET) |
+ (3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) |
+ (9 << ATMEL_MPDDRC_TPR0_TRC_OFFSET) |
+ (3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET));
+
+ ddrc->tpr1 = ((27 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) |
+ (29 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET) |
+ (0 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET) |
+ (3 << ATMEL_MPDDRC_TPR1_TXP_OFFSET));
+
+ ddrc->tpr2 = ((0 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET) |
+ (0 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET) |
+ (0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET) |
+ (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
+}
+
+void mem_init(void)
+{
+ struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
+ struct atmel_mpddrc_config ddrc_config;
+ u32 reg;
+
+ ddrc_conf(&ddrc_config);
+
+ at91_periph_clk_enable(ATMEL_ID_MPDDRC);
+ at91_system_clk_enable(AT91_PMC_DDR);
+
+ reg = readl(&mpddrc->io_calibr);
+ reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;
+ reg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;
+ reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;
+ reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(100);
+ writel(reg, &mpddrc->io_calibr);
+
+ writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_TWO_CYCLE,
+ &mpddrc->rd_data_path);
+
+ ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);
+
+ writel(0x3, &mpddrc->cal_mr4);
+ writel(64, &mpddrc->tim_cal);
+}
+
+void at91_pmc_init(void)
+{
+ at91_plla_init(AT91_PMC_PLLAR_29 |
+ AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
+ AT91_PMC_PLLXR_MUL(82) |
+ AT91_PMC_PLLXR_DIV(1));
+
+ at91_pllicpr_init(0);
+
+ at91_mck_init(AT91_PMC_MCKR_H32MXDIV |
+ AT91_PMC_MCKR_PLLADIV_2 |
+ AT91_PMC_MCKR_MDIV_3 |
+ AT91_PMC_MCKR_CSS_PLLA);
+}
+#endif
diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 10edf28a9b..93df7ba32a 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -171,10 +171,11 @@ static void board_sdhci0_hw_init(void)
atmel_pio4_set_a_periph(AT91_PIO_PORTA, 9, 0); /* SDMMC0_DAT7 */
atmel_pio4_set_a_periph(AT91_PIO_PORTA, 10, 0); /* SDMMC0_RSTN */
atmel_pio4_set_a_periph(AT91_PIO_PORTA, 11, 0); /* SDMMC0_VDDSEL */
+ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 13, 0); /* SDMMC0_CD */
at91_periph_clk_enable(ATMEL_ID_SDMMC0);
at91_enable_periph_generated_clk(ATMEL_ID_SDMMC0,
- GCK_CSS_PLLA_CLK, 1);
+ GCK_CSS_UPLL_CLK, 1);
}
static void board_sdhci1_hw_init(void)
@@ -190,7 +191,7 @@ static void board_sdhci1_hw_init(void)
at91_periph_clk_enable(ATMEL_ID_SDMMC1);
at91_enable_periph_generated_clk(ATMEL_ID_SDMMC1,
- GCK_CSS_PLLA_CLK, 1);
+ GCK_CSS_UPLL_CLK, 1);
}
int board_mmc_init(bd_t *bis)
diff --git a/board/cm5200/fwupdate.c b/board/cm5200/fwupdate.c
index 2ed90de9d5..4740c8394c 100644
--- a/board/cm5200/fwupdate.c
+++ b/board/cm5200/fwupdate.c
@@ -105,7 +105,7 @@ static int load_rescue_image(ulong addr)
/* Detect storage device */
for (devno = 0; devno < USB_MAX_STOR_DEV; devno++) {
- stor_dev = usb_stor_get_dev(devno);
+ stor_dev = blk_get_devnum_by_type(IF_TYPE_USB, devno);
if (stor_dev->type != DEV_TYPE_UNKNOWN)
break;
}
diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c
index 630446820c..b5f1aa61cb 100644
--- a/board/compulab/common/eeprom.c
+++ b/board/compulab/common/eeprom.c
@@ -9,6 +9,9 @@
#include <common.h>
#include <i2c.h>
+#include <eeprom_layout.h>
+#include <eeprom_field.h>
+#include <linux/kernel.h>
#include "eeprom.h"
#ifndef CONFIG_SYS_I2C_EEPROM_ADDR
@@ -181,3 +184,344 @@ int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus)
return err;
}
+
+#ifdef CONFIG_CMD_EEPROM_LAYOUT
+/**
+ * eeprom_field_print_bin_ver() - print a "version field" which contains binary
+ * data
+ *
+ * Treat the field data as simple binary data, and print it formatted as a
+ * version number (2 digits after decimal point).
+ * The field size must be exactly 2 bytes.
+ *
+ * Sample output:
+ * Field Name 123.45
+ *
+ * @field: an initialized field to print
+ */
+void eeprom_field_print_bin_ver(const struct eeprom_field *field)
+{
+ if ((field->buf[0] == 0xff) && (field->buf[1] == 0xff)) {
+ field->buf[0] = 0;
+ field->buf[1] = 0;
+ }
+
+ printf(PRINT_FIELD_SEGMENT, field->name);
+ int major = (field->buf[1] << 8 | field->buf[0]) / 100;
+ int minor = (field->buf[1] << 8 | field->buf[0]) - major * 100;
+ printf("%d.%02d\n", major, minor);
+}
+
+/**
+ * eeprom_field_update_bin_ver() - update a "version field" which contains
+ * binary data
+ *
+ * This function takes a version string in the form of x.y (x and y are both
+ * decimal values, y is limited to two digits), translates it to the binary
+ * form, then writes it to the field. The field size must be exactly 2 bytes.
+ *
+ * This function strictly enforces the data syntax, and will not update the
+ * field if there's any deviation from it. It also protects from overflow.
+ *
+ * @field: an initialized field
+ * @value: a version string
+ *
+ * Returns 0 on success, -1 on failure.
+ */
+int eeprom_field_update_bin_ver(struct eeprom_field *field, char *value)
+{
+ char *endptr;
+ char *tok = strtok(value, ".");
+ if (tok == NULL)
+ return -1;
+
+ int num = simple_strtol(tok, &endptr, 0);
+ if (*endptr != '\0')
+ return -1;
+
+ tok = strtok(NULL, "");
+ if (tok == NULL)
+ return -1;
+
+ int remainder = simple_strtol(tok, &endptr, 0);
+ if (*endptr != '\0')
+ return -1;
+
+ num = num * 100 + remainder;
+ if (num >> 16)
+ return -1;
+
+ field->buf[0] = (unsigned char)num;
+ field->buf[1] = num >> 8;
+
+ return 0;
+}
+
+char *months[12] = {"Jan", "Feb", "Mar", "Apr", "May", "Jun",
+ "Jul", "Aug", "Sep", "Oct", "Nov", "Dec"};
+
+/**
+ * eeprom_field_print_date() - print a field which contains date data
+ *
+ * Treat the field data as simple binary data, and print it formatted as a date.
+ * Sample output:
+ * Field Name 07/Feb/2014
+ * Field Name 56/BAD/9999
+ *
+ * @field: an initialized field to print
+ */
+void eeprom_field_print_date(const struct eeprom_field *field)
+{
+ printf(PRINT_FIELD_SEGMENT, field->name);
+ printf("%02d/", field->buf[0]);
+ if (field->buf[1] >= 1 && field->buf[1] <= 12)
+ printf("%s", months[field->buf[1] - 1]);
+ else
+ printf("BAD");
+
+ printf("/%d\n", field->buf[3] << 8 | field->buf[2]);
+}
+
+static int validate_date(unsigned char day, unsigned char month,
+ unsigned int year)
+{
+ int days_in_february;
+
+ switch (month) {
+ case 0:
+ case 2:
+ case 4:
+ case 6:
+ case 7:
+ case 9:
+ case 11:
+ if (day > 31)
+ return -1;
+ break;
+ case 3:
+ case 5:
+ case 8:
+ case 10:
+ if (day > 30)
+ return -1;
+ break;
+ case 1:
+ days_in_february = 28;
+ if (year % 4 == 0) {
+ if (year % 100 != 0)
+ days_in_february = 29;
+ else if (year % 400 == 0)
+ days_in_february = 29;
+ }
+
+ if (day > days_in_february)
+ return -1;
+
+ break;
+ default:
+ return -1;
+ }
+
+ return 0;
+}
+
+/**
+ * eeprom_field_update_date() - update a date field which contains binary data
+ *
+ * This function takes a date string in the form of x/Mon/y (x and y are both
+ * decimal values), translates it to the binary representation, then writes it
+ * to the field.
+ *
+ * This function strictly enforces the data syntax, and will not update the
+ * field if there's any deviation from it. It also protects from overflow in the
+ * year value, and checks the validity of the date.
+ *
+ * @field: an initialized field
+ * @value: a date string
+ *
+ * Returns 0 on success, -1 on failure.
+ */
+int eeprom_field_update_date(struct eeprom_field *field, char *value)
+{
+ char *endptr;
+ char *tok1 = strtok(value, "/");
+ char *tok2 = strtok(NULL, "/");
+ char *tok3 = strtok(NULL, "/");
+
+ if (tok1 == NULL || tok2 == NULL || tok3 == NULL) {
+ printf("%s: syntax error\n", field->name);
+ return -1;
+ }
+
+ unsigned char day = (unsigned char)simple_strtol(tok1, &endptr, 0);
+ if (*endptr != '\0' || day == 0) {
+ printf("%s: invalid day\n", field->name);
+ return -1;
+ }
+
+ unsigned char month;
+ for (month = 1; month <= 12; month++)
+ if (!strcmp(tok2, months[month - 1]))
+ break;
+
+ unsigned int year = simple_strtol(tok3, &endptr, 0);
+ if (*endptr != '\0') {
+ printf("%s: invalid year\n", field->name);
+ return -1;
+ }
+
+ if (validate_date(day, month - 1, year)) {
+ printf("%s: invalid date\n", field->name);
+ return -1;
+ }
+
+ if (year >> 16) {
+ printf("%s: year overflow\n", field->name);
+ return -1;
+ }
+
+ field->buf[0] = day;
+ field->buf[1] = month;
+ field->buf[2] = (unsigned char)year;
+ field->buf[3] = (unsigned char)(year >> 8);
+
+ return 0;
+}
+
+#define LAYOUT_VERSION_LEGACY 1
+#define LAYOUT_VERSION_VER1 2
+#define LAYOUT_VERSION_VER2 3
+#define LAYOUT_VERSION_VER3 4
+
+extern struct eeprom_field layout_unknown[1];
+
+#define DEFINE_PRINT_UPDATE(x) eeprom_field_print_##x, eeprom_field_update_##x
+
+#ifdef CONFIG_CM_T3X
+struct eeprom_field layout_legacy[5] = {
+ { "MAC address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "Board Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin) },
+ { "Serial Number", 8, NULL, DEFINE_PRINT_UPDATE(bin) },
+ { "Board Configuration", 64, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { RESERVED_FIELDS, 176, NULL, eeprom_field_print_reserved,
+ eeprom_field_update_ascii },
+};
+#else
+#define layout_legacy layout_unknown
+#endif
+
+#if defined(CONFIG_CM_T3X) || defined(CONFIG_CM_T3517)
+struct eeprom_field layout_v1[12] = {
+ { "Major Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
+ { "Minor Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
+ { "1st MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "2nd MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "Production Date", 4, NULL, DEFINE_PRINT_UPDATE(date) },
+ { "Serial Number", 12, NULL, DEFINE_PRINT_UPDATE(bin_rev) },
+ { RESERVED_FIELDS, 96, NULL, DEFINE_PRINT_UPDATE(reserved) },
+ { "Product Name", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #1", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #2", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #3", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { RESERVED_FIELDS, 64, NULL, eeprom_field_print_reserved,
+ eeprom_field_update_ascii },
+};
+#else
+#define layout_v1 layout_unknown
+#endif
+
+struct eeprom_field layout_v2[15] = {
+ { "Major Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
+ { "Minor Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
+ { "1st MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "2nd MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "Production Date", 4, NULL, DEFINE_PRINT_UPDATE(date) },
+ { "Serial Number", 12, NULL, DEFINE_PRINT_UPDATE(bin_rev) },
+ { "3rd MAC Address (WIFI)", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "4th MAC Address (Bluetooth)", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "Layout Version", 1, NULL, DEFINE_PRINT_UPDATE(bin) },
+ { RESERVED_FIELDS, 83, NULL, DEFINE_PRINT_UPDATE(reserved) },
+ { "Product Name", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #1", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #2", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #3", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { RESERVED_FIELDS, 64, NULL, eeprom_field_print_reserved,
+ eeprom_field_update_ascii },
+};
+
+struct eeprom_field layout_v3[16] = {
+ { "Major Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
+ { "Minor Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
+ { "1st MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "2nd MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "Production Date", 4, NULL, DEFINE_PRINT_UPDATE(date) },
+ { "Serial Number", 12, NULL, DEFINE_PRINT_UPDATE(bin_rev) },
+ { "3rd MAC Address (WIFI)", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "4th MAC Address (Bluetooth)", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
+ { "Layout Version", 1, NULL, DEFINE_PRINT_UPDATE(bin) },
+ { "CompuLab EEPROM ID", 3, NULL, DEFINE_PRINT_UPDATE(bin) },
+ { RESERVED_FIELDS, 80, NULL, DEFINE_PRINT_UPDATE(reserved) },
+ { "Product Name", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #1", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #2", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { "Product Options #3", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
+ { RESERVED_FIELDS, 64, NULL, eeprom_field_print_reserved,
+ eeprom_field_update_ascii },
+};
+
+void eeprom_layout_assign(struct eeprom_layout *layout, int layout_version)
+{
+ switch (layout->layout_version) {
+ case LAYOUT_VERSION_LEGACY:
+ layout->fields = layout_legacy;
+ layout->num_of_fields = ARRAY_SIZE(layout_legacy);
+ break;
+ case LAYOUT_VERSION_VER1:
+ layout->fields = layout_v1;
+ layout->num_of_fields = ARRAY_SIZE(layout_v1);
+ break;
+ case LAYOUT_VERSION_VER2:
+ layout->fields = layout_v2;
+ layout->num_of_fields = ARRAY_SIZE(layout_v2);
+ break;
+ case LAYOUT_VERSION_VER3:
+ layout->fields = layout_v3;
+ layout->num_of_fields = ARRAY_SIZE(layout_v3);
+ break;
+ default:
+ __eeprom_layout_assign(layout, layout_version);
+ }
+}
+
+int eeprom_parse_layout_version(char *str)
+{
+ if (!strcmp(str, "legacy"))
+ return LAYOUT_VERSION_LEGACY;
+ else if (!strcmp(str, "v1"))
+ return LAYOUT_VERSION_VER1;
+ else if (!strcmp(str, "v2"))
+ return LAYOUT_VERSION_VER2;
+ else if (!strcmp(str, "v3"))
+ return LAYOUT_VERSION_VER3;
+ else
+ return LAYOUT_VERSION_UNRECOGNIZED;
+}
+
+int eeprom_layout_detect(unsigned char *data)
+{
+ switch (data[EEPROM_LAYOUT_VER_OFFSET]) {
+ case 0xff:
+ case 0:
+ return LAYOUT_VERSION_VER1;
+ case 2:
+ return LAYOUT_VERSION_VER2;
+ case 3:
+ return LAYOUT_VERSION_VER3;
+ }
+
+ if (data[EEPROM_LAYOUT_VER_OFFSET] >= 0x20)
+ return LAYOUT_VERSION_LEGACY;
+
+ return LAYOUT_VERSION_UNRECOGNIZED;
+}
+#endif
diff --git a/board/congatec/conga-qeval20-qa3-e3845/.gitignore b/board/congatec/conga-qeval20-qa3-e3845/.gitignore
new file mode 100644
index 0000000000..6eb8a5481a
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/congatec/conga-qeval20-qa3-e3845/Makefile b/board/congatec/conga-qeval20-qa3-e3845/Makefile
index 23b8748c69..b784510f39 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/Makefile
+++ b/board/congatec/conga-qeval20-qa3-e3845/Makefile
@@ -5,3 +5,4 @@
#
obj-y += conga-qeval20-qa3.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl b/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
new file mode 100644
index 0000000000..eace459ae0
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
+
+/* TODO: Need add Winbond SuperIO chipset W83627 ASL codes */
diff --git a/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl b/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
new file mode 100644
index 0000000000..6042011acf
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/board/imgtec/malta/lowlevel_init.S b/board/imgtec/malta/lowlevel_init.S
index ae09c27d07..534db1d832 100644
--- a/board/imgtec/malta/lowlevel_init.S
+++ b/board/imgtec/malta/lowlevel_init.S
@@ -24,7 +24,6 @@
.text
.set noreorder
- .set mips32
.globl lowlevel_init
lowlevel_init:
diff --git a/board/intel/bayleybay/.gitignore b/board/intel/bayleybay/.gitignore
new file mode 100644
index 0000000000..6eb8a5481a
--- /dev/null
+++ b/board/intel/bayleybay/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/intel/bayleybay/Makefile b/board/intel/bayleybay/Makefile
index 88b5aad634..52dda7ddab 100644
--- a/board/intel/bayleybay/Makefile
+++ b/board/intel/bayleybay/Makefile
@@ -5,3 +5,4 @@
#
obj-y += bayleybay.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/bayleybay/acpi/mainboard.asl b/board/intel/bayleybay/acpi/mainboard.asl
new file mode 100644
index 0000000000..21785ea73b
--- /dev/null
+++ b/board/intel/bayleybay/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/intel/bayleybay/dsdt.asl b/board/intel/bayleybay/dsdt.asl
new file mode 100644
index 0000000000..6042011acf
--- /dev/null
+++ b/board/intel/bayleybay/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/board/intel/galileo/Kconfig b/board/intel/galileo/Kconfig
index 6515bacd76..87a0ec4ccc 100644
--- a/board/intel/galileo/Kconfig
+++ b/board/intel/galileo/Kconfig
@@ -21,4 +21,15 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select INTEL_QUARK
select BOARD_ROMSIZE_KB_1024
+config SMBIOS_PRODUCT_NAME
+ default "GalileoGen2"
+ help
+ Override the default product name U-Boot reports in the SMBIOS
+ table, to be compatible with the Intel provided UEFI BIOS, as
+ Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
+ drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
+ it to do different board level configuration.
+
+ This can be "Galileo" for GEN1 Galileo board.
+
endif
diff --git a/board/intel/minnowmax/.gitignore b/board/intel/minnowmax/.gitignore
new file mode 100644
index 0000000000..6eb8a5481a
--- /dev/null
+++ b/board/intel/minnowmax/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/intel/minnowmax/Makefile b/board/intel/minnowmax/Makefile
index 1a614324a2..73e5a8fd02 100644
--- a/board/intel/minnowmax/Makefile
+++ b/board/intel/minnowmax/Makefile
@@ -5,3 +5,4 @@
#
obj-y += minnowmax.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/minnowmax/acpi/mainboard.asl b/board/intel/minnowmax/acpi/mainboard.asl
new file mode 100644
index 0000000000..21785ea73b
--- /dev/null
+++ b/board/intel/minnowmax/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/intel/minnowmax/dsdt.asl b/board/intel/minnowmax/dsdt.asl
new file mode 100644
index 0000000000..6042011acf
--- /dev/null
+++ b/board/intel/minnowmax/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/board/keymile/km83xx/km83xx_i2c.c b/board/keymile/km83xx/km83xx_i2c.c
index c961937530..f0b528d1c8 100644
--- a/board/keymile/km83xx/km83xx_i2c.c
+++ b/board/keymile/km83xx/km83xx_i2c.c
@@ -13,31 +13,33 @@
static void i2c_write_start_seq(void)
{
- struct fsl_i2c *dev;
- dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET);
+ struct fsl_i2c_base *base;
+ base = (struct fsl_i2c_base *)(CONFIG_SYS_IMMR +
+ CONFIG_SYS_I2C_OFFSET);
udelay(DELAY_ABORT_SEQ);
- out_8(&dev->cr, (I2C_CR_MEN | I2C_CR_MSTA));
+ out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA));
udelay(DELAY_ABORT_SEQ);
- out_8(&dev->cr, (I2C_CR_MEN));
+ out_8(&base->cr, (I2C_CR_MEN));
}
int i2c_make_abort(void)
{
- struct fsl_i2c *dev;
- dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET);
+ struct fsl_i2c_base *base;
+ base = (struct fsl_i2c_base *)(CONFIG_SYS_IMMR +
+ CONFIG_SYS_I2C_OFFSET);
uchar last;
int nbr_read = 0;
int i = 0;
int ret = 0;
/* wait after each operation to finsh with a delay */
- out_8(&dev->cr, (I2C_CR_MSTA));
+ out_8(&base->cr, (I2C_CR_MSTA));
udelay(DELAY_ABORT_SEQ);
- out_8(&dev->cr, (I2C_CR_MEN | I2C_CR_MSTA));
+ out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA));
udelay(DELAY_ABORT_SEQ);
- in_8(&dev->dr);
+ in_8(&base->dr);
udelay(DELAY_ABORT_SEQ);
- last = in_8(&dev->dr);
+ last = in_8(&base->dr);
nbr_read++;
/*
@@ -47,7 +49,7 @@ int i2c_make_abort(void)
while (((last & 0x01) != 0x01) &&
(nbr_read < CONFIG_SYS_IVM_EEPROM_MAX_LEN)) {
udelay(DELAY_ABORT_SEQ);
- last = in_8(&dev->dr);
+ last = in_8(&base->dr);
nbr_read++;
}
if ((last & 0x01) != 0x01)
@@ -56,10 +58,10 @@ int i2c_make_abort(void)
printf("[INFO] i2c abort after %d bytes (0x%02x)\n",
nbr_read, last);
udelay(DELAY_ABORT_SEQ);
- out_8(&dev->cr, (I2C_CR_MEN));
+ out_8(&base->cr, (I2C_CR_MEN));
udelay(DELAY_ABORT_SEQ);
/* clear status reg */
- out_8(&dev->sr, 0);
+ out_8(&base->sr, 0);
for (i = 0; i < 5; i++)
i2c_write_start_seq();
diff --git a/board/mpl/pip405/README b/board/mpl/pip405/README
index e900c56f15..f039817b79 100644
--- a/board/mpl/pip405/README
+++ b/board/mpl/pip405/README
@@ -32,8 +32,8 @@ Changed files:
- include/cmd_bsp.h added PIP405 commands definitions
- include/cmd_condefs.h added Floppy and SCSI support
- include/cmd_disk.h changed to work with block device description
-- include/config_LANTEC.h excluded CONFIG_CMD_FDC and CONFIG_CMD_SCSI
-- include/config_hymod.h excluded CONFIG_CMD_FDC and CONFIG_CMD_SCSI
+- include/config_LANTEC.h excluded CONFIG_CMD_FDC and CONFIG_SCSI
+- include/config_hymod.h excluded CONFIG_CMD_FDC and CONFIG_SCSI
- include/flash.h added INTEL_ID_28F320C3T 0x88C488C4
- include/i2c.h added "defined(CONFIG_PIP405)"
- include/image.h added IH_OS_U_BOOT, IH_TYPE_FIRMWARE
@@ -86,7 +86,7 @@ section "Changes".
New Commands:
-------------
-CONFIG_CMD_SCSI SCSI Support
+CONFIG_SCSI SCSI Support
CONFIG_CMF_FDC Floppy disk support
IDE additions:
diff --git a/board/qca/ap121/Kconfig b/board/qca/ap121/Kconfig
new file mode 100644
index 0000000000..f7e768ad58
--- /dev/null
+++ b/board/qca/ap121/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_AP121
+
+config SYS_VENDOR
+ default "qca"
+
+config SYS_BOARD
+ default "ap121"
+
+config SYS_CONFIG_NAME
+ default "ap121"
+
+endif
diff --git a/board/qca/ap121/MAINTAINERS b/board/qca/ap121/MAINTAINERS
new file mode 100644
index 0000000000..8b02988d60
--- /dev/null
+++ b/board/qca/ap121/MAINTAINERS
@@ -0,0 +1,6 @@
+AP121 BOARD
+M: Wills Wang <wills.wang@live.com>
+S: Maintained
+F: board/qca/ap121/
+F: include/configs/ap121.h
+F: configs/ap121_defconfig
diff --git a/board/qca/ap121/Makefile b/board/qca/ap121/Makefile
new file mode 100644
index 0000000000..ced5432e86
--- /dev/null
+++ b/board/qca/ap121/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = ap121.o
diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
new file mode 100644
index 0000000000..d6c60fea86
--- /dev/null
+++ b/board/qca/ap121/ap121.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+#include <mach/ar71xx_regs.h>
+#include <mach/ddr.h>
+#include <debug_uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+ void __iomem *regs;
+ u32 val;
+
+ regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
+ MAP_NOCACHE);
+
+ /*
+ * GPIO9 as input, GPIO10 as output
+ */
+ val = readl(regs + AR71XX_GPIO_REG_OE);
+ val &= ~AR933X_GPIO(9);
+ val |= AR933X_GPIO(10);
+ writel(val, regs + AR71XX_GPIO_REG_OE);
+
+ /*
+ * Enable UART, GPIO9 as UART_SI, GPIO10 as UART_SO
+ */
+ val = readl(regs + AR71XX_GPIO_REG_FUNC);
+ val |= AR933X_GPIO_FUNC_UART_EN | AR933X_GPIO_FUNC_RES_TRUE;
+ writel(val, regs + AR71XX_GPIO_REG_FUNC);
+}
+#endif
+
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+ debug_uart_init();
+#endif
+ ddr_init();
+ return 0;
+}
diff --git a/board/qca/ap143/Kconfig b/board/qca/ap143/Kconfig
new file mode 100644
index 0000000000..4cdac0d06d
--- /dev/null
+++ b/board/qca/ap143/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_AP143
+
+config SYS_VENDOR
+ default "qca"
+
+config SYS_BOARD
+ default "ap143"
+
+config SYS_CONFIG_NAME
+ default "ap143"
+
+endif
diff --git a/board/qca/ap143/MAINTAINERS b/board/qca/ap143/MAINTAINERS
new file mode 100644
index 0000000000..11cb14fc74
--- /dev/null
+++ b/board/qca/ap143/MAINTAINERS
@@ -0,0 +1,6 @@
+AP143 BOARD
+M: Wills Wang <wills.wang@live.com>
+S: Maintained
+F: board/qca/ap143/
+F: include/configs/ap143.h
+F: configs/ap143_defconfig
diff --git a/board/qca/ap143/Makefile b/board/qca/ap143/Makefile
new file mode 100644
index 0000000000..00f78376ec
--- /dev/null
+++ b/board/qca/ap143/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = ap143.o
diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
new file mode 100644
index 0000000000..1572472ca3
--- /dev/null
+++ b/board/qca/ap143/ap143.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+#include <mach/ar71xx_regs.h>
+#include <mach/ddr.h>
+#include <debug_uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+ void __iomem *regs;
+ u32 val;
+
+ regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
+ MAP_NOCACHE);
+
+ /*
+ * GPIO9 as input, GPIO10 as output
+ */
+ val = readl(regs + AR71XX_GPIO_REG_OE);
+ val |= QCA953X_GPIO(9);
+ val &= ~QCA953X_GPIO(10);
+ writel(val, regs + AR71XX_GPIO_REG_OE);
+
+ /*
+ * Enable GPIO10 as UART0_SOUT
+ */
+ val = readl(regs + QCA953X_GPIO_REG_OUT_FUNC2);
+ val &= ~QCA953X_GPIO_MUX_MASK(16);
+ val |= QCA953X_GPIO_OUT_MUX_UART0_SOUT << 16;
+ writel(val, regs + QCA953X_GPIO_REG_OUT_FUNC2);
+
+ /*
+ * Enable GPIO9 as UART0_SIN
+ */
+ val = readl(regs + QCA953X_GPIO_REG_IN_ENABLE0);
+ val &= ~QCA953X_GPIO_MUX_MASK(8);
+ val |= QCA953X_GPIO_IN_MUX_UART0_SIN << 8;
+ writel(val, regs + QCA953X_GPIO_REG_IN_ENABLE0);
+
+ /*
+ * Enable GPIO10 output
+ */
+ val = readl(regs + AR71XX_GPIO_REG_OUT);
+ val |= QCA953X_GPIO(10);
+ writel(val, regs + AR71XX_GPIO_REG_OUT);
+}
+#endif
+
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+ debug_uart_init();
+#endif
+ ddr_init();
+ return 0;
+}
diff --git a/board/sandbox/MAINTAINERS b/board/sandbox/MAINTAINERS
index 10d88a28a6..f5db773a47 100644
--- a/board/sandbox/MAINTAINERS
+++ b/board/sandbox/MAINTAINERS
@@ -4,3 +4,10 @@ S: Maintained
F: board/sandbox/
F: include/configs/sandbox.h
F: configs/sandbox_defconfig
+
+SANDBOX_NOBLK BOARD
+M: Simon Glass <sjg@chromium.org>
+S: Maintained
+F: board/sandbox/
+F: include/configs/sandbox.h
+F: configs/sandbox_noblk_defconfig
diff --git a/board/tplink/wdr4300/Kconfig b/board/tplink/wdr4300/Kconfig
new file mode 100644
index 0000000000..902abf560d
--- /dev/null
+++ b/board/tplink/wdr4300/Kconfig
@@ -0,0 +1,15 @@
+if BOARD_TPLINK_WDR4300
+
+config SYS_VENDOR
+ default "tplink"
+
+config SYS_SOC
+ default "ath79"
+
+config SYS_BOARD
+ default "wdr4300"
+
+config SYS_CONFIG_NAME
+ default "tplink_wdr4300"
+
+endif
diff --git a/board/tplink/wdr4300/MAINTAINERS b/board/tplink/wdr4300/MAINTAINERS
new file mode 100644
index 0000000000..db239c291a
--- /dev/null
+++ b/board/tplink/wdr4300/MAINTAINERS
@@ -0,0 +1,6 @@
+TPLINK_WDR4300 BOARD
+M: Marek Vasut <marex@denx.de>
+S: Maintained
+F: board/tplink/wdr4300/
+F: include/configs/tplink_wdr4300.h
+F: configs/tplink_wdr4300_defconfig
diff --git a/board/tplink/wdr4300/Makefile b/board/tplink/wdr4300/Makefile
new file mode 100644
index 0000000000..4f0c296628
--- /dev/null
+++ b/board/tplink/wdr4300/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = wdr4300.o
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
new file mode 100644
index 0000000000..6e070fd558
--- /dev/null
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2016 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+#include <mach/ath79.h>
+#include <mach/ar71xx_regs.h>
+#include <mach/ddr.h>
+#include <debug_uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_USB
+static void wdr4300_usb_start(void)
+{
+ void __iomem *gpio_regs = map_physmem(AR71XX_GPIO_BASE,
+ AR71XX_GPIO_SIZE, MAP_NOCACHE);
+ if (!gpio_regs)
+ return;
+
+ /* Power up the USB HUB. */
+ clrbits_be32(gpio_regs + AR71XX_GPIO_REG_OE, BIT(21) | BIT(22));
+ writel(BIT(21) | BIT(22), gpio_regs + AR71XX_GPIO_REG_SET);
+ mdelay(1);
+
+ ath79_usb_reset();
+}
+#else
+static inline void wdr4300_usb_start(void) {}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ void __iomem *regs;
+
+ regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
+ MAP_NOCACHE);
+
+ /* Assure JTAG is not disconnected. */
+ writel(0x40, regs + AR934X_GPIO_REG_FUNC);
+
+ /* Configure default GPIO input/output regs. */
+ writel(0x3031b, regs + AR71XX_GPIO_REG_OE);
+ writel(0x0f804, regs + AR71XX_GPIO_REG_OUT);
+
+ /* Configure pin multiplexing. */
+ writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC0);
+ writel(0x0b0a0980, regs + AR934X_GPIO_REG_OUT_FUNC1);
+ writel(0x00180000, regs + AR934X_GPIO_REG_OUT_FUNC2);
+ writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC3);
+ writel(0x0000004d, regs + AR934X_GPIO_REG_OUT_FUNC4);
+ writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC5);
+
+#ifdef CONFIG_DEBUG_UART
+ debug_uart_init();
+#endif
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+ ar934x_pll_init(560, 480, 240);
+ ar934x_ddr_init(560, 480, 240);
+#endif
+
+ wdr4300_usb_start();
+ ath79_eth_reset();
+
+ return 0;
+}
+#endif
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile
index eab93038ce..7de0212bc9 100644
--- a/board/xilinx/zynq/Makefile
+++ b/board/xilinx/zynq/Makefile
@@ -7,17 +7,7 @@
obj-y := board.o
-# Copied from Xilinx SDK 2014.4
-hw-platform-$(CONFIG_TARGET_ZYNQ_ZED) := zed_hw_platform
-hw-platform-$(CONFIG_TARGET_ZYNQ_MICROZED) := MicroZed_hw_platform
-hw-platform-$(CONFIG_TARGET_ZYNQ_ZC702) := ZC702_hw_platform
-hw-platform-$(CONFIG_TARGET_ZYNQ_ZC706) := ZC706_hw_platform
-hw-platform-$(CONFIG_TARGET_ZYNQ_ZYBO) := zybo_hw_platform
-# If you want to use customized ps7_init_gpl.c/h,
-# enable CONFIG_ZYNQ_CUSTOM_INIT and put them into custom_hw_platform/.
-# This line must be placed at the bottom of the list because
-# it takes precedence over the default ones.
-hw-platform-$(CONFIG_ZYNQ_CUSTOM_INIT) := custom_hw_platform
+hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/ps7_init_gpl.c),\
$(hw-platform-y)/ps7_init_gpl.o)
diff --git a/board/xilinx/zynq/custom_hw_platform/.gitignore b/board/xilinx/zynq/custom_hw_platform/.gitignore
deleted file mode 100644
index c455361df6..0000000000
--- a/board/xilinx/zynq/custom_hw_platform/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-ps7_init_gpl.[ch]
diff --git a/board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
index eb290023a1..eb290023a1 100644
--- a/board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h
index bdea5a0443..bdea5a0443 100644
--- a/board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h
diff --git a/board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
index abfd91187d..abfd91187d 100644
--- a/board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h
index 16fa8104a4..16fa8104a4 100644
--- a/board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h
diff --git a/board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
index 77fd9499df..77fd9499df 100644
--- a/board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h
index 8527eef447..8527eef447 100644
--- a/board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h
diff --git a/board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
index f4f45becd6..f4f45becd6 100644
--- a/board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.h
index 9b41e28697..9b41e28697 100644
--- a/board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.h
diff --git a/board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c
index 83daf7bf15..83daf7bf15 100644
--- a/board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h
index 22d9fd9250..22d9fd9250 100644
--- a/board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 2ab3f190ac..90f00c650a 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -1,8 +1,29 @@
#
-# (C) Copyright 2014 - 2015 Xilinx, Inc.
+# (C) Copyright 2014 - 2016 Xilinx, Inc.
# Michal Simek <michal.simek@xilinx.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := zynqmp.o
+
+hw-platform-y :=$(shell echo $(CONFIG_SYS_CONFIG_NAME))
+
+init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/psu_init_gpl.c),\
+ $(hw-platform-y)/psu_init_gpl.o)
+
+ifeq ($(init-objs),)
+ifneq ($(wildcard $(srctree)/$(src)/psu_init_gpl.c),)
+init-objs := psu_init_gpl.o
+$(if $(CONFIG_SPL_BUILD),\
+$(warning Put custom psu_init_gpl.c/h to board/xilinx/zynqmp/custom_hw_platform/))
+endif
+endif
+
+obj-$(CONFIG_SPL_BUILD) += $(init-objs)
+
+# Suppress "warning: function declaration isn't a prototype"
+CFLAGS_REMOVE_psu_init_gpl.o := -Wstrict-prototypes
+
+# To include xil_io.h
+CFLAGS_psu_init_gpl.o := -I$(srctree)/$(src)
diff --git a/board/xilinx/zynqmp/xil_io.h b/board/xilinx/zynqmp/xil_io.h
new file mode 100644
index 0000000000..57ca4adf11
--- /dev/null
+++ b/board/xilinx/zynqmp/xil_io.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef XIL_IO_H /* prevent circular inclusions */
+#define XIL_IO_H
+
+/* FIXME remove this when vivado is fixed */
+#include <asm/io.h>
+
+#define xil_printf(...)
+
+void Xil_ICacheEnable(void)
+{}
+
+void Xil_DCacheEnable(void)
+{}
+
+void Xil_ICacheDisable(void)
+{}
+
+void Xil_DCacheDisable(void)
+{}
+
+void Xil_Out32(unsigned long addr, unsigned long val)
+{
+ writel(val, addr);
+}
+
+int Xil_In32(unsigned long addr)
+{
+ return readl(addr);
+}
+
+#endif /* XIL_IO_H */
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 132d724fbd..4623cd49e9 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -15,6 +15,7 @@
#include <asm/io.h>
#include <usb.h>
#include <dwc3-uboot.h>
+#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -50,6 +51,22 @@ int board_early_init_r(void)
return 0;
}
+int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
+{
+#if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
+ defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) && \
+ defined(CONFIG_ZYNQ_EEPROM_BUS)
+ i2c_set_bus_num(CONFIG_ZYNQ_EEPROM_BUS);
+
+ if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
+ CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
+ ethaddr, 6))
+ printf("I2C EEPROM MAC address read failed\n");
+#endif
+
+ return 0;
+}
+
#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
/*
* fdt_get_reg - Fill buffer by information from DT
OpenPOWER on IntegriCloud