diff options
Diffstat (limited to 'board')
39 files changed, 718 insertions, 1032 deletions
diff --git a/board/cm_t35/Makefile b/board/cm_t35/Makefile index 894fa097e1..bde56e61f4 100644 --- a/board/cm_t35/Makefile +++ b/board/cm_t35/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o +COBJS-$(CONFIG_LCD) += display.o COBJS := cm_t35.o leds.o $(COBJS-y) diff --git a/board/cm_t35/cm_t35.c b/board/cm_t35/cm_t35.c index edbb941985..e0e8235d73 100644 --- a/board/cm_t35/cm_t35.c +++ b/board/cm_t35/cm_t35.c @@ -33,6 +33,7 @@ #include <net.h> #include <i2c.h> #include <usb.h> +#include <mmc.h> #include <twl4030.h> #include <linux/compiler.h> @@ -216,6 +217,9 @@ static void cm_t3x_set_common_muxconf(void) /* SB-T35 Ethernet */ MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); /*GPMC_nCS4*/ + /* DVI enable */ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | DIS | M4));/*GPMC_nCS3*/ + /* CM-T3x Ethernet */ MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M0)); /*GPMC_nCS5*/ MUX_VAL(CP(GPMC_CLK), (IEN | PTD | DIS | M4)); /*GPIO_59*/ @@ -377,9 +381,19 @@ void set_muxconf_regs(void) } #ifdef CONFIG_GENERIC_MMC +int board_mmc_getcd(struct mmc *mmc) +{ + u8 val; + + if (twl4030_i2c_read_u8(TWL4030_CHIP_GPIO, &val, TWL4030_BASEADD_GPIO)) + return -1; + + return !(val & 1); +} + int board_mmc_init(bd_t *bis) { - return omap_mmc_init(0, 0, 0); + return omap_mmc_init(0, 0, 0, -1, 59); } #endif diff --git a/board/cm_t35/display.c b/board/cm_t35/display.c new file mode 100644 index 0000000000..2f78bad6ea --- /dev/null +++ b/board/cm_t35/display.c @@ -0,0 +1,428 @@ +/* + * (C) Copyright 2012 CompuLab, Ltd. <www.compulab.co.il> + * + * Authors: Nikita Kiryanov <nikita@compulab.co.il> + * + * Parsing code based on linux/drivers/video/pxafb.c + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ +#include <common.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <stdio_dev.h> +#include <asm/arch/dss.h> +#include <lcd.h> +#include <asm/arch-omap3/dss.h> + +DECLARE_GLOBAL_DATA_PTR; + +enum display_type { + NONE, + DVI, + DVI_CUSTOM, +}; + +#define CMAP_ADDR 0x80100000 + +/* + * The frame buffer is allocated before we have the chance to parse user input. + * To make sure enough memory is allocated for all resolutions, we define + * vl_{col | row} to the maximal resolution supported by OMAP3. + */ +vidinfo_t panel_info = { + .vl_col = 1400, + .vl_row = 1050, + .vl_bpix = LCD_BPP, + .cmap = (ushort *)CMAP_ADDR, +}; + +static struct panel_config panel_cfg; +static enum display_type lcd_def; + +/* + * A note on DVI presets; + * U-Boot can convert 8 bit BMP data to 16 bit BMP data, and OMAP DSS can + * convert 16 bit data into 24 bit data. Thus, GFXFORMAT_RGB16 allows us to + * support two BMP types with one setting. + */ +static const struct panel_config preset_dvi_640X480 = { + .lcd_size = PANEL_LCD_SIZE(640, 480), + .timing_h = DSS_HBP(48) | DSS_HFP(16) | DSS_HSW(96), + .timing_v = DSS_VBP(33) | DSS_VFP(10) | DSS_VSW(2), + .divisor = 12 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_800X600 = { + .lcd_size = PANEL_LCD_SIZE(800, 600), + .timing_h = DSS_HBP(88) | DSS_HFP(40) | DSS_HSW(128), + .timing_v = DSS_VBP(23) | DSS_VFP(1) | DSS_VSW(4), + .divisor = 8 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_1024X768 = { + .lcd_size = PANEL_LCD_SIZE(1024, 768), + .timing_h = DSS_HBP(160) | DSS_HFP(24) | DSS_HSW(136), + .timing_v = DSS_VBP(29) | DSS_VFP(3) | DSS_VSW(6), + .divisor = 5 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_1152X864 = { + .lcd_size = PANEL_LCD_SIZE(1152, 864), + .timing_h = DSS_HBP(256) | DSS_HFP(64) | DSS_HSW(128), + .timing_v = DSS_VBP(32) | DSS_VFP(1) | DSS_VSW(3), + .divisor = 3 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_1280X960 = { + .lcd_size = PANEL_LCD_SIZE(1280, 960), + .timing_h = DSS_HBP(312) | DSS_HFP(96) | DSS_HSW(112), + .timing_v = DSS_VBP(36) | DSS_VFP(1) | DSS_VSW(3), + .divisor = 3 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_1280X1024 = { + .lcd_size = PANEL_LCD_SIZE(1280, 1024), + .timing_h = DSS_HBP(248) | DSS_HFP(48) | DSS_HSW(112), + .timing_v = DSS_VBP(38) | DSS_VFP(1) | DSS_VSW(3), + .divisor = 3 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +/* + * set_resolution_params() + * + * Due to usage of multiple display related APIs resolution data is located in + * more than one place. This function updates them all. + */ +static void set_resolution_params(int x, int y) +{ + panel_cfg.lcd_size = PANEL_LCD_SIZE(x, y); + panel_info.vl_col = x; + panel_info.vl_row = y; + lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8; +} + +static void set_preset(const struct panel_config preset, int x_res, int y_res) +{ + panel_cfg = preset; + set_resolution_params(x_res, y_res); +} + +static enum display_type set_dvi_preset(const struct panel_config preset, + int x_res, int y_res) +{ + set_preset(preset, x_res, y_res); + return DVI; +} + +/* + * parse_mode() - parse the mode parameter of custom lcd settings + * + * @mode: <res_x>x<res_y> + * + * Returns -1 on error, 0 on success. + */ +static int parse_mode(const char *mode) +{ + unsigned int modelen = strlen(mode); + int res_specified = 0; + unsigned int xres = 0, yres = 0; + int yres_specified = 0; + int i; + + for (i = modelen - 1; i >= 0; i--) { + switch (mode[i]) { + case 'x': + if (!yres_specified) { + yres = simple_strtoul(&mode[i + 1], NULL, 0); + yres_specified = 1; + } else { + goto done_parsing; + } + + break; + case '0' ... '9': + break; + default: + goto done_parsing; + } + } + + if (i < 0 && yres_specified) { + xres = simple_strtoul(mode, NULL, 0); + res_specified = 1; + } + +done_parsing: + if (res_specified) { + set_resolution_params(xres, yres); + } else { + printf("LCD: invalid mode: %s\n", mode); + return -1; + } + + return 0; +} + +#define PIXEL_CLK_NUMERATOR (26 * 432 / 39) +/* + * parse_pixclock() - Parse the pixclock parameter of custom lcd settings + * + * @pixclock: the desired pixel clock + * + * Returns -1 on error, 0 on success. + * + * Handling the pixel_clock: + * + * Pixel clock is defined in the OMAP35x TRM as follows: + * pixel_clock = + * (SYS_CLK * 2 * PRCM.CM_CLKSEL2_PLL[18:8]) / + * (DSS.DISPC_DIVISOR[23:16] * DSS.DISPC_DIVISOR[6:0] * + * PRCM.CM_CLKSEL_DSS[4:0] * (PRCM.CM_CLKSEL2_PLL[6:0] + 1)) + * + * In practice, this means that in order to set the + * divisor for the desired pixel clock one needs to + * solve the following equation: + * + * 26 * 432 / (39 * <pixel_clock>) = DSS.DISPC_DIVISOR[6:0] + * + * NOTE: the explicit equation above is reduced. Do not + * try to infer anything from these numbers. + */ +static int parse_pixclock(char *pixclock) +{ + int divisor, pixclock_val; + char *pixclk_start = pixclock; + + pixclock_val = simple_strtoul(pixclock, &pixclock, 10); + divisor = DIV_ROUND_UP(PIXEL_CLK_NUMERATOR, pixclock_val); + /* 0 and 1 are illegal values for PCD */ + if (divisor <= 1) + divisor = 2; + + panel_cfg.divisor = divisor | (1 << 16); + if (pixclock[0] != '\0') { + printf("LCD: invalid value for pixclock:%s\n", pixclk_start); + return -1; + } + + return 0; +} + +/* + * parse_setting() - parse a single setting of custom lcd parameters + * + * @setting: The custom lcd setting <name>:<value> + * + * Returns -1 on failure, 0 on success. + */ +static int parse_setting(char *setting) +{ + int num_val; + char *setting_start = setting; + + if (!strncmp(setting, "mode:", 5)) { + return parse_mode(setting + 5); + } else if (!strncmp(setting, "pixclock:", 9)) { + return parse_pixclock(setting + 9); + } else if (!strncmp(setting, "left:", 5)) { + num_val = simple_strtoul(setting + 5, &setting, 0); + panel_cfg.timing_h |= DSS_HBP(num_val); + } else if (!strncmp(setting, "right:", 6)) { + num_val = simple_strtoul(setting + 6, &setting, 0); + panel_cfg.timing_h |= DSS_HFP(num_val); + } else if (!strncmp(setting, "upper:", 6)) { + num_val = simple_strtoul(setting + 6, &setting, 0); + panel_cfg.timing_v |= DSS_VBP(num_val); + } else if (!strncmp(setting, "lower:", 6)) { + num_val = simple_strtoul(setting + 6, &setting, 0); + panel_cfg.timing_v |= DSS_VFP(num_val); + } else if (!strncmp(setting, "hsynclen:", 9)) { + num_val = simple_strtoul(setting + 9, &setting, 0); + panel_cfg.timing_h |= DSS_HSW(num_val); + } else if (!strncmp(setting, "vsynclen:", 9)) { + num_val = simple_strtoul(setting + 9, &setting, 0); + panel_cfg.timing_v |= DSS_VSW(num_val); + } else if (!strncmp(setting, "hsync:", 6)) { + if (simple_strtoul(setting + 6, &setting, 0) == 0) + panel_cfg.pol_freq |= DSS_IHS; + else + panel_cfg.pol_freq &= ~DSS_IHS; + } else if (!strncmp(setting, "vsync:", 6)) { + if (simple_strtoul(setting + 6, &setting, 0) == 0) + panel_cfg.pol_freq |= DSS_IVS; + else + panel_cfg.pol_freq &= ~DSS_IVS; + } else if (!strncmp(setting, "outputen:", 9)) { + if (simple_strtoul(setting + 9, &setting, 0) == 0) + panel_cfg.pol_freq |= DSS_IEO; + else + panel_cfg.pol_freq &= ~DSS_IEO; + } else if (!strncmp(setting, "pixclockpol:", 12)) { + if (simple_strtoul(setting + 12, &setting, 0) == 0) + panel_cfg.pol_freq |= DSS_IPC; + else + panel_cfg.pol_freq &= ~DSS_IPC; + } else if (!strncmp(setting, "active", 6)) { + panel_cfg.panel_type = ACTIVE_DISPLAY; + return 0; /* Avoid sanity check below */ + } else if (!strncmp(setting, "passive", 7)) { + panel_cfg.panel_type = PASSIVE_DISPLAY; + return 0; /* Avoid sanity check below */ + } else if (!strncmp(setting, "display:", 8)) { + if (!strncmp(setting + 8, "dvi", 3)) { + lcd_def = DVI_CUSTOM; + return 0; /* Avoid sanity check below */ + } + } else { + printf("LCD: unknown option %s\n", setting_start); + return -1; + } + + if (setting[0] != '\0') { + printf("LCD: invalid value for %s\n", setting_start); + return -1; + } + + return 0; +} + +/* + * env_parse_customlcd() - parse custom lcd params from an environment variable. + * + * @custom_lcd_params: The environment variable containing the lcd params. + * + * Returns -1 on failure, 0 on success. + */ +static int parse_customlcd(char *custom_lcd_params) +{ + char params_cpy[160]; + char *setting; + + strncpy(params_cpy, custom_lcd_params, 160); + setting = strtok(params_cpy, ","); + while (setting) { + if (parse_setting(setting) < 0) + return -1; + + setting = strtok(NULL, ","); + } + + /* Currently we don't support changing this via custom lcd params */ + panel_cfg.data_lines = LCD_INTERFACE_24_BIT; + panel_cfg.gfx_format = GFXFORMAT_RGB16; /* See dvi predefines note */ + + return 0; +} + +/* + * env_parse_displaytype() - parse display type. + * + * Parses the environment variable "displaytype", which contains the + * name of the display type or preset, in which case it applies its + * configurations. + * + * Returns the type of display that was specified. + */ +static enum display_type env_parse_displaytype(char *displaytype) +{ + if (!strncmp(displaytype, "dvi640x480", 10)) + return set_dvi_preset(preset_dvi_640X480, 640, 480); + else if (!strncmp(displaytype, "dvi800x600", 10)) + return set_dvi_preset(preset_dvi_800X600, 800, 600); + else if (!strncmp(displaytype, "dvi1024x768", 11)) + return set_dvi_preset(preset_dvi_1024X768, 1024, 768); + else if (!strncmp(displaytype, "dvi1152x864", 11)) + return set_dvi_preset(preset_dvi_1152X864, 1152, 864); + else if (!strncmp(displaytype, "dvi1280x960", 11)) + return set_dvi_preset(preset_dvi_1280X960, 1280, 960); + else if (!strncmp(displaytype, "dvi1280x1024", 12)) + return set_dvi_preset(preset_dvi_1280X1024, 1280, 1024); + + return NONE; +} + +int lcd_line_length; +int lcd_color_fg; +int lcd_color_bg; +void *lcd_base; +short console_col; +short console_row; +void *lcd_console_address; + +void lcd_ctrl_init(void *lcdbase) +{ + struct prcm *prcm = (struct prcm *)PRCM_BASE; + char *custom_lcd; + char *displaytype = getenv("displaytype"); + + if (displaytype == NULL) + return; + + lcd_def = env_parse_displaytype(displaytype); + /* If we did not recognize the preset, check if it's an env variable */ + if (lcd_def == NONE) { + custom_lcd = getenv(displaytype); + if (custom_lcd == NULL || parse_customlcd(custom_lcd) < 0) + return; + } + + panel_cfg.frame_buffer = lcdbase; + omap3_dss_panel_config(&panel_cfg); + /* + * Pixel clock is defined with many divisions and only few + * multiplications of the system clock. Since DSS FCLK divisor is set + * to 16 by default, we need to set it to a smaller value, like 3 + * (chosen via trial and error). + */ + clrsetbits_le32(&prcm->clksel_dss, 0xF, 3); +} + +void lcd_enable(void) +{ + if (lcd_def == DVI || lcd_def == DVI_CUSTOM) { + gpio_direction_output(54, 0); /* Turn on DVI */ + omap3_dss_enable(); + } +} + +void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) {} diff --git a/board/comelit/dig297/dig297.c b/board/comelit/dig297/dig297.c index c6c10717b7..2dca275d15 100644 --- a/board/comelit/dig297/dig297.c +++ b/board/comelit/dig297/dig297.c @@ -147,8 +147,7 @@ void set_muxconf_regs(void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/corscience/tricorder/tricorder.c b/board/corscience/tricorder/tricorder.c index 56fe495277..5c02eaf2ec 100644 --- a/board/corscience/tricorder/tricorder.c +++ b/board/corscience/tricorder/tricorder.c @@ -80,7 +80,7 @@ void set_muxconf_regs(void) #if defined(CONFIG_GENERIC_MMC) && !(defined(CONFIG_SPL_BUILD)) int board_mmc_init(bd_t *bis) { - return omap_mmc_init(0, 0, 0); + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c index 9fe6408ecf..923461a390 100644 --- a/board/htkw/mcx/mcx.c +++ b/board/htkw/mcx/mcx.c @@ -114,7 +114,7 @@ void set_muxconf_regs(void) #if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - return omap_mmc_init(0, 0, 0); + return omap_mmc_init(0, 0, 0, -1, -1); } #endif @@ -130,6 +130,7 @@ static struct panel_config lcd_cfg = { .load_mode = 0x02, /* Frame Mode */ .panel_color = 0, .lcd_size = PANEL_LCD_SIZE(800, 480), + .gfx_format = GFXFORMAT_RGB24_UNPACKED, }; int board_video_init(void) diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c index 49fcf34893..2bac916576 100644 --- a/board/isee/igep00x0/igep00x0.c +++ b/board/isee/igep00x0/igep00x0.c @@ -150,8 +150,7 @@ static inline void setup_net_chip(void) {} #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/isee/igep00x0/igep00x0.h b/board/isee/igep00x0/igep00x0.h index ea1e9acab3..5ef22aeda4 100644 --- a/board/isee/igep00x0/igep00x0.h +++ b/board/isee/igep00x0/igep00x0.h @@ -34,10 +34,13 @@ const omap3_sysinfo sysinfo = { DDR_STACKED, #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) - "OMAP3 IGEP v2 board", + "IGEPv2", #endif #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) - "OMAP3 IGEP COM Module", + "IGEP COM MODULE/ELECTRON", +#endif +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032) + "IGEP COM PROTON", #endif #if defined(CONFIG_ENV_IS_IN_ONENAND) "ONENAND", diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c index 0b3721ed85..65e1b78457 100644 --- a/board/logicpd/am3517evm/am3517evm.c +++ b/board/logicpd/am3517evm/am3517evm.c @@ -135,8 +135,7 @@ void set_muxconf_regs(void) #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c index 12bcfcb877..6e83aa2094 100644 --- a/board/logicpd/omap3som/omap3logic.c +++ b/board/logicpd/omap3som/omap3logic.c @@ -140,7 +140,7 @@ int board_init(void) #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - return omap_mmc_init(0, 0, 0); + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c index 90b6b0fde5..c79a261d23 100644 --- a/board/logicpd/zoom1/zoom1.c +++ b/board/logicpd/zoom1/zoom1.c @@ -92,8 +92,7 @@ void set_muxconf_regs(void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/logicpd/zoom2/zoom2.c b/board/logicpd/zoom2/zoom2.c index 8e18019801..ad6ae36696 100644 --- a/board/logicpd/zoom2/zoom2.c +++ b/board/logicpd/zoom2/zoom2.c @@ -183,8 +183,7 @@ void set_muxconf_regs (void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/matrix_vision/mvblx/fpga.c b/board/matrix_vision/mvblx/fpga.c index dacc13845d..3fcf9685e9 100644 --- a/board/matrix_vision/mvblx/fpga.c +++ b/board/matrix_vision/mvblx/fpga.c @@ -31,6 +31,7 @@ #include <ACEX1K.h> #include <command.h> #include <asm/gpio.h> +#include <linux/byteorder/generic.h> #include "fpga.h" #ifdef FPGA_DEBUG @@ -209,9 +210,20 @@ int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie) { unsigned char *data = (unsigned char *) buf; int i; + int headerlen = len - cyclone2.size; + + if (headerlen < 0) + return FPGA_FAIL; + else if (headerlen == sizeof(uint32_t)) { + const unsigned int fpgavers_len = 11; /* '0x' + 8 hex digits + \0 */ + char fpgavers_str[fpgavers_len]; + snprintf(fpgavers_str, fpgavers_len, "0x%08x", + be32_to_cpup((uint32_t*)data)); + setenv("fpgavers", fpgavers_str); + } fpga_debug("fpga_wr: buf %p / size %d\n", buf, len); - for (i = 0; i < len; i++) + for (i = headerlen; i < len; i++) _write_fpga(data[i]); fpga_debug("-%s\n", __func__); diff --git a/board/matrix_vision/mvblx/mvblx.c b/board/matrix_vision/mvblx/mvblx.c index f68f312215..49af384aaa 100644 --- a/board/matrix_vision/mvblx/mvblx.c +++ b/board/matrix_vision/mvblx/mvblx.c @@ -106,8 +106,8 @@ void set_muxconf_regs(void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - omap_mmc_init(1, 0, 0); + omap_mmc_init(0, 0, 0, -1, -1); + omap_mmc_init(1, 0, 0, -1, -1); return 0; } #endif diff --git a/board/matrix_vision/mvblx/sys_eeprom.c b/board/matrix_vision/mvblx/sys_eeprom.c index 945a36dfe6..15269c6d7a 100644 --- a/board/matrix_vision/mvblx/sys_eeprom.c +++ b/board/matrix_vision/mvblx/sys_eeprom.c @@ -326,10 +326,28 @@ int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +static inline int is_portrait(void) +{ + int i; + unsigned int orient_index = 0; /* idx of char which determines orientation */ + + for (i = sizeof(e.id)/sizeof(*e.id) - 1; i>=0; i--) { + if (e.id[i] == '-') { + orient_index = i+1; + break; + } + } + + return (orient_index && + (e.id[orient_index] >= '5') && (e.id[orient_index] <= '8')); +} + int mac_read_from_eeprom(void) { u32 crc, crc_offset = offsetof(struct eeprom, crc); u32 *crcp; /* Pointer to the CRC in the data read from the EEPROM */ +#define FILENAME_LANDSCAPE "mvBlueLynx_X.rbf" +#define FILENAME_PORTRAIT "mvBlueLynx_X_sensor_cd.rbf" if (read_eeprom()) { printf("EEPROM Read failed.\n"); @@ -374,6 +392,12 @@ int mac_read_from_eeprom(void) setenv("serial#", serial_num); } + /* decide which fpga file to load depending on orientation */ + if (is_portrait()) + setenv("fpgafilename", FILENAME_PORTRAIT); + else + setenv("fpgafilename", FILENAME_LANDSCAPE); + /* TODO should I calculate CRC here? */ return 0; } diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c index b2fe1c531a..48eb65f896 100644 --- a/board/nokia/rx51/rx51.c +++ b/board/nokia/rx51/rx51.c @@ -671,7 +671,7 @@ int rx51_kp_getc(void) */ int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - omap_mmc_init(1, 0, 0); + omap_mmc_init(0, 0, 0, -1, -1); + omap_mmc_init(1, 0, 0, -1, -1); return 0; } diff --git a/board/ns9750dev/config.mk b/board/ns9750dev/config.mk deleted file mode 100644 index e5d87029d3..0000000000 --- a/board/ns9750dev/config.mk +++ /dev/null @@ -1,16 +0,0 @@ -####################################################################### -# -# Copyright (C) 2004 by FS Forth-Systeme GmbH. -# Markus Pietrek <mpietrek@fsforth.de> -# -# @TODO -# Linux-Kernel is expected to be at 0000'8000, entry 0000'8000 -# optionally with a ramdisk at 0080'0000 -# -# we load ourself to 0078'0000 -# -# download area is 0060'0000 -# - - -CONFIG_SYS_TEXT_BASE = 0x00780000 diff --git a/board/ns9750dev/flash.c b/board/ns9750dev/flash.c deleted file mode 100644 index 185bc2d73a..0000000000 --- a/board/ns9750dev/flash.c +++ /dev/null @@ -1,474 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2003 - * Texas Instruments, <www.ti.com> - * Kshitij Gupta <Kshitij@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <linux/byteorder/swab.h> - -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */ -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Board support for 1 or 2 flash devices */ -#undef FLASH_PORT_WIDTH32 -#define FLASH_PORT_WIDTH16 - -#ifdef FLASH_PORT_WIDTH16 -#define FLASH_PORT_WIDTH ushort -#define FLASH_PORT_WIDTHV vu_short -#define SWAP(x) __swab16(x) -#else -#define FLASH_PORT_WIDTH ulong -#define FLASH_PORT_WIDTHV vu_long -#define SWAP(x) __swab32(x) -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - - -/* Flash Organization Structure */ -typedef struct OrgDef { - unsigned int sector_number; - unsigned int sector_size; -} OrgDef; - - -/* Flash Organizations */ -OrgDef OrgIntel_28F256L18T[] = { - {4, 32 * 1024}, /* 4 * 32kBytes sectors */ - {255, 128 * 1024}, /* 255 * 128kBytes sectors */ -}; - - -/*----------------------------------------------------------------------- - * Functions - */ -unsigned long flash_init (void); -static ulong flash_get_size (FPW * addr, flash_info_t * info); -static int write_data (flash_info_t * info, ulong dest, FPW data); -static void flash_get_offsets (ulong base, flash_info_t * info); -void inline spin_wheel (void); -void flash_print_info (flash_info_t * info); -void flash_unprotect_sectors (FPWV * addr); -int flash_erase (flash_info_t * info, int s_first, int s_last); -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ - int i; - ulong size = 0; - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); - break; - default: - panic ("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t * info) -{ - int i; - OrgDef *pOrgDef; - - pOrgDef = OrgIntel_28F256L18T; - if (info->flash_id == FLASH_UNKNOWN) { - return; - } - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - if (i > 255) { - info->start[i] = base + (i * 0x8000); - info->protect[i] = 0; - } else { - info->start[i] = base + - (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F256L18T: - printf ("FLASH 28F256L18T\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (FPW * addr, flash_info_t * info) -{ - volatile FPW value; - - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = (FPW) 0x00AA00AA; - addr[0x2AAA] = (FPW) 0x00550055; - addr[0x5555] = (FPW) 0x00900090; - - mb (); - value = addr[0]; - - switch (value) { - - case (FPW) INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb (); - value = addr[1]; /* device ID */ - switch (value) { - - case (FPW) (INTEL_ID_28F256L18T): - info->flash_id += FLASH_28F256L18T; - info->sector_count = 259; - info->size = 0x02000000; - break; /* => 32 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - - return (info->size); -} - - -/* unprotects a sector for write and erase - * on some intel parts, this unprotects the entire chip, but it - * wont hurt to call this additional times per sector... - */ -void flash_unprotect_sectors (FPWV * addr) -{ -#define PD_FINTEL_WSMS_READY_MASK 0x0080 - - *addr = (FPW) 0x00500050; /* clear status register */ - - /* this sends the clear lock bit command */ - *addr = (FPW) 0x00600060; - *addr = (FPW) 0x00D000D0; -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int flag, prot, sect; - ulong type, start; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - FPWV *addr = (FPWV *) (info->start[sect]); - FPW status; - - printf ("Erasing sector %2d ... ", sect); - - flash_unprotect_sectors (addr); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - *addr = (FPW) 0x00500050;/* clear status register */ - *addr = (FPW) 0x00200020;/* erase setup */ - *addr = (FPW) 0x00D000D0;/* erase confirm */ - - while (((status = - *addr) & (FPW) 0x00800080) != - (FPW) 0x00800080) { - if (get_timer(start) > - CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - /* suspend erase */ - *addr = (FPW) 0x00B000B0; - /* reset to read mode */ - *addr = (FPW) 0x00FF00FF; - rcode = 1; - break; - } - } - - /* clear status register cmd. */ - *addr = (FPW) 0x00500050; - *addr = (FPW) 0x00FF00FF;/* resest to read mode */ - printf (" done\n"); - } - } - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) { - return 4; - } -/* get lower word aligned address */ -#ifdef FLASH_PORT_WIDTH16 - wp = (addr & ~1); - port_width = 2; -#else - wp = (addr & ~3); - port_width = 4; -#endif - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel (); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_data (info, wp, SWAP (data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t * info, ulong dest, FPW data) -{ - FPWV *addr = (FPWV *) dest; - ulong status; - int flag; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); - return (2); - } - flash_unprotect_sectors (addr); - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - *addr = (FPW) 0x00400040; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (1); - } - } - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); -} - -void inline spin_wheel (void) -{ - static int p = 0; - static char w[] = "\\/-"; - - printf ("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/board/ns9750dev/led.c b/board/ns9750dev/led.c deleted file mode 100644 index b85c869d85..0000000000 --- a/board/ns9750dev/led.c +++ /dev/null @@ -1,46 +0,0 @@ -/*********************************************************************** - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * - * $Id: led.c,v 1.1 2004/02/16 10:37:20 mpietrek Exp $ - * @Author: Markus Pietrek - * @Descr: Defines helper functions for toggeling LEDs - * @Usage: - * @References: [1] - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ***********************************************************************/ - -#ifdef CONFIG_STATUS_LED - -#include <ns9750_bbus.h> - -static inline void __led_init( led_id_t mask, int state ) -{ - XXXX; -} - -static inline void __led_toggle( led_id_t mask ) -{ -} - -static inline void __led_set( led_id_t mask, int state ) -{ -} - -#endif /* CONFIG_STATUS_LED */ diff --git a/board/ns9750dev/lowlevel_init.S b/board/ns9750dev/lowlevel_init.S deleted file mode 100644 index ba5ff8124e..0000000000 --- a/board/ns9750dev/lowlevel_init.S +++ /dev/null @@ -1,298 +0,0 @@ -/* - * Board specific setup info - * - * (C) Copyright 2003 - * Texas Instruments, <www.ti.com> - * Kshitij Gupta <Kshitij@ti.com> - * - * Modified for the NS9750 DevBoard by - * (C) Copyright 2004 by FS Forth-Systeme GmbH. - * Markus Pietrek <mpietrek@fsforth.de> - * @References: [1] NS9750 Hardware Reference/December 2003 - * [2] ns9750_a.cmd from MAJIC configuration - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <version.h> - -#if defined(CONFIG_NS9750DEV) -# ifndef CONFIG_SKIP_LOWLEVEL_INIT -# include <./ns9750_sys.h> -# include <./ns9750_mem.h> -# endif -#endif - -/*********************************************************************** - * @Function: write_register_block - * @Return: nothing - * @Descr: Copies the register block of register_offset:register value to - * the registers at base r0. The block is assumed to start in RAM at r1 - * and end at r2. The linked RAM base address of U-Boot is assumed to be - * in r5 while the ROM base address we are running from is r6 - * Uses r3 and r4 as tempory registers - ***********************************************************************/ - -.macro write_register_block - @@ map the addresses to high memory - sub r1, r1, r5 - add r1, r1, r6 - sub r2, r2, r5 - add r2, r2, r6 - - @@ copy all -1: - @@ Write register/value pair starting at [r1] to register base r0 - ldr r3, [r1], #4 - ldr r4, [r1], #4 - str r4, [r0,r3] - cmp r1, r2 - blt 1b -.endm - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE @ sdram load addr from config.mk -_PHYS_FLASH: - .word PHYS_FLASH_1 @ real flash address (without mirroring) -_CAS_LATENCY: - .word 0x00022000 @ for CAS2 latency - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT -.globl lowlevel_init -lowlevel_init: - - /* U-Boot may be linked to RAM at 0x780000. But this code will run in - flash from 0x0. But in order to enable RAM we have to disable the - mirror bit, therefore we have to jump to our real flash address - beginning at PHYS_FLASH_1 (CS4 Base). Therefore, - _run_at_real_flash_address may be 0x500003b0 while be linked to - 0x7803b0. So we must modify our linked addresses */ - - @@ branch to high memory address, away from 0x0 - ldr r5, _TEXT_BASE - ldr r6, _PHYS_FLASH - ldr r0, =_run_at_real_flash_address - sub r0, r0, r5 - add r0, r0, r6 - mov pc, r0 - nop @ for pipelining - -_run_at_real_flash_address: - @@ now we are running > PHYS_FLASH_1, safe to enable memory controller - - @@ Write Memory Configuration Registers - - ldr r0, _NS9750_MEM_MODULE_BASE - ldr r1, =_MEM_CONFIG_START - ldr r2, =_MEM_CONFIG_END - - write_register_block - - @@ Give SDRAM some time to settle - @@ @TODO. According to [2] it should be 2 AHB cycles. Check - - ldr r1, =0x50 -_sdram_settle: - subs r1, r1, #1 - bne _sdram_settle - -_enable_mappings: - @@ Enable SDRAM Mode - - ldr r1, =_MEM_MODE_START - ldr r2, =_MEM_MODE_END - - write_register_block - - ldr r3, _CAS_LATENCY @ perform one read from SDRAM - ldr r3, [r3] - - @@ Enable SDRAM and memory mappings - - ldr r1, =_MEM_ENABLE_START - ldr r2, =_MEM_ENABLE_END - - write_register_block - - @@ Activate AHB monitor - - ldr r0, =NS9750_SYS_MODULE_BASE - ldr r1, =_AHB_MONITOR_START - ldr r2, =_AHB_MONITOR_END - - write_register_block -_relocate_lr: - /* lr and ip (from cpu_init_crit) are still based on 0x0, relocate it to - PHYS_FLASH. */ - mov r1, ip - add r1, r1, r6 - mov ip, r1 - - mov r1, lr - add r1, r1, r6 - mov lr, r1 - - @@ back to arch calling code - mov pc, lr - - .ltorg - -_NS9750_MEM_MODULE_BASE: - .word NS9750_MEM_MODULE_BASE - -_MEM_CONFIG_START: - /* Table of 2 32bit entries. First word is register address offset - relative to NS9750_MEM_MODULE_BASE, second one is value. They are - written in order of appearance */ - - @@ Register values taken from [2] - .word NS9750_MEM_CTRL - .word NS9750_MEM_CTRL_E - - .word NS9750_MEM_DYN_REFRESH - .word (0x6 & NS9750_MEM_DYN_REFRESH_MA) - - .word NS9750_MEM_DYN_READ_CFG - .word (0x1 & NS9750_MEM_DYN_READ_CFG_MA) - - .word NS9750_MEM_DYN_TRP - .word (0x1 & NS9750_MEM_DYN_TRP_MA) - - .word NS9750_MEM_DYN_TRAS - .word (0x4 & NS9750_MEM_DYN_TRAS_MA) - - .word NS9750_MEM_DYN_TAPR - .word (0x1 & NS9750_MEM_DYN_TRAS_MA) - - .word NS9750_MEM_DYN_TDAL - .word (0x5 & NS9750_MEM_DYN_TDAL_MA) - - .word NS9750_MEM_DYN_TWR - .word (0x1 & NS9750_MEM_DYN_TWR_MA) - - .word NS9750_MEM_DYN_TRC - .word (0x6 & NS9750_MEM_DYN_TRC_MA) - - .word NS9750_MEM_DYN_TRFC - .word (0x6 & NS9750_MEM_DYN_TRFC_MA) - - .word NS9750_MEM_DYN_TRRD - .word (0x1 & NS9750_MEM_DYN_TRRD_MA) - - .word NS9750_MEM_DYN_TMRD - .word (0x1 & NS9750_MEM_DYN_TMRD_MA) - - @@ CS 4 - .word NS9750_MEM_DYN_CFG(0) - .word (NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - .word NS9750_MEM_DYN_RAS_CAS(0) - .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \ - (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA)) - - @@ CS 5 - .word NS9750_MEM_DYN_CFG(1) - .word (NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - .word NS9750_MEM_DYN_RAS_CAS(1) - .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \ - (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA)) - - @@ CS 6 - .word NS9750_MEM_DYN_CFG(2) - .word (NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - .word NS9750_MEM_DYN_RAS_CAS(2) - .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \ - (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA)) - - @@ CS 7 - .word NS9750_MEM_DYN_CFG(3) - .word (NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - .word NS9750_MEM_DYN_RAS_CAS(3) - .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \ - (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA)) - - .word NS9750_MEM_DYN_CTRL - .word (NS9750_MEM_DYN_CTRL_I_PALL | \ - NS9750_MEM_DYN_CTRL_SR | \ - NS9750_MEM_DYN_CTRL_CE ) - - .word NS9750_MEM_DYN_REFRESH - .word (0x1 & NS9750_MEM_DYN_REFRESH_MA) - @@ No further register settings after refresh -_MEM_CONFIG_END: - -_MEM_MODE_START: - .word NS9750_MEM_DYN_REFRESH - .word (0x30 & NS9750_MEM_DYN_REFRESH_MA) - - .word NS9750_MEM_DYN_CTRL - .word (NS9750_MEM_DYN_CTRL_I_MODE | \ - NS9750_MEM_DYN_CTRL_SR | \ - NS9750_MEM_DYN_CTRL_CE ) -_MEM_MODE_END: - -_MEM_ENABLE_START: - .word NS9750_MEM_DYN_CTRL - .word (NS9750_MEM_DYN_CTRL_I_NORMAL | \ - NS9750_MEM_DYN_CTRL_SR | \ - NS9750_MEM_DYN_CTRL_CE ) - - @@ CS 4 - .word NS9750_MEM_DYN_CFG(0) - .word (NS9750_MEM_DYN_CFG_BDMC | \ - NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - @@ CS 5 - .word NS9750_MEM_DYN_CFG(1) - .word (NS9750_MEM_DYN_CFG_BDMC | \ - NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - @@ CS 6 - .word NS9750_MEM_DYN_CFG(2) - .word (NS9750_MEM_DYN_CFG_BDMC | \ - NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - @@ CS 7 - .word NS9750_MEM_DYN_CFG(3) - .word (NS9750_MEM_DYN_CFG_BDMC | \ - NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) -_MEM_ENABLE_END: - -_AHB_MONITOR_START: - .word NS9750_SYS_AHB_TIMEOUT - .word 0x01000100 @ @TODO not calculated yet - - .word NS9750_SYS_AHB_MON - .word (NS9750_SYS_AHB_MON_BMTC_GEN_IRQ | \ - NS9750_SYS_AHB_MON_BATC_GEN_IRQ) -_AHB_MONITOR_END: - -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/board/ns9750dev/ns9750dev.c b/board/ns9750dev/ns9750dev.c deleted file mode 100644 index fc46244c74..0000000000 --- a/board/ns9750dev/ns9750dev.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> - * - * (C) Copyright 2003 - * Texas Instruments, <www.ti.com> - * Kshitij Gupta <Kshitij@ti.com> - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * Markus Pietrek <mpietrek@fsforth.de> - * derived from omap1610innovator.c - * @References: [1] NS9750 Hardware Reference/December 2003 - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#if defined(CONFIG_NS9750DEV) -# include <./configs/ns9750dev.h> -# include <./ns9750_bbus.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -void flash__init( void ); -void ether__init( void ); - -static inline void delay( unsigned long loops ) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); -} - - -/*********************************************************************** - * @Function: board_init - * @Return: 0 - * @Descr: Enables BBUS modules and other devices - ***********************************************************************/ - -int board_init( void ) -{ - /* Active BBUS modules */ - *get_bbus_reg_addr( NS9750_BBUS_MASTER_RESET ) = 0; - -#warning Please register your machine at http://www.arm.linux.org.uk/developer/machines/?action=new - /* arch number of OMAP 1510-Board */ - /* to be changed for OMAP 1610 Board */ - gd->bd->bi_arch_number = 234; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x10000100; - - -/* this speeds up your boot a quite a bit. However to make it - * work, you need make sure your kernel startup flush bug is fixed. - * ... rkw ... - */ - icache_enable(); - - flash__init(); - ether__init(); - return 0; -} - - -int misc_init_r (void) -{ - /* currently empty */ - return (0); -} - -/****************************** - Routine: - Description: -******************************/ -void flash__init (void) -{ -} -/************************************************************* - Routine:ether__init - Description: take the Ethernet controller out of reset and wait - for the EEPROM load to complete. -*************************************************************/ -void ether__init (void) -{ -} - -/****************************** - Routine: - Description: -******************************/ -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - -#if CONFIG_NR_DRAM_BANKS > 1 - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif - return 0; -} diff --git a/board/overo/overo.c b/board/overo/overo.c index fdf46a2aae..8690450fa8 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -392,7 +392,6 @@ int board_eth_init(bd_t *bis) #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c index 3a62e9d633..9ff5dd7664 100644 --- a/board/pandora/pandora.c +++ b/board/pandora/pandora.c @@ -139,7 +139,6 @@ void set_muxconf_regs(void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c index 4d3a1d5f88..6e9c3d257c 100644 --- a/board/phytec/pcm051/mux.c +++ b/board/phytec/pcm051/mux.c @@ -35,7 +35,6 @@ static struct module_pin_mux mmc0_pin_mux[] = { {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ - {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */ {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ {-1}, }; diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c index fa0ace019a..a28c7043f9 100644 --- a/board/technexion/twister/twister.c +++ b/board/technexion/twister/twister.c @@ -147,7 +147,7 @@ int board_eth_init(bd_t *bis) !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - return omap_mmc_init(0, 0, 0); + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c index c516c75a00..d57678668b 100644 --- a/board/teejet/mt_ventoux/mt_ventoux.c +++ b/board/teejet/mt_ventoux/mt_ventoux.c @@ -81,6 +81,7 @@ static struct panel_config lcd_cfg[] = { .data_lines = 0x03, /* 24 Bit RGB */ .load_mode = 0x02, /* Frame Mode */ .panel_color = 0, + .gfx_format = GFXFORMAT_RGB24_UNPACKED, }, { .timing_h = PANEL_TIMING_H(20, 192, 4), @@ -91,6 +92,7 @@ static struct panel_config lcd_cfg[] = { .data_lines = 0x03, /* 24 Bit RGB */ .load_mode = 0x02, /* Frame Mode */ .panel_color = 0, + .gfx_format = GFXFORMAT_RGB24_UNPACKED, } }; #endif @@ -304,7 +306,7 @@ int board_eth_init(bd_t *bis) !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - return omap_mmc_init(0, 0, 0); + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 48e68967e5..f4b972b3e9 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -73,7 +73,7 @@ static inline int board_is_idk(void) return !strncmp(header.config, "SKU#02", 6); } -static int board_is_gp_evm(void) +static int __maybe_unused board_is_gp_evm(void) { return !strncmp("A33515BB", header.name, 8); } @@ -389,7 +389,8 @@ int board_late_init(void) } #endif -#ifdef CONFIG_DRIVER_TI_CPSW +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) static void cpsw_control(int enabled) { /* VTP can be added here */ @@ -434,26 +435,26 @@ static struct cpsw_platform_data cpsw_data = { int board_eth_init(bd_t *bis) { int rv, n = 0; -#ifdef CONFIG_DRIVER_TI_CPSW uint8_t mac_addr[6]; uint32_t mac_hi, mac_lo; - if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { - printf("<ethaddr> not set. Reading from E-fuse\n"); - /* try reading mac address from efuse */ - mac_lo = readl(&cdev->macid0l); - mac_hi = readl(&cdev->macid0h); - mac_addr[0] = mac_hi & 0xFF; - mac_addr[1] = (mac_hi & 0xFF00) >> 8; - mac_addr[2] = (mac_hi & 0xFF0000) >> 16; - mac_addr[3] = (mac_hi & 0xFF000000) >> 24; - mac_addr[4] = mac_lo & 0xFF; - mac_addr[5] = (mac_lo & 0xFF00) >> 8; + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid0l); + mac_hi = readl(&cdev->macid0h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) + if (!getenv("ethaddr")) { + printf("<ethaddr> not set. Validating first E-fuse MAC\n"); if (is_valid_ether_addr(mac_addr)) eth_setenv_enetaddr("ethaddr", mac_addr); - else - goto try_usbether; } if (board_is_bone() || board_is_bone_lt() || board_is_idk()) { @@ -494,8 +495,11 @@ int board_eth_init(bd_t *bis) AR8051_RGMII_TX_CLK_DLY); } #endif -try_usbether: -#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_USB_ETHER) && \ + (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT)) + if (is_valid_ether_addr(mac_addr)) + eth_setenv_enetaddr("usbnet_devaddr", mac_addr); + rv = usb_eth_initialize(bis); if (rv < 0) printf("Error %d registering USB_ETHER\n", rv); diff --git a/board/ti/am3517crane/am3517crane.c b/board/ti/am3517crane/am3517crane.c index 888398deac..0b94245e02 100644 --- a/board/ti/am3517crane/am3517crane.c +++ b/board/ti/am3517crane/am3517crane.c @@ -78,7 +78,6 @@ void set_muxconf_regs(void) #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index b829a792b2..3d9b6dd8fd 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -72,6 +72,7 @@ #define BBTOYS_LCD 0x03000B00 #define BCT_BRETTL3 0x01000F00 #define BCT_BRETTL4 0x02000F00 +#define LSR_COM6L_ADPT 0x01001300 #define BEAGLE_NO_EEPROM 0xffffffff DECLARE_GLOBAL_DATA_PTR; @@ -227,6 +228,14 @@ static unsigned int get_expansion_id(void) i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, sizeof(expansion_config)); + /* retry reading configuration data with 16bit addressing */ + if ((expansion_config.device_vendor == 0xFFFFFF00) || + (expansion_config.device_vendor == 0xFFFFFFFF)) { + printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n"); + i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config, + sizeof(expansion_config)); + } + i2c_set_bus_num(TWL4030_I2C_BUS); return expansion_config.device_vendor; @@ -454,6 +463,11 @@ int misc_init_r(void) case BCT_BRETTL4: printf("Recognized bct electronic GmbH brettl4 board\n"); break; + case LSR_COM6L_ADPT: + printf("Recognized LSR COM6L Adapter Board\n"); + MUX_BBTOYS_WIFI() + setenv("buddy", "lsr-com6l-adpt"); + break; case BEAGLE_NO_EEPROM: printf("No EEPROM on expansion board\n"); setenv("buddy", "none"); @@ -518,8 +532,7 @@ void set_muxconf_regs(void) #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h index c0a94a92c1..6d71bbc79d 100644 --- a/board/ti/beagle/beagle.h +++ b/board/ti/beagle/beagle.h @@ -544,7 +544,8 @@ static const struct panel_config dvid_cfg = { .panel_type = 0x01, /* TFT */ .data_lines = 0x03, /* 24 Bit RGB */ .load_mode = 0x02, /* Frame Mode */ - .panel_color = DVI_BEAGLE_ORANGE_COL /* ORANGE */ + .panel_color = DVI_BEAGLE_ORANGE_COL, /* ORANGE */ + .gfx_format = GFXFORMAT_RGB24_UNPACKED, }; static const struct panel_config dvid_cfg_xm = { @@ -556,6 +557,7 @@ static const struct panel_config dvid_cfg_xm = { .panel_type = 0x01, /* TFT */ .data_lines = 0x03, /* 24 Bit RGB */ .load_mode = 0x02, /* Frame Mode */ - .panel_color = DVI_BEAGLE_ORANGE_COL /* ORANGE */ + .panel_color = DVI_BEAGLE_ORANGE_COL, /* ORANGE */ + .gfx_format = GFXFORMAT_RGB24_UNPACKED, }; #endif diff --git a/board/ns9750dev/Makefile b/board/ti/dra7xx/Makefile index 0d082c5696..db6da5ba21 100644 --- a/board/ns9750dev/Makefile +++ b/board/ti/dra7xx/Makefile @@ -1,6 +1,6 @@ # -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# (C) Copyright 2013 +# Texas Instruments, <www.ti.com> # # See file CREDITS for list of people who contributed to this # project. @@ -12,7 +12,7 @@ # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License @@ -25,15 +25,19 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS := ns9750dev.o flash.o led.o -SOBJS := lowlevel_init.o +COBJS := evm.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c new file mode 100644 index 0000000000..7bbb5492fe --- /dev/null +++ b/board/ti/dra7xx/evm.c @@ -0,0 +1,103 @@ +/* + * (C) Copyright 2013 + * Texas Instruments Incorporated, <www.ti.com> + * + * Lokesh Vutla <lokeshvutla@ti.com> + * + * Based on previous work by: + * Aneesh V <aneesh@ti.com> + * Steve Sakoman <steve@sakoman.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <twl6035.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mmc_host_def.h> + +#include "mux_data.h" + +#ifdef CONFIG_USB_EHCI +#include <usb.h> +#include <asm/arch/ehci.h> +#include <asm/ehci-omap.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +const struct omap_sysinfo sysinfo = { + "Board: DRA7xx\n" +}; + +/** + * @brief board_init + * + * @return 0 + */ +int board_init(void) +{ + gpmc_init(); + gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + return 0; +} + +/** + * @brief misc_init_r - Configure EVM board specific configurations + * such as power configurations, ethernet initialization as phase2 of + * boot sequence + * + * @return 0 + */ +int misc_init_r(void) +{ + return 0; +} + +static void do_set_mux32(u32 base, + struct pad_conf_entry const *array, int size) +{ + int i; + struct pad_conf_entry *pad = (struct pad_conf_entry *)array; + + for (i = 0; i < size; i++, pad++) + writel(pad->val, base + pad->offset); +} + +void set_muxconf_regs_essential(void) +{ + do_set_mux32((*ctrl)->control_padconf_core_base, + core_padconf_array_essential, + sizeof(core_padconf_array_essential) / + sizeof(struct pad_conf_entry)); +} + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) +int board_mmc_init(bd_t *bis) +{ + omap_mmc_init(0, 0, 0, -1, -1); + omap_mmc_init(1, 0, 0, -1, -1); + return 0; +} +#endif diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h new file mode 100644 index 0000000000..04c95fd376 --- /dev/null +++ b/board/ti/dra7xx/mux_data.h @@ -0,0 +1,47 @@ +/* + * (C) Copyright 2013 + * Texas Instruments Incorporated, <www.ti.com> + * + * Sricharan R <r.sricharan@ti.com> + * Nishant Kamat <nskamat@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _MUX_DATA_DRA7XX_H_ +#define _MUX_DATA_DRA7XX_H_ + +#include <asm/arch/mux_dra7xx.h> + +const struct pad_conf_entry core_padconf_array_essential[] = { + {MMC1_CLK, (PTU | IEN | M0)}, /* MMC1_CLK */ + {MMC1_CMD, (PTU | IEN | M0)}, /* MMC1_CMD */ + {MMC1_DAT0, (PTU | IEN | M0)}, /* MMC1_DAT0 */ + {MMC1_DAT1, (PTU | IEN | M0)}, /* MMC1_DAT1 */ + {MMC1_DAT2, (PTU | IEN | M0)}, /* MMC1_DAT2 */ + {MMC1_DAT3, (PTU | IEN | M0)}, /* MMC1_DAT3 */ + {MMC1_SDCD, (PTU | IEN | M0)}, /* MMC1_SDCD */ + {MMC1_SDWP, (PTU | IEN | M0)}, /* MMC1_SDWP */ + {UART1_RXD, (PTU | IEN | M0)}, /* UART1_RXD */ + {UART1_TXD, (M0)}, /* UART1_TXD */ + {UART1_CTSN, (PTU | IEN | M0)}, /* UART1_CTSN */ + {UART1_RTSN, (M0)}, /* UART1_RTSN */ + {I2C1_SDA, (PTU | IEN | M0)}, /* I2C1_SDA */ + {I2C1_SCL, (PTU | IEN | M0)}, /* I2C1_SCL */ +}; +#endif /* _MUX_DATA_DRA7XX_H_ */ diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 8a3aa0c5bf..3c2dcab68c 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -277,7 +277,6 @@ int board_eth_init(bd_t *bis) #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/ti/omap5_evm/evm.c b/board/ti/omap5_evm/evm.c index c8dfdf8142..55337c09d5 100644 --- a/board/ti/omap5_evm/evm.c +++ b/board/ti/omap5_evm/evm.c @@ -94,8 +94,8 @@ void set_muxconf_regs_non_essential(void) #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - omap_mmc_init(1, 0, 0); + omap_mmc_init(0, 0, 0, -1, -1); + omap_mmc_init(1, 0, 0, -1, -1); return 0; } #endif diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index 4feef78efe..cab059863d 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -179,8 +179,7 @@ void set_muxconf_regs_non_essential(void) #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/ti/sdp3430/sdp.c b/board/ti/sdp3430/sdp.c index 9a1c012145..052efc589f 100644 --- a/board/ti/sdp3430/sdp.c +++ b/board/ti/sdp3430/sdp.c @@ -209,7 +209,6 @@ void set_muxconf_regs(void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c index 982c771a73..4c1a4f7e78 100644 --- a/board/ti/sdp4430/sdp.c +++ b/board/ti/sdp4430/sdp.c @@ -108,8 +108,8 @@ void set_muxconf_regs_non_essential(void) #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - omap_mmc_init(1, 0, 0); + omap_mmc_init(0, 0, 0, -1, -1); + omap_mmc_init(1, 0, 0, -1, -1); return 0; } #endif diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c index b88d9783cb..ebff59e70b 100644 --- a/board/timll/devkit8000/devkit8000.c +++ b/board/timll/devkit8000/devkit8000.c @@ -136,8 +136,7 @@ void set_muxconf_regs(void) #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0, 0, 0); - return 0; + return omap_mmc_init(0, 0, 0, -1, -1); } #endif |
