diff options
Diffstat (limited to 'board')
191 files changed, 1669 insertions, 659 deletions
diff --git a/board/atmel/at91rm9200ek/at91rm9200ek.c b/board/atmel/at91rm9200ek/at91rm9200ek.c index 64ab572619..4ca8106c06 100644 --- a/board/atmel/at91rm9200ek/at91rm9200ek.c +++ b/board/atmel/at91rm9200ek/at91rm9200ek.c @@ -14,7 +14,6 @@ #include <netdev.h> #include <asm/arch/hardware.h> #include <asm/arch/at91_pio.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_common.h> #include <asm/io.h> diff --git a/board/atmel/at91rm9200ek/led.c b/board/atmel/at91rm9200ek/led.c index 6761b141fb..fbe8e3d22c 100644 --- a/board/atmel/at91rm9200ek/led.c +++ b/board/atmel/at91rm9200ek/led.c @@ -12,7 +12,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/hardware.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/at91_pio.h> #include <status_led.h> @@ -59,11 +59,9 @@ void red_led_off(void) void coloured_LED_init (void) { - at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO; - /* Enable PIOB clock */ - writel(1 << ATMEL_ID_PIOB, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOB); /* Disable peripherals on LEDs */ writel(GREEN_LED | YELLOW_LED | RED_LED, &pio->piob.per); diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 7f14af1011..98193bfdc6 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -11,7 +11,7 @@ #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <atmel_mci.h> @@ -70,11 +70,9 @@ static void at91sam9260ek_nand_hw_init(void) #ifdef CONFIG_MACB static void at91sam9260ek_macb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - /* Enable EMAC clock */ - writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC0); /* * Disable pull-up on: @@ -122,12 +120,9 @@ int board_mmc_init(bd_t *bd) int board_early_init_f(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clocks for all PIOs */ - writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOC), - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); return 0; } diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 52504742cd..7b7cd2c426 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -12,7 +12,6 @@ #include <asm/arch/at91sam9261_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> @@ -35,7 +34,6 @@ static void at91sam9261ek_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; unsigned long csa; /* Enable CS3 */ @@ -74,7 +72,7 @@ static void at91sam9261ek_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOC); /* Configure RDY/BSY */ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); @@ -161,8 +159,6 @@ void lcd_disable(void) static void at91sam9261ek_lcd_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ @@ -186,7 +182,7 @@ static void at91sam9261ek_lcd_hw_init(void) at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ - writel(AT91_PMC_HCK1, &pmc->scer); + at91_system_clk_enable(AT91_PMC_HCK1); /* For 9G10EK, let U-Boot allocate the framebuffer in SDRAM */ #ifdef CONFIG_AT91SAM9261EK diff --git a/board/atmel/at91sam9261ek/led.c b/board/atmel/at91sam9261ek/led.c index 18a68d8c59..485d7ea81f 100644 --- a/board/atmel/at91sam9261ek/led.c +++ b/board/atmel/at91sam9261ek/led.c @@ -8,17 +8,15 @@ #include <common.h> #include <asm/arch/at91sam9261.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h> #include <asm/arch/at91_pio.h> +#include <asm/arch/clk.h> #include <asm/io.h> void coloured_LED_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - /* Enable clock */ - writel(ATMEL_ID_PIOA, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); at91_set_gpio_output(CONFIG_RED_LED, 1); at91_set_gpio_output(CONFIG_GREEN_LED, 1); diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 927adb0d38..af68e10390 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -11,7 +11,6 @@ #include <asm/arch/at91sam9263.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_matrix.h> #include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> @@ -39,7 +38,6 @@ static void at91sam9263ek_nand_hw_init(void) unsigned long csa; at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0; at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX; - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; /* Enable CS3 */ csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A; @@ -68,8 +66,8 @@ static void at91sam9263ek_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE, - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOCDE); /* Configure RDY/BSY */ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); @@ -82,11 +80,9 @@ static void at91sam9263ek_nand_hw_init(void) #ifdef CONFIG_MACB static void at91sam9263ek_macb_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; - /* Enable clock */ - writel(1 << ATMEL_ID_EMAC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC); /* * Disable pull-up on: @@ -139,8 +135,6 @@ void lcd_disable(void) static void at91sam9263ek_lcd_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; - at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */ at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */ at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */ @@ -164,7 +158,7 @@ static void at91sam9263ek_lcd_hw_init(void) at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */ at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */ - writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_LCDC); gd->fb_base = ATMEL_BASE_SRAM0; } @@ -226,12 +220,9 @@ int board_mmc_init(bd_t *bd) int board_early_init_f(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clocks for all PIOs */ - writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOCDE), - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOCDE); at91_seriald_hw_init(); return 0; diff --git a/board/atmel/at91sam9263ek/led.c b/board/atmel/at91sam9263ek/led.c index e317d99831..21d81def5e 100644 --- a/board/atmel/at91sam9263ek/led.c +++ b/board/atmel/at91sam9263ek/led.c @@ -9,16 +9,13 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/gpio.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91sam9263.h> +#include <asm/arch/clk.h> void coloured_LED_init(void) { - /* Enable clock */ - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; - - writel(1 << ATMEL_ID_PIOB | 1 << ATMEL_ID_PIOCDE, - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOB); at91_set_gpio_output(CONFIG_RED_LED, 1); at91_set_gpio_output(CONFIG_GREEN_LED, 1); diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index 0a51fcd9aa..4c6431266f 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -12,7 +12,6 @@ #include <asm/arch/at91sam9g45_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h> #include <asm/arch/clk.h> #include <lcd.h> @@ -36,7 +35,6 @@ void at91sam9m10g45ek_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; unsigned long csa; /* Enable CS3 */ @@ -63,7 +61,7 @@ void at91sam9m10g45ek_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(3), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOC); /* Configure RDY/BSY */ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); @@ -130,13 +128,11 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable DDR2 clock */ - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); @@ -146,9 +142,7 @@ void mem_init(void) #ifdef CONFIG_CMD_USB static void at91sam9m10g45ek_usb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - writel(1 << ATMEL_ID_PIODE, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIODE); at91_set_gpio_output(AT91_PIN_PD1, 0); at91_set_gpio_output(AT91_PIN_PD3, 0); @@ -158,11 +152,9 @@ static void at91sam9m10g45ek_usb_hw_init(void) #ifdef CONFIG_MACB static void at91sam9m10g45ek_macb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - /* Enable clock */ - writel(1 << ATMEL_ID_EMAC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC); /* * Disable pull-up on: @@ -222,8 +214,6 @@ void lcd_disable(void) static void at91sam9m10g45ek_lcd_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */ at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */ at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */ @@ -255,7 +245,7 @@ static void at91sam9m10g45ek_lcd_hw_init(void) at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */ at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */ - writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_LCDC); gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE; } diff --git a/board/atmel/at91sam9m10g45ek/led.c b/board/atmel/at91sam9m10g45ek/led.c index fe98723962..866052ee1c 100644 --- a/board/atmel/at91sam9m10g45ek/led.c +++ b/board/atmel/at91sam9m10g45ek/led.c @@ -9,15 +9,12 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/at91sam9g45.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> void coloured_LED_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clock */ - writel(1 << ATMEL_ID_PIODE, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIODE); at91_set_gpio_output(CONFIG_RED_LED, 1); at91_set_gpio_output(CONFIG_GREEN_LED, 1); diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c index 0b0177df2b..d3555bbdf6 100644 --- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c +++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c @@ -10,7 +10,6 @@ #include <asm/arch/at91sam9x5_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> @@ -208,9 +207,8 @@ void at91sam9n12ek_usb_hw_init(void) int board_early_init_f(void) { - /* Enable clocks for all PIOs */ - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - writel((1 << ATMEL_ID_PIOAB) | (1 << ATMEL_ID_PIOCD), &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOAB); + at91_periph_clk_enable(ATMEL_ID_PIOCD); at91_seriald_hw_init(); return 0; diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index f995cef1e2..9ef2864bb1 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -12,7 +12,6 @@ #include <asm/arch/at91sam9rl_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> @@ -36,7 +35,6 @@ static void at91sam9rlek_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; unsigned long csa; /* Enable CS3 */ @@ -64,7 +62,7 @@ static void at91sam9rlek_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOD, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOD); /* Configure RDY/BSY */ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); @@ -106,8 +104,6 @@ void lcd_disable(void) } static void at91sam9rlek_lcd_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */ at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */ @@ -130,7 +126,7 @@ static void at91sam9rlek_lcd_hw_init(void) at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ - writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_LCDC); } #ifdef CONFIG_LCD_INFO @@ -174,12 +170,10 @@ int board_mmc_init(bd_t *bis) int board_early_init_f(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clocks for all PIOs */ - writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOC) | (1 << ATMEL_ID_PIOD), - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); + at91_periph_clk_enable(ATMEL_ID_PIOD); return 0; } diff --git a/board/atmel/at91sam9rlek/led.c b/board/atmel/at91sam9rlek/led.c index fede59cd32..d593aba6e4 100644 --- a/board/atmel/at91sam9rlek/led.c +++ b/board/atmel/at91sam9rlek/led.c @@ -8,16 +8,13 @@ #include <common.h> #include <asm/arch/at91sam9rl.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <asm/io.h> void coloured_LED_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clock */ - writel(ATMEL_ID_PIOD, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOD); at91_set_gpio_output(CONFIG_RED_LED, 1); at91_set_gpio_output(CONFIG_GREEN_LED, 1); diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index 833e38335a..c14df303b2 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -9,10 +9,9 @@ #include <asm/arch/at91sam9x5_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> -#include <asm/arch/gpio.h> #include <asm/arch/clk.h> +#include <asm/arch/gpio.h> #include <lcd.h> #include <atmel_hlcdc.h> #include <atmel_mci.h> @@ -39,7 +38,6 @@ static void at91sam9x5ek_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; unsigned long csa; /* Enable CS3 */ @@ -72,7 +70,7 @@ static void at91sam9x5ek_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(1), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOCD, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOCD); /* Configure RDY/BSY */ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); @@ -141,8 +139,6 @@ void lcd_disable(void) static void at91sam9x5ek_lcd_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - if (has_lcdc()) { at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDPWM */ at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDVSYNC */ @@ -176,7 +172,7 @@ static void at91sam9x5ek_lcd_hw_init(void) at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD22 */ at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD23 */ - writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_LCDC); } } diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c index 8ed01ddbea..10edf28a9b 100644 --- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c +++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c @@ -15,7 +15,6 @@ #include <version.h> #include <asm/io.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/atmel_pio4.h> #include <asm/arch/atmel_mpddrc.h> #include <asm/arch/atmel_usba_udc.h> diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c index 7acb8d0974..2b9da91b2d 100644 --- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c +++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c @@ -10,7 +10,6 @@ #include <asm/io.h> #include <asm/arch/sama5d3_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/clk.h> @@ -184,14 +183,13 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable MPDDR clock */ + /* Enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); @@ -199,7 +197,6 @@ void mem_init(void) void at91_pmc_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; u32 tmp; tmp = AT91_PMC_PLLAR_29 | @@ -208,7 +205,7 @@ void at91_pmc_init(void) AT91_PMC_PLLXR_DIV(1); at91_plla_init(tmp); - writel(0x3 << 8, &pmc->pllicpr); + at91_pllicpr_init(AT91_PMC_IPLL_PLLA(0x3)); tmp = AT91_PMC_MCKR_MDIV_4 | AT91_PMC_MCKR_CSS_PLLA; diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c index 0d824fc0ba..e8ee612036 100644 --- a/board/atmel/sama5d3xek/sama5d3xek.c +++ b/board/atmel/sama5d3xek/sama5d3xek.c @@ -10,7 +10,6 @@ #include <asm/io.h> #include <asm/arch/sama5d3_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/clk.h> @@ -443,14 +442,13 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable MPDDR clock */ + /* Enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); @@ -458,7 +456,6 @@ void mem_init(void) void at91_pmc_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; u32 tmp; tmp = AT91_PMC_PLLAR_29 | @@ -467,7 +464,7 @@ void at91_pmc_init(void) AT91_PMC_PLLXR_DIV(1); at91_plla_init(tmp); - writel(0x3 << 8, &pmc->pllicpr); + at91_pllicpr_init(AT91_PMC_IPLL_PLLA(0x3)); tmp = AT91_PMC_MCKR_MDIV_4 | AT91_PMC_MCKR_CSS_PLLA; diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c index e2f33a3e8b..f4eef9609f 100644 --- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c +++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c @@ -8,7 +8,6 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/atmel_mpddrc.h> #include <asm/arch/atmel_usba_udc.h> @@ -383,14 +382,13 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable MPDDR clock */ + /* Enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); @@ -398,7 +396,6 @@ void mem_init(void) void at91_pmc_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; u32 tmp; tmp = AT91_PMC_PLLAR_29 | @@ -407,7 +404,7 @@ void at91_pmc_init(void) AT91_PMC_PLLXR_DIV(1); at91_plla_init(tmp); - writel(0x0 << 8, &pmc->pllicpr); + at91_pllicpr_init(AT91_PMC_IPLL_PLLA(0x0)); tmp = AT91_PMC_MCKR_H32MXDIV | AT91_PMC_MCKR_PLLADIV_2 | diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c index 1799059f87..aee621789e 100644 --- a/board/atmel/sama5d4ek/sama5d4ek.c +++ b/board/atmel/sama5d4ek/sama5d4ek.c @@ -8,7 +8,6 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/atmel_mpddrc.h> #include <asm/arch/atmel_usba_udc.h> @@ -379,14 +378,13 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable MPDDR clock */ + /* Enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); @@ -394,7 +392,6 @@ void mem_init(void) void at91_pmc_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; u32 tmp; tmp = AT91_PMC_PLLAR_29 | @@ -403,7 +400,7 @@ void at91_pmc_init(void) AT91_PMC_PLLXR_DIV(1); at91_plla_init(tmp); - writel(0x0 << 8, &pmc->pllicpr); + at91_pllicpr_init(AT91_PMC_IPLL_PLLA(0x0)); tmp = AT91_PMC_MCKR_H32MXDIV | AT91_PMC_MCKR_PLLADIV_2 | diff --git a/board/bct-brettl2/Makefile b/board/bct-brettl2/Makefile index 12154b625e..28fccc0dcb 100644 --- a/board/bct-brettl2/Makefile +++ b/board/bct-brettl2/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bct-brettl2/bct-brettl2.c b/board/bct-brettl2/bct-brettl2.c index bf7cd62954..adb8605bb9 100644 --- a/board/bct-brettl2/bct-brettl2.c +++ b/board/bct-brettl2/bct-brettl2.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file for BCT brettl2 + * U-Boot - main board file for BCT brettl2 * * Copyright (c) 2010 BCT Electronic GmbH * diff --git a/board/bf506f-ezkit/Makefile b/board/bf506f-ezkit/Makefile index 0f134f9ac3..7efe1bc20e 100644 --- a/board/bf506f-ezkit/Makefile +++ b/board/bf506f-ezkit/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf506f-ezkit/bf506f-ezkit.c b/board/bf506f-ezkit/bf506f-ezkit.c index 638500d0c5..77e40ae15d 100644 --- a/board/bf506f-ezkit/bf506f-ezkit.c +++ b/board/bf506f-ezkit/bf506f-ezkit.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2008-2010 Analog Devices Inc. * diff --git a/board/bf518f-ezbrd/Makefile b/board/bf518f-ezbrd/Makefile index 3a6abaa63b..e9e23ed41f 100644 --- a/board/bf518f-ezbrd/Makefile +++ b/board/bf518f-ezbrd/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf518f-ezbrd/bf518f-ezbrd.c b/board/bf518f-ezbrd/bf518f-ezbrd.c index bf4a7db03d..a14e509719 100644 --- a/board/bf518f-ezbrd/bf518f-ezbrd.c +++ b/board/bf518f-ezbrd/bf518f-ezbrd.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2008-2009 Analog Devices Inc. * diff --git a/board/bf525-ucr2/Makefile b/board/bf525-ucr2/Makefile index 8de71a1886..1be1d3117b 100644 --- a/board/bf525-ucr2/Makefile +++ b/board/bf525-ucr2/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf525-ucr2/bf525-ucr2.c b/board/bf525-ucr2/bf525-ucr2.c index 3e6df1fca8..36a725c83b 100644 --- a/board/bf525-ucr2/bf525-ucr2.c +++ b/board/bf525-ucr2/bf525-ucr2.c @@ -1,4 +1,4 @@ -/* U-boot - bf525-ucr2.c board specific routines +/* U-Boot - bf525-ucr2.c board specific routines * * (C) Copyright 2000-2004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. diff --git a/board/bf526-ezbrd/Makefile b/board/bf526-ezbrd/Makefile index 34ac56323a..c4882c9346 100644 --- a/board/bf526-ezbrd/Makefile +++ b/board/bf526-ezbrd/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf526-ezbrd/bf526-ezbrd.c b/board/bf526-ezbrd/bf526-ezbrd.c index db1ee283f2..a506d1baff 100644 --- a/board/bf526-ezbrd/bf526-ezbrd.c +++ b/board/bf526-ezbrd/bf526-ezbrd.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/bf527-ad7160-eval/Makefile b/board/bf527-ad7160-eval/Makefile index 9d8ecf118d..c225f7201a 100644 --- a/board/bf527-ad7160-eval/Makefile +++ b/board/bf527-ad7160-eval/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf527-ad7160-eval/bf527-ad7160-eval.c b/board/bf527-ad7160-eval/bf527-ad7160-eval.c index ea405b639d..9180630ee7 100644 --- a/board/bf527-ad7160-eval/bf527-ad7160-eval.c +++ b/board/bf527-ad7160-eval/bf527-ad7160-eval.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2010 Analog Devices Inc. * diff --git a/board/bf527-ezkit/Makefile b/board/bf527-ezkit/Makefile index cedd821b24..53ec9e7aa6 100644 --- a/board/bf527-ezkit/Makefile +++ b/board/bf527-ezkit/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf527-ezkit/bf527-ezkit.c b/board/bf527-ezkit/bf527-ezkit.c index b551d4ed7e..c4f58fa3b5 100644 --- a/board/bf527-ezkit/bf527-ezkit.c +++ b/board/bf527-ezkit/bf527-ezkit.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/bf527-sdp/Makefile b/board/bf527-sdp/Makefile index 1ddb026cae..77acb423a5 100644 --- a/board/bf527-sdp/Makefile +++ b/board/bf527-sdp/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf527-sdp/bf527-sdp.c b/board/bf527-sdp/bf527-sdp.c index 504869d72a..0c6094b1e4 100644 --- a/board/bf527-sdp/bf527-sdp.c +++ b/board/bf527-sdp/bf527-sdp.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2010 Analog Devices Inc. * diff --git a/board/bf533-ezkit/Makefile b/board/bf533-ezkit/Makefile index 6838cf0451..bf7a2c4477 100644 --- a/board/bf533-ezkit/Makefile +++ b/board/bf533-ezkit/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2007 Analog Device Inc. # diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c index 81e390c93f..6879319a70 100644 --- a/board/bf533-ezkit/bf533-ezkit.c +++ b/board/bf533-ezkit/bf533-ezkit.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2008 Analog Devices Inc. * diff --git a/board/bf533-ezkit/flash-defines.h b/board/bf533-ezkit/flash-defines.h index fa322039f7..7822a9dfd7 100644 --- a/board/bf533-ezkit/flash-defines.h +++ b/board/bf533-ezkit/flash-defines.h @@ -1,5 +1,5 @@ /* - * U-boot - flash-defines.h + * U-Boot - flash-defines.h * * Copyright (c) 2005-2007 Analog Devices Inc. * diff --git a/board/bf533-ezkit/flash.c b/board/bf533-ezkit/flash.c index fd06b318f3..3180a76fa6 100644 --- a/board/bf533-ezkit/flash.c +++ b/board/bf533-ezkit/flash.c @@ -1,5 +1,5 @@ /* - * U-boot - flash.c Flash driver for PSD4256GV + * U-Boot - flash.c Flash driver for PSD4256GV * * Copyright (c) 2005-2007 Analog Devices Inc. * This file is based on BF533EzFlash.c originally written by Analog Devices, Inc. diff --git a/board/bf533-ezkit/psd4256.h b/board/bf533-ezkit/psd4256.h index 56c644262a..925669644e 100644 --- a/board/bf533-ezkit/psd4256.h +++ b/board/bf533-ezkit/psd4256.h @@ -1,5 +1,5 @@ /* - * U-boot - psd4256.h + * U-Boot - psd4256.h * * Copyright (c) 2005-2007 Analog Devices Inc. * diff --git a/board/bf533-stamp/Makefile b/board/bf533-stamp/Makefile index 244f9e0497..041c98e19c 100644 --- a/board/bf533-stamp/Makefile +++ b/board/bf533-stamp/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c index 585f5f14d4..eb000a6a88 100644 --- a/board/bf533-stamp/bf533-stamp.c +++ b/board/bf533-stamp/bf533-stamp.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2008 Analog Devices Inc. * diff --git a/board/bf537-minotaur/Makefile b/board/bf537-minotaur/Makefile index 66d2f05f44..13ed8bfa22 100644 --- a/board/bf537-minotaur/Makefile +++ b/board/bf537-minotaur/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf537-minotaur/bf537-minotaur.c b/board/bf537-minotaur/bf537-minotaur.c index 9312216dc7..34750eca51 100644 --- a/board/bf537-minotaur/bf537-minotaur.c +++ b/board/bf537-minotaur/bf537-minotaur.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/bf537-pnav/Makefile b/board/bf537-pnav/Makefile index ffcdf1f0b0..f7af8cd5ae 100644 --- a/board/bf537-pnav/Makefile +++ b/board/bf537-pnav/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf537-pnav/bf537-pnav.c b/board/bf537-pnav/bf537-pnav.c index 6739fe1ed6..c3b06f09fc 100644 --- a/board/bf537-pnav/bf537-pnav.c +++ b/board/bf537-pnav/bf537-pnav.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/bf537-srv1/Makefile b/board/bf537-srv1/Makefile index cd0da272a6..1815fc5f8b 100644 --- a/board/bf537-srv1/Makefile +++ b/board/bf537-srv1/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf537-srv1/bf537-srv1.c b/board/bf537-srv1/bf537-srv1.c index b0ffe1aeea..fc22c07102 100644 --- a/board/bf537-srv1/bf537-srv1.c +++ b/board/bf537-srv1/bf537-srv1.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile index 234119a52a..4008e3a2d4 100644 --- a/board/bf537-stamp/Makefile +++ b/board/bf537-stamp/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2007 Analog Device Inc. # diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c index 85d41d0aaa..9b9daf4267 100644 --- a/board/bf537-stamp/bf537-stamp.c +++ b/board/bf537-stamp/bf537-stamp.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2008 Analog Devices Inc. * diff --git a/board/bf538f-ezkit/Makefile b/board/bf538f-ezkit/Makefile index 7c8cda05e9..eb1703e897 100644 --- a/board/bf538f-ezkit/Makefile +++ b/board/bf538f-ezkit/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf538f-ezkit/bf538f-ezkit.c b/board/bf538f-ezkit/bf538f-ezkit.c index 49d30e75d0..2dd4c0c4d1 100644 --- a/board/bf538f-ezkit/bf538f-ezkit.c +++ b/board/bf538f-ezkit/bf538f-ezkit.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2008 Analog Devices Inc. * diff --git a/board/bf548-ezkit/Makefile b/board/bf548-ezkit/Makefile index 6f4200bd46..e4d0caaac4 100644 --- a/board/bf548-ezkit/Makefile +++ b/board/bf548-ezkit/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf548-ezkit/bf548-ezkit.c b/board/bf548-ezkit/bf548-ezkit.c index cb9ee863a4..31d6eeec0c 100644 --- a/board/bf548-ezkit/bf548-ezkit.c +++ b/board/bf548-ezkit/bf548-ezkit.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2008 Analog Devices Inc. * diff --git a/board/bf561-acvilon/Makefile b/board/bf561-acvilon/Makefile index 48bec2884d..08e2fad61e 100644 --- a/board/bf561-acvilon/Makefile +++ b/board/bf561-acvilon/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2007 Analog Device Inc. # diff --git a/board/bf561-ezkit/Makefile b/board/bf561-ezkit/Makefile index 23c7101c20..3d534d2486 100644 --- a/board/bf561-ezkit/Makefile +++ b/board/bf561-ezkit/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2007 Analog Device Inc. # diff --git a/board/bf561-ezkit/bf561-ezkit.c b/board/bf561-ezkit/bf561-ezkit.c index 8441838747..534c39ca89 100644 --- a/board/bf561-ezkit/bf561-ezkit.c +++ b/board/bf561-ezkit/bf561-ezkit.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2008 Analog Devices Inc. * diff --git a/board/bf609-ezkit/Makefile b/board/bf609-ezkit/Makefile index 3bfd0887bc..e4184ee2b6 100644 --- a/board/bf609-ezkit/Makefile +++ b/board/bf609-ezkit/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/bf609-ezkit/bf609-ezkit.c b/board/bf609-ezkit/bf609-ezkit.c index 86da028bce..c993ca6d91 100644 --- a/board/bf609-ezkit/bf609-ezkit.c +++ b/board/bf609-ezkit/bf609-ezkit.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2008-2011 Analog Devices Inc. * diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c index e0c8d93fe7..7c117ea997 100644 --- a/board/bf609-ezkit/soft_switch.c +++ b/board/bf609-ezkit/soft_switch.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2008-2011 Analog Devices Inc. * diff --git a/board/bf609-ezkit/soft_switch.h b/board/bf609-ezkit/soft_switch.h index d147fe1378..75d64e279a 100644 --- a/board/bf609-ezkit/soft_switch.h +++ b/board/bf609-ezkit/soft_switch.h @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2008-2011 Analog Devices Inc. * diff --git a/board/blackstamp/Makefile b/board/blackstamp/Makefile index 38e5da7469..2ae79da071 100644 --- a/board/blackstamp/Makefile +++ b/board/blackstamp/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/blackstamp/blackstamp.c b/board/blackstamp/blackstamp.c index 06d004a39e..d233b8a7fc 100644 --- a/board/blackstamp/blackstamp.c +++ b/board/blackstamp/blackstamp.c @@ -1,5 +1,5 @@ /* - * U-boot - blackstamp.c BlackStamp board specific routines + * U-Boot - blackstamp.c BlackStamp board specific routines * Most code stolen from boards/bf533-stamp/bf533-stamp.c * Edited to the BlackStamp by Ben Matthews for UR LLE * diff --git a/board/blackvme/Makefile b/board/blackvme/Makefile index 4ff989a140..9a617757ea 100644 --- a/board/blackvme/Makefile +++ b/board/blackvme/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/blackvme/blackvme.c b/board/blackvme/blackvme.c index eccdaf3a48..d8932ed910 100644 --- a/board/blackvme/blackvme.c +++ b/board/blackvme/blackvme.c @@ -1,4 +1,4 @@ -/* U-boot - blackvme.c board specific routines +/* U-Boot - blackvme.c board specific routines * (c) Wojtek Skulski 2010 info@skutek.com * Board info: http://www.skutek.com * Copyright (c) 2005-2009 Analog Devices Inc. diff --git a/board/bluewater/snapper9260/snapper9260.c b/board/bluewater/snapper9260/snapper9260.c index 95633b0d2e..2d1a89e102 100644 --- a/board/bluewater/snapper9260/snapper9260.c +++ b/board/bluewater/snapper9260/snapper9260.c @@ -15,7 +15,7 @@ #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <asm/arch/atmel_serial.h> #include <net.h> @@ -31,11 +31,9 @@ DECLARE_GLOBAL_DATA_PTR; static void macb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - /* Enable clock */ - writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC0); /* Disable pull-ups to prevent PHY going into test mode */ writel(pin_to_mask(AT91_PIN_PA14) | @@ -108,12 +106,9 @@ static void nand_hw_init(void) int board_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable PIO clocks */ - writel((1 << ATMEL_ID_PIOA) | - (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOC), &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); /* The mach-type is the same for both Snapper 9260 and 9G20 */ gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260; diff --git a/board/br4/Makefile b/board/br4/Makefile index 68e24ab83f..c6c03aba09 100644 --- a/board/br4/Makefile +++ b/board/br4/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) Switchfin Org. <dpn@switchfin.org> # diff --git a/board/br4/br4.c b/board/br4/br4.c index bc034e38d4..6f3f170a32 100644 --- a/board/br4/br4.c +++ b/board/br4/br4.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) Switchfin Org. <dpn@switchfin.org> * diff --git a/board/calao/usb_a9263/usb_a9263.c b/board/calao/usb_a9263/usb_a9263.c index 266e9507ef..d627b240d0 100644 --- a/board/calao/usb_a9263/usb_a9263.c +++ b/board/calao/usb_a9263/usb_a9263.c @@ -12,7 +12,7 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_matrix.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <asm-generic/gpio.h> #include <asm/io.h> @@ -43,7 +43,6 @@ static void usb_a9263_nand_hw_init(void) unsigned long csa; at91_smc_t *smc = (at91_smc_t *)ATMEL_BASE_SMC0; at91_matrix_t *matrix = (at91_matrix_t *)ATMEL_BASE_MATRIX; - at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; /* Enable CS3 */ csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A; @@ -66,7 +65,8 @@ static void usb_a9263_nand_hw_init(void) AT91_SMC_MODE_DBW_8 | AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOCDE); /* Configure RDY/BSY */ gpio_request(CONFIG_SYS_NAND_READY_PIN, "NAND ready/busy"); @@ -81,10 +81,7 @@ static void usb_a9263_nand_hw_init(void) #ifdef CONFIG_MACB static void usb_a9263_macb_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; - - /* Enable clock */ - writel(1 << ATMEL_ID_EMAC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC); /* * Disable pull-up on: diff --git a/board/cm-bf527/Makefile b/board/cm-bf527/Makefile index ff8ad43d51..1d662c6684 100644 --- a/board/cm-bf527/Makefile +++ b/board/cm-bf527/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/cm-bf527/cm-bf527.c b/board/cm-bf527/cm-bf527.c index 3186c6717e..0c2138b082 100644 --- a/board/cm-bf527/cm-bf527.c +++ b/board/cm-bf527/cm-bf527.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/cm-bf533/Makefile b/board/cm-bf533/Makefile index ec99638d0a..41e100da1b 100644 --- a/board/cm-bf533/Makefile +++ b/board/cm-bf533/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/cm-bf533/cm-bf533.c b/board/cm-bf533/cm-bf533.c index a863195057..02ef076735 100644 --- a/board/cm-bf533/cm-bf533.c +++ b/board/cm-bf533/cm-bf533.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2008 Analog Devices Inc. * diff --git a/board/cm-bf537e/Makefile b/board/cm-bf537e/Makefile index be8056f4ba..317098cf2e 100644 --- a/board/cm-bf537e/Makefile +++ b/board/cm-bf537e/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/cm-bf537e/cm-bf537e.c b/board/cm-bf537e/cm-bf537e.c index 57c72a2c06..7e4cfc2116 100644 --- a/board/cm-bf537e/cm-bf537e.c +++ b/board/cm-bf537e/cm-bf537e.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/cm-bf537u/Makefile b/board/cm-bf537u/Makefile index 38dd3fbb21..835d5b73f0 100644 --- a/board/cm-bf537u/Makefile +++ b/board/cm-bf537u/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/cm-bf537u/cm-bf537u.c b/board/cm-bf537u/cm-bf537u.c index f365cdbeb7..aad72a9783 100644 --- a/board/cm-bf537u/cm-bf537u.c +++ b/board/cm-bf537u/cm-bf537u.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/cm-bf548/Makefile b/board/cm-bf548/Makefile index 98aca32b1f..1e11b8cdb1 100644 --- a/board/cm-bf548/Makefile +++ b/board/cm-bf548/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/cm-bf548/cm-bf548.c b/board/cm-bf548/cm-bf548.c index 90ce4c3eb7..d9d018bfbc 100644 --- a/board/cm-bf548/cm-bf548.c +++ b/board/cm-bf548/cm-bf548.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2008 Analog Devices Inc. * diff --git a/board/cm-bf561/Makefile b/board/cm-bf561/Makefile index c8764fb3ce..e0f0c34095 100644 --- a/board/cm-bf561/Makefile +++ b/board/cm-bf561/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/cm-bf561/cm-bf561.c b/board/cm-bf561/cm-bf561.c index 5741f64107..99b7eb2612 100644 --- a/board/cm-bf561/cm-bf561.c +++ b/board/cm-bf561/cm-bf561.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2008 Analog Devices Inc. * diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index cd992941aa..43931b0653 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -41,7 +41,7 @@ void pin_mux_mmc(void) } #endif -#ifdef CONFIG_LCD +#ifdef CONFIG_DM_VIDEO /* this is a weak define that we are overriding */ void pin_mux_display(void) { diff --git a/board/congatec/cgtqmx6eval/README b/board/congatec/cgtqmx6eval/README index f2c959949c..0777c781c2 100644 --- a/board/congatec/cgtqmx6eval/README +++ b/board/congatec/cgtqmx6eval/README @@ -3,10 +3,10 @@ U-Boot for the Congatec QMX6 boards This file contains information for the port of U-Boot to the Congatec QMX6 boards. -1. Building U-boot +1. Building U-Boot ------------------ -- Build U-boot for Congatec QMX6 boards: +- Build U-Boot for Congatec QMX6 boards: $ make mrproper $ make cgtqmx6eval_defconfig @@ -17,7 +17,7 @@ This will generate the following binaries: - SPL - u-boot.img -2. Flashing U-boot in the SPI NOR +2. Flashing U-Boot in the SPI NOR --------------------------------- Copy SPL and u-boot.img to the exported TFTP directory of the @@ -41,7 +41,7 @@ host PC (/tftpboot , for example). => sf write 0x12000000 0x10000 0x70000 -Reboot the board and the new U-boot should come up. +Reboot the board and the new U-Boot should come up. 3. Booting from the SD card --------------------------- @@ -64,9 +64,9 @@ command: => bmode esdhc4 -And then the U-boot from the big slot will boot. +And then the U-Boot from the big slot will boot. -Note: If the "bmode" command is not available from your pre-installed U-boot, +Note: If the "bmode" command is not available from your pre-installed U-Boot, these instruction will produce the same effect: => mw.l 0x20d8040 0x3850 diff --git a/board/denx/ma5d4evk/Kconfig b/board/denx/ma5d4evk/Kconfig new file mode 100644 index 0000000000..b4ef106532 --- /dev/null +++ b/board/denx/ma5d4evk/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MA5D4EVK + +config SYS_BOARD + default "ma5d4evk" + +config SYS_VENDOR + default "denx" + +config SYS_CONFIG_NAME + default "ma5d4evk" + +endif diff --git a/board/denx/ma5d4evk/MAINTAINERS b/board/denx/ma5d4evk/MAINTAINERS new file mode 100644 index 0000000000..bb25a9ca94 --- /dev/null +++ b/board/denx/ma5d4evk/MAINTAINERS @@ -0,0 +1,6 @@ +DENX MA5D4EVK BOARD +M: Marek Vasut <marek.vasut@gmail.com> +S: Maintained +F: board/denx/ma5d4evk/ +F: include/configs/ma5d4evk.h +F: configs/ma5d4evk_defconfig diff --git a/board/denx/ma5d4evk/Makefile b/board/denx/ma5d4evk/Makefile new file mode 100644 index 0000000000..b12b5dcbd4 --- /dev/null +++ b/board/denx/ma5d4evk/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2015 Marek Vasut <marex@denx.de> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ma5d4evk.o diff --git a/board/denx/ma5d4evk/ma5d4evk.c b/board/denx/ma5d4evk/ma5d4evk.c new file mode 100644 index 0000000000..ec0fa28f3e --- /dev/null +++ b/board/denx/ma5d4evk/ma5d4evk.c @@ -0,0 +1,412 @@ +/* + * Copyright (C) 2015 Marek Vasut <marex@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/atmel_mpddrc.h> +#include <asm/arch/atmel_usba_udc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/clk.h> +#include <asm/arch/sama5d3_smc.h> +#include <asm/arch/sama5d4.h> +#include <atmel_hlcdc.h> +#include <atmel_mci.h> +#include <lcd.h> +#include <mmc.h> +#include <net.h> +#include <netdev.h> +#include <spi.h> +#include <version.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_ATMEL_SPI +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + at91_set_pio_output(AT91_PIO_PORTC, 3, 0); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + at91_set_pio_output(AT91_PIO_PORTC, 3, 1); +} + +static void ma5d4evk_spi0_hw_init(void) +{ + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* SPI0_MISO */ + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* SPI0_MOSI */ + at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* SPI0_SPCK */ + + at91_set_pio_output(AT91_PIO_PORTC, 3, 1); /* SPI0_CS0 */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_SPI0); +} +#endif /* CONFIG_ATMEL_SPI */ + +#ifdef CONFIG_CMD_USB +static void ma5d4evk_usb_hw_init(void) +{ + at91_set_pio_output(AT91_PIO_PORTE, 11, 0); + at91_set_pio_output(AT91_PIO_PORTE, 14, 0); +} +#endif + +#ifdef CONFIG_LCD +vidinfo_t panel_info = { + .vl_col = 800, + .vl_row = 480, + .vl_clk = 33500000, + .vl_bpix = LCD_BPP, + .vl_tft = 1, + .vl_hsync_len = 10, + .vl_left_margin = 89, + .vl_right_margin = 164, + .vl_vsync_len = 10, + .vl_upper_margin = 23, + .vl_lower_margin = 10, + .mmio = ATMEL_BASE_LCDC, +}; + +/* No power up/down pin for the LCD pannel */ +void lcd_enable(void) { /* Empty! */ } +void lcd_disable(void) { /* Empty! */ } + +unsigned int has_lcdc(void) +{ + return 1; +} + +static void ma5d4evk_lcd_hw_init(void) +{ + at91_set_a_periph(AT91_PIO_PORTA, 24, 1); /* LCDPWM */ + at91_set_a_periph(AT91_PIO_PORTA, 25, 0); /* LCDDISP */ + at91_set_a_periph(AT91_PIO_PORTA, 26, 0); /* LCDVSYNC */ + at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* LCDHSYNC */ + at91_set_a_periph(AT91_PIO_PORTA, 28, 0); /* LCDDOTCK */ + at91_set_a_periph(AT91_PIO_PORTA, 29, 1); /* LCDDEN */ + + at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* LCDD0 */ + at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* LCDD1 */ + at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* LCDD2 */ + at91_set_a_periph(AT91_PIO_PORTA, 3, 0); /* LCDD3 */ + at91_set_a_periph(AT91_PIO_PORTA, 4, 0); /* LCDD4 */ + at91_set_a_periph(AT91_PIO_PORTA, 5, 0); /* LCDD5 */ + at91_set_a_periph(AT91_PIO_PORTA, 6, 0); /* LCDD6 */ + at91_set_a_periph(AT91_PIO_PORTA, 7, 0); /* LCDD7 */ + + at91_set_a_periph(AT91_PIO_PORTA, 8, 0); /* LCDD9 */ + at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* LCDD8 */ + at91_set_a_periph(AT91_PIO_PORTA, 10, 0); /* LCDD10 */ + at91_set_a_periph(AT91_PIO_PORTA, 11, 0); /* LCDD11 */ + at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* LCDD12 */ + at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* LCDD13 */ + at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* LCDD14 */ + at91_set_a_periph(AT91_PIO_PORTA, 15, 0); /* LCDD15 */ + + at91_set_a_periph(AT91_PIO_PORTA, 16, 0); /* LCDD16 */ + at91_set_a_periph(AT91_PIO_PORTA, 17, 0); /* LCDD17 */ + at91_set_a_periph(AT91_PIO_PORTA, 18, 0); /* LCDD18 */ + at91_set_a_periph(AT91_PIO_PORTA, 19, 0); /* LCDD19 */ + at91_set_a_periph(AT91_PIO_PORTA, 20, 0); /* LCDD20 */ + at91_set_a_periph(AT91_PIO_PORTA, 21, 0); /* LCDD21 */ + at91_set_a_periph(AT91_PIO_PORTA, 22, 0); /* LCDD22 */ + at91_set_a_periph(AT91_PIO_PORTA, 23, 0); /* LCDD23 */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_LCDC); +} + +#endif /* CONFIG_LCD */ + +#ifdef CONFIG_GENERIC_ATMEL_MCI +/* On-SoM eMMC */ +void ma5d4evk_mci0_hw_init(void) +{ + at91_set_b_periph(AT91_PIO_PORTC, 5, 1); /* MCI1 CDA */ + at91_set_b_periph(AT91_PIO_PORTC, 6, 1); /* MCI1 DA0 */ + at91_set_b_periph(AT91_PIO_PORTC, 7, 1); /* MCI1 DA1 */ + at91_set_b_periph(AT91_PIO_PORTC, 8, 1); /* MCI1 DA2 */ + at91_set_b_periph(AT91_PIO_PORTC, 9, 1); /* MCI1 DA3 */ + at91_set_b_periph(AT91_PIO_PORTC, 10, 1); /* MCI1 DA4 */ + at91_set_b_periph(AT91_PIO_PORTC, 11, 1); /* MCI1 DA5 */ + at91_set_b_periph(AT91_PIO_PORTC, 12, 1); /* MCI1 DA6 */ + at91_set_b_periph(AT91_PIO_PORTC, 13, 1); /* MCI1 DA7 */ + at91_set_b_periph(AT91_PIO_PORTC, 4, 0); /* MCI1 CLK */ + + /* + * As the mci io internal pull down is too strong, so if the io needs + * external pull up, the pull up resistor will be very small, if so + * the power consumption will increase, so disable the internal pull + * down to save the power. + */ + at91_set_pio_pulldown(AT91_PIO_PORTC, 5, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 6, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 7, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 8, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 9, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 10, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 11, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 12, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 13, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 4, 0); + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_MCI0); +} + +/* On-board MicroSD slot */ +void ma5d4evk_mci1_hw_init(void) +{ + at91_set_c_periph(AT91_PIO_PORTE, 19, 1); /* MCI1 CDA */ + at91_set_c_periph(AT91_PIO_PORTE, 20, 1); /* MCI1 DA0 */ + at91_set_c_periph(AT91_PIO_PORTE, 21, 1); /* MCI1 DA1 */ + at91_set_c_periph(AT91_PIO_PORTE, 22, 1); /* MCI1 DA2 */ + at91_set_c_periph(AT91_PIO_PORTE, 23, 1); /* MCI1 DA3 */ + at91_set_c_periph(AT91_PIO_PORTE, 18, 0); /* MCI1 CLK */ + + /* + * As the mci io internal pull down is too strong, so if the io needs + * external pull up, the pull up resistor will be very small, if so + * the power consumption will increase, so disable the internal pull + * down to save the power. + */ + at91_set_pio_pulldown(AT91_PIO_PORTE, 18, 0); + at91_set_pio_pulldown(AT91_PIO_PORTE, 19, 0); + at91_set_pio_pulldown(AT91_PIO_PORTE, 20, 0); + at91_set_pio_pulldown(AT91_PIO_PORTE, 21, 0); + at91_set_pio_pulldown(AT91_PIO_PORTE, 22, 0); + at91_set_pio_pulldown(AT91_PIO_PORTE, 23, 0); + + /* Deal with WP pin on the microSD slot. */ + at91_set_pio_output(AT91_PIO_PORTE, 16, 0); + at91_set_pio_pulldown(AT91_PIO_PORTE, 16, 1); + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_MCI1); +} + +int board_mmc_init(bd_t *bis) +{ + int ret; + + /* De-assert reset on On-SoM eMMC */ + at91_set_pio_output(AT91_PIO_PORTE, 15, 1); + at91_set_pio_pulldown(AT91_PIO_PORTE, 15, 0); + + ret = atmel_mci_init((void *)ATMEL_BASE_MCI0); + if (ret) /* eMMC init failed, skip it. */ + at91_set_pio_output(AT91_PIO_PORTE, 15, 0); + + /* Enable the power supply to On-board MicroSD */ + at91_set_pio_output(AT91_PIO_PORTE, 17, 0); + + ret = atmel_mci_init((void *)ATMEL_BASE_MCI1); + if (ret) /* uSD init failed, power it down. */ + at91_set_pio_output(AT91_PIO_PORTE, 17, 1); + + return 0; +} +#endif /* CONFIG_GENERIC_ATMEL_MCI */ + +#ifdef CONFIG_MACB +void ma5d4evk_macb0_hw_init(void) +{ + at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* ETXCK_EREFCK */ + at91_set_a_periph(AT91_PIO_PORTB, 6, 0); /* ERXDV */ + at91_set_a_periph(AT91_PIO_PORTB, 8, 0); /* ERX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* ERX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* ERXER */ + at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* ETXEN */ + at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* ETX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* ETX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 17, 0); /* EMDIO */ + at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* EMDC */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_GMAC0); +} +#endif + +static void ma5d4evk_serial_hw_init(void) +{ + /* USART0 */ + at91_set_a_periph(AT91_PIO_PORTD, 13, 1); /* TXD */ + at91_set_a_periph(AT91_PIO_PORTD, 12, 0); /* RXD */ + at91_set_a_periph(AT91_PIO_PORTD, 11, 0); /* RTS */ + at91_set_a_periph(AT91_PIO_PORTD, 10, 0); /* CTS */ + at91_periph_clk_enable(ATMEL_ID_USART0); + + /* USART1 */ + at91_set_a_periph(AT91_PIO_PORTD, 17, 1); /* TXD */ + at91_set_a_periph(AT91_PIO_PORTD, 16, 0); /* RXD */ + at91_set_a_periph(AT91_PIO_PORTD, 15, 0); /* RTS */ + at91_set_a_periph(AT91_PIO_PORTD, 14, 0); /* CTS */ + at91_periph_clk_enable(ATMEL_ID_USART1); +} + +int board_early_init_f(void) +{ + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); + at91_periph_clk_enable(ATMEL_ID_PIOD); + at91_periph_clk_enable(ATMEL_ID_PIOE); + + /* Configure LEDs as OFF */ + at91_set_pio_output(AT91_PIO_PORTD, 28, 0); + at91_set_pio_output(AT91_PIO_PORTD, 29, 0); + at91_set_pio_output(AT91_PIO_PORTD, 30, 0); + + /* Reset CAN controllers */ + at91_set_pio_output(AT91_PIO_PORTB, 21, 0); + udelay(100); + at91_set_pio_output(AT91_PIO_PORTB, 21, 1); + at91_set_pio_pulldown(AT91_PIO_PORTB, 21, 0); + + ma5d4evk_serial_hw_init(); + + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + +#ifdef CONFIG_ATMEL_SPI + ma5d4evk_spi0_hw_init(); +#endif +#ifdef CONFIG_GENERIC_ATMEL_MCI + ma5d4evk_mci0_hw_init(); + ma5d4evk_mci1_hw_init(); +#endif +#ifdef CONFIG_MACB + ma5d4evk_macb0_hw_init(); +#endif +#ifdef CONFIG_LCD + ma5d4evk_lcd_hw_init(); +#endif +#ifdef CONFIG_CMD_USB + ma5d4evk_usb_hw_init(); +#endif +#ifdef CONFIG_USB_GADGET_ATMEL_USBA + at91_udp_hw_init(); +#endif + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; + +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC0, 0x00); +#endif + +#ifdef CONFIG_USB_GADGET_ATMEL_USBA + usba_udc_probe(&pdata); +#ifdef CONFIG_USB_ETH_RNDIS + usb_eth_initialize(bis); +#endif +#endif + + return rc; +} + +/* SPL */ +#ifdef CONFIG_SPL_BUILD +void spl_board_init(void) +{ + ma5d4evk_spi0_hw_init(); +} + +static void ddr2_conf(struct atmel_mpddrc_config *ddr2) +{ + ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); + + ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | + ATMEL_MPDDRC_CR_NR_ROW_13 | + ATMEL_MPDDRC_CR_CAS_DDR_CAS3 | + ATMEL_MPDDRC_CR_NB_8BANKS | + ATMEL_MPDDRC_CR_NDQS_DISABLED | + ATMEL_MPDDRC_CR_DECOD_INTERLEAVED | + ATMEL_MPDDRC_CR_UNAL_SUPPORTED); + + ddr2->rtr = 0x2b0; + + ddr2->tpr0 = (8 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | + 3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET | + 3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | + 10 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | + 3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); + + ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | + 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET | + 25 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET | + 23 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET); + + ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | + 2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | + 3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET | + 2 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET | + 8 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET); +} + +void mem_init(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + struct atmel_mpddrc_config ddr2; + + ddr2_conf(&ddr2); + + /* enable MPDDR clock */ + at91_periph_clk_enable(ATMEL_ID_MPDDRC); + writel(AT91_PMC_DDR, &pmc->scer); + + /* DDRAM2 Controller initialize */ + ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); +} + +void at91_pmc_init(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + u32 tmp; + + tmp = AT91_PMC_PLLAR_29 | + AT91_PMC_PLLXR_PLLCOUNT(0x3f) | + AT91_PMC_PLLXR_MUL(87) | + AT91_PMC_PLLXR_DIV(1); + at91_plla_init(tmp); + + writel(0x0 << 8, &pmc->pllicpr); + + tmp = AT91_PMC_MCKR_H32MXDIV | + AT91_PMC_MCKR_PLLADIV_2 | + AT91_PMC_MCKR_MDIV_3 | + AT91_PMC_MCKR_CSS_PLLA; + at91_mck_init(tmp); +} +#endif diff --git a/board/dnp5370/Makefile b/board/dnp5370/Makefile index 865522fd6d..c0271da01b 100644 --- a/board/dnp5370/Makefile +++ b/board/dnp5370/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2007 Analog Device Inc. # diff --git a/board/dnp5370/dnp5370.c b/board/dnp5370/dnp5370.c index ae9ba84dc2..56e3b026af 100644 --- a/board/dnp5370/dnp5370.c +++ b/board/dnp5370/dnp5370.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * (C) Copyright 2010 3ality Digital Systems * diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c index 67d39844ac..2c8e978eb3 100644 --- a/board/egnite/ethernut5/ethernut5.c +++ b/board/egnite/ethernut5/ethernut5.c @@ -67,8 +67,8 @@ #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_spi.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <asm/io.h> #include <asm/gpio.h> @@ -151,12 +151,10 @@ static void ethernut5_nand_hw_init(void) */ int board_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); - /* Enable clocks for all PIOs */ - writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOC), - &pmc->pcer); /* Set adress of boot parameters. */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; /* Initialize UARTs and power management. */ @@ -179,10 +177,9 @@ int board_eth_init(bd_t *bis) { const char *devname; unsigned short mode; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - /* Enable on-chip EMAC clock. */ - writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC0); + /* Need to reset PHY via power management. */ ethernut5_phy_reset(); /* Set peripheral pins. */ @@ -211,10 +208,8 @@ int board_eth_init(bd_t *bis) #ifdef CONFIG_GENERIC_ATMEL_MCI int board_mmc_init(bd_t *bd) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + at91_periph_clk_enable(ATMEL_ID_MCI); - /* Enable MCI clock. */ - writel(1 << ATMEL_ID_MCI, &pmc->pcer); /* Initialize MCI hardware. */ at91_mci_hw_init(); /* Register the device. */ @@ -229,6 +224,7 @@ int board_mmc_getcd(struct mmc *mmc) #ifdef CONFIG_ATMEL_SPI /* + * Note, that u-boot uses different code for SPI bus access. While * memory routines use automatic chip select control, the serial * flash support requires 'manual' GPIO control. Thus, we switch diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index f8c746824a..ad7a8cfbb8 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -221,7 +221,7 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * ** RiOTboard : * mmc0 SDCard slot (bottom) * mmc1 uSDCard slot (top) diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index b7f9f90cde..fe781dcc92 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -87,9 +87,8 @@ static void meesc_nand_hw_init(void) #ifdef CONFIG_MACB static void meesc_macb_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; - /* Enable clock */ - writel(1 << ATMEL_ID_EMAC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC); + at91_macb_hw_init(); } #endif @@ -244,12 +243,10 @@ int misc_init_r(void) int board_early_init_f(void) { - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; - - /* enable all clocks */ - writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOCDE) | (1 << ATMEL_ID_UHP), - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOCDE); + at91_periph_clk_enable(ATMEL_ID_UHP); at91_seriald_hw_init(); diff --git a/board/freescale/b4860qds/eth_b4860qds.c b/board/freescale/b4860qds/eth_b4860qds.c index 4b2303e849..164ec0a47b 100644 --- a/board/freescale/b4860qds/eth_b4860qds.c +++ b/board/freescale/b4860qds/eth_b4860qds.c @@ -269,7 +269,7 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_DTSEC4, CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR); /* - * XFI does not need a PHY to work, but to make U-boot + * XFI does not need a PHY to work, but to make U-Boot * happy, assign a fake PHY address for a XFI port. */ fm_info_set_phy_address(FM1_10GEC1, 0); diff --git a/board/freescale/bsc9131rdb/README b/board/freescale/bsc9131rdb/README index 4902b98ba1..c8405970c1 100644 --- a/board/freescale/bsc9131rdb/README +++ b/board/freescale/bsc9131rdb/README @@ -86,9 +86,9 @@ Default Boot Method -------------------- NAND boot -Building U-boot +Building U-Boot -------------- -To build the u-boot for BSC9131RDB: +To build the U-Boot for BSC9131RDB: 1. NAND Flash with sysclk 66MHz(J16 on RDB closed, default) make BSC9131RDB_NAND 2. NAND Flash with sysclk 100MHz(J16 on RDB open) @@ -123,7 +123,7 @@ DDR Memory map Flashing Images --------------- -To place a new u-boot image in the NAND flash and then boot +To place a new U-Boot image in the NAND flash and then boot with that new image temporarily, use this: tftp 1000000 u-boot-nand.bin nand erase 0 100000 diff --git a/board/freescale/bsc9132qds/README b/board/freescale/bsc9132qds/README index f8377c9aa4..ede95d41da 100644 --- a/board/freescale/bsc9132qds/README +++ b/board/freescale/bsc9132qds/README @@ -87,9 +87,9 @@ Default Boot Method -------------------- NOR boot -Building U-boot +Building U-Boot -------------- -To build the u-boot for BSC9132QDS: +To build the U-Boot for BSC9132QDS: 1. NOR Flash make BSC9132QDS_NOR_DDRCLK100 : For 100MHZ DDR CLK make BSC9132QDS_NOR_DDRCLK133 : For 133MHZ DDR CLK @@ -122,7 +122,7 @@ Memory map Flashing Images --------------- -To place a new u-boot image in the NAND flash and then boot +To place a new U-Boot image in the NAND flash and then boot with that new image temporarily, use this: tftp 1000000 u-boot-nand.bin nand erase 0 100000 diff --git a/board/freescale/c29xpcie/README b/board/freescale/c29xpcie/README index 3bc396b35a..2e249cbb3a 100644 --- a/board/freescale/c29xpcie/README +++ b/board/freescale/c29xpcie/README @@ -53,7 +53,7 @@ Settings of DIP-switch SW5[1:4]= 0110 and SW5[6]=0 for boot from SPI flash Note: 1 stands for 'off', 0 stands for 'on' -Build and program u-boot to NOR flash +Build and program U-Boot to NOR flash ================================== 1. Build u-boot.bin image example: export ARCH=powerpc @@ -86,7 +86,7 @@ There are four banks in C29XPCIE board, example to change bank booting: - bank 4 on the flash 0x3000000~0x3ffffff or set SW5[7]= ON/OFF and SW5[7]= ON/OFF, then power on again. -Build and program u-boot to SPI flash +Build and program U-Boot to SPI flash ================================== 1. Build u-boot-spi.bin image make C29xPCIE_SPIFLASH_config; make diff --git a/board/freescale/ls2080a/README b/board/freescale/ls2080a/README index 7e53f1f1e4..646cc02693 100644 --- a/board/freescale/ls2080a/README +++ b/board/freescale/ls2080a/README @@ -12,7 +12,7 @@ Memory map from core's view 0x05_1000_0000 .. 0x05_FFFF_FFFF IFC region #2 0x80_8000_0000 .. 0xFF_FFFF_FFFF DDR region #2 -Other addresses are either reserved, or not used directly by u-boot. +Other addresses are either reserved, or not used directly by U-Boot. This list should be updated when more addresses are used. Booting Linux flavors which do not support 48-bit VA (< Linux 3.18) diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index 375e97c9b0..6ddad92f2c 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -103,7 +103,7 @@ Memory map from core's view 0x05_1000_0000 .. 0x05_FFFF_FFFF IFC region #2 0x80_8000_0000 .. 0xFF_FFFF_FFFF DDR region #2 -Other addresses are either reserved, or not used directly by u-boot. +Other addresses are either reserved, or not used directly by U-Boot. This list should be updated when more addresses are used. IFC region map from core's view diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c index ebc9d47468..42ff74317e 100644 --- a/board/freescale/ls2080aqds/eth.c +++ b/board/freescale/ls2080aqds/eth.c @@ -716,7 +716,7 @@ void ls2080a_handle_phy_interface_xsgmii(int i) switch (serdes1_prtcl) { case 0x2A: /* - * XFI does not need a PHY to work, but to avoid U-boot use + * XFI does not need a PHY to work, but to avoid U-Boot use * default PHY address which is zero to a MAC when it found * a MAC has no PHY address, we give a PHY address to XFI * MAC, and should not use a real XAUI PHY address, since diff --git a/board/freescale/ls2080ardb/README b/board/freescale/ls2080ardb/README index 7fc2569648..6708ca9cc7 100644 --- a/board/freescale/ls2080ardb/README +++ b/board/freescale/ls2080ardb/README @@ -87,7 +87,7 @@ Memory map from core's view 0x05_1000_0000 .. 0x05_FFFF_FFFF IFC region #2 0x80_8000_0000 .. 0xFF_FFFF_FFFF DDR region #2 -Other addresses are either reserved, or not used directly by u-boot. +Other addresses are either reserved, or not used directly by U-Boot. This list should be updated when more addresses are used. IFC region map from core's view diff --git a/board/freescale/m52277evb/README b/board/freescale/m52277evb/README index 3178d49d0a..92a83849ac 100644 --- a/board/freescale/m52277evb/README +++ b/board/freescale/m52277evb/README @@ -49,7 +49,7 @@ Changed files: - include/asm-m68k/timer.h Timer structure and definition - include/asm-m68k/types.h Data types definition - include/asm-m68k/uart.h Uart structure and definition -- include/asm-m68k/u-boot.h u-boot structure +- include/asm-m68k/u-boot.h U-Boot structure - include/configs/M52277EVB.h Board specific configuration file @@ -77,7 +77,7 @@ CONFIG_MCFRTC -- define to use common CF RTC driver CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency RTC_DEBUG -- define to show RTC debug message -CONFIG_CMD_DATE -- enable to use date feature in u-boot +CONFIG_CMD_DATE -- enable to use date feature in U-Boot CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer @@ -102,7 +102,7 @@ CONFIG_SYS_CSn_CTRL -- defines the Chip Select Control register CONFIG_SYS_SDRAM_BASE -- defines the DRAM Base -CONFIG_LCD and CONFIG_CMD_USB are not supported in this current u-boot, +CONFIG_LCD and CONFIG_CMD_USB are not supported in this current U-Boot, update will be provided at later time 2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL @@ -113,7 +113,7 @@ update will be provided at later time SRAM: 0x80000000-0x8FFFFFFF (256MB) IP: 0xF0000000-0xFFFFFFFF (256MB) -2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and +2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and linux kernel, you can customize it based on your system requirements: Flash0: 0x00000000-0x00FFFFFF (16MB) diff --git a/board/freescale/m5253evbe/README b/board/freescale/m5253evbe/README index f51609f3e0..2ed5c768d5 100644 --- a/board/freescale/m5253evbe/README +++ b/board/freescale/m5253evbe/README @@ -13,7 +13,7 @@ Created 06/05/2007 2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL =========================================== -2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and +2.1. For the initial bringup, we adopted a consistent memory scheme between U-Boot and linux kernel, you can customize it based on your system requirements: SDR: 0x00000000-0x00ffffff SRAM0: 0x20010000-0x20017fff diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README index 84fc1ecfb1..224e79c46a 100644 --- a/board/freescale/m53017evb/README +++ b/board/freescale/m53017evb/README @@ -47,7 +47,7 @@ Changed files: - include/asm-m68k/timer.h Timer structure and definition - include/asm-m68k/types.h Data types definition - include/asm-m68k/uart.h Uart structure and definition -- include/asm-m68k/u-boot.h u-boot structure +- include/asm-m68k/u-boot.h U-Boot structure - include/configs/M53017EVB.h Board specific configuration file @@ -75,7 +75,7 @@ CONFIG_MCFRTC -- define to use common CF RTC driver CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency RTC_DEBUG -- define to show RTC debug message -CONFIG_CMD_DATE -- enable to use date feature in u-boot +CONFIG_CMD_DATE -- enable to use date feature in U-Boot CONFIG_MCFFEC -- define to use common CF FEC driver CONFIG_MII -- enable to use MII driver @@ -118,7 +118,7 @@ CONFIG_SYS_SDRAM_BASE -- defines the DRAM Base SRAM: 0x80000000-0x8FFFFFFF (256MB) IP: 0xFC000000-0xFFFFFFFF (256MB) -2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and +2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and linux kernel, you can customize it based on your system requirements: Flash0: 0x00000000-0x00FFFFFF (16MB) DDR: 0x40000000-0x4FFFFFFF (256MB) diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README index 52eac7b2ff..582e0c3d9e 100644 --- a/board/freescale/m5373evb/README +++ b/board/freescale/m5373evb/README @@ -46,7 +46,7 @@ Changed files: - include/asm-m68k/timer.h Timer structure and definition - include/asm-m68k/types.h Data types definition - include/asm-m68k/uart.h Uart structure and definition -- include/asm-m68k/u-boot.h u-boot structure +- include/asm-m68k/u-boot.h U-Boot structure - include/configs/M5373EVB.h Board specific configuration file @@ -74,7 +74,7 @@ CONFIG_MCFRTC -- define to use common CF RTC driver CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency RTC_DEBUG -- define to show RTC debug message -CONFIG_CMD_DATE -- enable to use date feature in u-boot +CONFIG_CMD_DATE -- enable to use date feature in U-Boot CONFIG_MCFFEC -- define to use common CF FEC driver CONFIG_MII -- enable to use MII driver @@ -117,7 +117,7 @@ CONFIG_SYS_SDRAM_BASE -- defines the DRAM Base SRAM: 0x80000000-0x8FFFFFFF (256MB) IP: 0xF0000000-0xFFFFFFFF (256MB) -2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and +2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and linux kernel, you can customize it based on your system requirements: Flash0: 0x00000000-0x00FFFFFF (16MB) diff --git a/board/freescale/m54455evb/README b/board/freescale/m54455evb/README index c70c4c5c25..c563ad99a7 100644 --- a/board/freescale/m54455evb/README +++ b/board/freescale/m54455evb/README @@ -48,7 +48,7 @@ Changed files: - include/asm-m68k/timer.h Timer structure and definition - include/asm-m68k/types.h Data types definition - include/asm-m68k/uart.h Uart structure and definition -- include/asm-m68k/u-boot.h u-boot structure +- include/asm-m68k/u-boot.h U-Boot structure - include/configs/M54455EVB.h Board specific configuration file @@ -78,7 +78,7 @@ CONFIG_MCFRTC -- define to use common CF RTC driver CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency RTC_DEBUG -- define to show RTC debug message -CONFIG_CMD_DATE -- enable to use date feature in u-boot +CONFIG_CMD_DATE -- enable to use date feature in U-Boot CONFIG_MCFFEC -- define to use common CF FEC driver CONFIG_MII -- enable to use MII driver @@ -91,7 +91,7 @@ CONFIG_SYS_FEC1_PINMUX -- Set FEC1 Pin configuration CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register CONFIG_SYS_FEC1_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop -CONFIG_HAS_ETH1 -- define to enable second FEC in u-boot +CONFIG_HAS_ETH1 -- define to enable second FEC in U-Boot CONFIG_ISO_PARTITION -- enable ISO read/write CONFIG_DOS_PARTITION -- enable DOS read/write @@ -136,7 +136,7 @@ CONFIG_EXTRA_CLOCK -- Enable extra clock such as vco, flexbus, pci, etc CONFIG_SYS_MBAR -- define MBAR offset -CONFIG_SYS_ATMEL_BOOT -- To determine the u-boot is booted from Atmel or Intel +CONFIG_SYS_ATMEL_BOOT -- To determine the U-Boot is booted from Atmel or Intel CONFIG_MONITOR_IS_IN_RAM -- Not support @@ -163,7 +163,7 @@ CONFIG_SYS_SDRAM_BASE1 -- defines the DRAM Base 1 FlexBus: 0xC0000000-0xDFFFFFFF (512MB) IP: 0xF0000000-0xFFFFFFFF (256MB) -2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and +2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and linux kernel, you can customize it based on your system requirements: Atmel boot: Flash0: 0x00000000-0x0007FFFF (512KB) diff --git a/board/freescale/m547xevb/README b/board/freescale/m547xevb/README index ce497c0d2a..30c5dedafe 100644 --- a/board/freescale/m547xevb/README +++ b/board/freescale/m547xevb/README @@ -54,7 +54,7 @@ Changed files: - include/asm-m68k/timer.h Timer structure and definition - include/asm-m68k/types.h Data types definition - include/asm-m68k/uart.h Uart structure and definition -- include/asm-m68k/u-boot.h u-boot structure +- include/asm-m68k/u-boot.h U-Boot structure - include/configs/M5475EVB.h Board specific configuration file @@ -88,7 +88,7 @@ CONFIG_SYS_FEC1_PINMUX -- Set FEC1 Pin configuration CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register CONFIG_SYS_FEC1_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop -CONFIG_HAS_ETH1 -- define to enable second FEC in u-boot +CONFIG_HAS_ETH1 -- define to enable second FEC in U-Boot CONFIG_CMD_USB -- enable USB commands CONFIG_USB_OHCI_NEW -- enable USB OHCI driver diff --git a/board/freescale/mpc8313erdb/README b/board/freescale/mpc8313erdb/README index be7ef32b45..697cee4c42 100644 --- a/board/freescale/mpc8313erdb/README +++ b/board/freescale/mpc8313erdb/README @@ -70,7 +70,7 @@ Freescale MPC8313ERDB Board 5. Downloading and Flashing Images -5.1 Reflash U-boot Image using U-boot +5.1 Reflash U-Boot Image using U-Boot NOR flash: @@ -81,7 +81,7 @@ Freescale MPC8313ERDB Board first, to make sure that the TFTP load will succeed before it goes ahead and wipes out your current firmware. And of course, have an alternate means of programming the flash available - if the new u-boot doesn't boot. + if the new U-Boot doesn't boot. NAND flash: diff --git a/board/freescale/mpc8315erdb/README b/board/freescale/mpc8315erdb/README index b32132d053..8ad6d810c7 100644 --- a/board/freescale/mpc8315erdb/README +++ b/board/freescale/mpc8315erdb/README @@ -63,7 +63,7 @@ Freescale MPC8315ERDB Board 5. Downloading and Flashing Images -5.1 Reflash U-boot Image using U-boot +5.1 Reflash U-Boot Image using U-Boot NOR flash: diff --git a/board/freescale/mpc8323erdb/README b/board/freescale/mpc8323erdb/README index 6f89829373..9a46da0781 100644 --- a/board/freescale/mpc8323erdb/README +++ b/board/freescale/mpc8323erdb/README @@ -22,10 +22,10 @@ Freescale MPC8323ERDB Board 3. Downloading and Flashing Images -3.1 Reflash U-boot Image using U-boot +3.1 Reflash U-Boot Image using U-Boot N.b, have an alternate means of programming - the flash available if the new u-boot doesn't boot. + the flash available if the new U-Boot doesn't boot. First try a: @@ -44,7 +44,7 @@ Freescale MPC8323ERDB Board erase fe000000 +$filesize cp.b $loadaddr fe000000 $filesize - To keep your old u-boot's environment variables, do a: + To keep your old U-Boot's environment variables, do a: saveenv diff --git a/board/freescale/mpc832xemds/README b/board/freescale/mpc832xemds/README index 4142aa9c8d..d141cd33e7 100644 --- a/board/freescale/mpc832xemds/README +++ b/board/freescale/mpc832xemds/README @@ -97,7 +97,7 @@ Freescale MPC832XEMDS Board make MPC832XEMDS_config make - MPC832x support PCI 33MHz and PCI 66MHz, to make u-boot support PCI: + MPC832x support PCI 33MHz and PCI 66MHz, to make U-Boot support PCI: 1)Make sure the DIP SW support PCI mode as described in Section 1.1. @@ -113,7 +113,7 @@ Freescale MPC832XEMDS Board tftp 10000 u-boot.bin -5.1 Reflash U-boot Image using U-boot +5.1 Reflash U-Boot Image using U-Boot tftp 20000 u-boot.bin protect off fe000000 fe0fffff diff --git a/board/freescale/mpc837xemds/README b/board/freescale/mpc837xemds/README index faf21c9ffb..dbb15171e6 100644 --- a/board/freescale/mpc837xemds/README +++ b/board/freescale/mpc837xemds/README @@ -90,7 +90,7 @@ Freescale MPC837xEMDS Board tftp 40000 u-boot.bin -5.1 Reflash U-boot Image using U-boot +5.1 Reflash U-Boot Image using U-Boot tftp 40000 u-boot.bin protect off fe000000 fe1fffff diff --git a/board/freescale/mpc837xerdb/README b/board/freescale/mpc837xerdb/README index cfb6efa27e..12df2f2e75 100644 --- a/board/freescale/mpc837xerdb/README +++ b/board/freescale/mpc837xerdb/README @@ -84,7 +84,7 @@ Freescale MPC837xE-RDB Board tftp $loadaddr u-boot.bin -5.1 Reflash U-boot Image using U-boot +5.1 Reflash U-Boot Image using U-Boot tftp $loadaddr u-boot.bin protect off fe000000 fe0fffff diff --git a/board/freescale/mpc8569mds/README b/board/freescale/mpc8569mds/README index 3d12a964cd..86c3ccde79 100644 --- a/board/freescale/mpc8569mds/README +++ b/board/freescale/mpc8569mds/README @@ -3,7 +3,7 @@ Overview MPC8569MDS is composed of two boards - PB (Processor Board) and PIB (Platform I/O Board). The mpc8569 PowerTM processor is mounted on PB board. -Building U-boot +Building U-Boot ----------- make MPC8569MDS_config make @@ -22,10 +22,10 @@ Memory Map 0xfe00_0000 0xffff_ffff Flash 32MB -Flashing u-boot Images +Flashing U-Boot Images --------------- -Use the following commands to program u-boot image into flash: +Use the following commands to program U-Boot image into flash: => tftp 1000000 u-boot.bin => protect off all diff --git a/board/freescale/mpc8572ds/README b/board/freescale/mpc8572ds/README index 57fd2ad616..f1ffdd1730 100644 --- a/board/freescale/mpc8572ds/README +++ b/board/freescale/mpc8572ds/README @@ -3,7 +3,7 @@ Overview MPC8572DS is a high-performance computing, evaluation and development platform supporting the mpc8572 PowerTM processor. -Building U-boot +Building U-Boot ----------- make MPC8572DS_config make @@ -22,14 +22,14 @@ Memory Map 0xe800_0000 - 0xebff_ffff Alternate bank 64MB 0xec00_0000 - 0xefff_ffff Boot bank 64MB -0xebf8_0000 - 0xebff_ffff Alternate u-boot address 512KB -0xeff8_0000 - 0xefff_ffff Boot u-boot address 512KB +0xebf8_0000 - 0xebff_ffff Alternate U-Boot address 512KB +0xeff8_0000 - 0xefff_ffff Boot U-Boot address 512KB Flashing Images --------------- -To place a new u-boot image in the alternate flash bank and then reset with that +To place a new U-Boot image in the alternate flash bank and then reset with that new image temporarily, use this: tftp 1000000 u-boot.bin @@ -135,7 +135,7 @@ Implementing AMP(Asymmetric MultiProcessing) 5. Bring up two cores separately: - a. Power on the board, under u-boot prompt: + a. Power on the board, under U-Boot prompt: => setenv <serverip> => setenv <ipaddr> => setenv bootargs root=/dev/ram rw console=ttyS0,115200 @@ -154,7 +154,7 @@ Implementing AMP(Asymmetric MultiProcessing) => fdt chosen $initrd_start $initrd_end => bootm prep => cpu 1 release $bootm_low - $fdtaddr - - c. Bring up core0's kernel(on the same u-boot console): + c. Bring up core0's kernel(on the same U-Boot console): => setenv bootm_low 0 => setenv bootm_size 0x20000000 => tftp 1000000 8572/uImage.core0 @@ -162,5 +162,5 @@ Implementing AMP(Asymmetric MultiProcessing) => tftp c00000 8572/mpc8572ds_core0.dtb => bootm 1000000 2000000 c00000 -Please note only core0 will run u-boot, core1 starts kernel directly after +Please note only core0 will run U-Boot, core1 starts kernel directly after "cpu release" command is issued. diff --git a/board/freescale/mpc8610hpcd/README b/board/freescale/mpc8610hpcd/README index 31a9af3fee..066e625d48 100644 --- a/board/freescale/mpc8610hpcd/README +++ b/board/freescale/mpc8610hpcd/README @@ -27,7 +27,7 @@ To Flash U-Boot into the booting bank: cp.b 1000000 fff00000 $filesize -To Flash U-boot into the alternate bank +To Flash U-Boot into the alternate bank tftp 1000000 u-boot.bin erase fbf00000 +$filesize diff --git a/board/freescale/mpc8641hpcn/README b/board/freescale/mpc8641hpcn/README index d8fe0a4a13..77909a8383 100644 --- a/board/freescale/mpc8641hpcn/README +++ b/board/freescale/mpc8641hpcn/README @@ -80,7 +80,7 @@ Switches: 3. Flash U-Boot --------------- The flash range 0xEF800000 to 0xEFFFFFFF can be divided into 2 halves. -It is possible to use either half to boot using u-boot. Switch 5 bit 2 +It is possible to use either half to boot using U-Boot. Switch 5 bit 2 is used for this purpose. 0xEF800000 to 0xEFBFFFFF - 4MB @@ -102,7 +102,7 @@ To Flash U-Boot into the booting bank (0xEFC00000 - 0xEFFFFFFF): or use tftpflash command: run tftpflash -To Flash U-boot into the alternative bank (0xEF800000 - 0xEFBFFFFF): +To Flash U-Boot into the alternative bank (0xEF800000 - 0xEFBFFFFF): tftp 1000000 u-boot.bin erase efb00000 +$filesize @@ -113,7 +113,7 @@ To Flash U-boot into the alternative bank (0xEF800000 - 0xEFBFFFFF): ------------- NOTE: RIO and PCI are mutually exclusive, so they share an address -For 32-bit u-boot, devices are mapped so that the virtual address == +For 32-bit U-Boot, devices are mapped so that the virtual address == the physical address, and the map looks liks this: Memory Range Device Size @@ -130,7 +130,7 @@ the physical address, and the map looks liks this: 0xffc1_0000 0xffc1_ffff PCI2/PEX2 IO 64K 0xef80_0000 0xefff_ffff Flash 8M -For 36-bit-enabled u-boot, the virtual map is the same as for 32-bit. +For 36-bit-enabled U-Boot, the virtual map is the same as for 32-bit. However, the physical map is altered to reside in 36-bit space, as follows. Addresses are no longer mapped with VA == PA. All accesses from software use the VA; the PA is only used for setting up windows diff --git a/board/freescale/mx28evk/README b/board/freescale/mx28evk/README index f9d6324114..a248fb21df 100644 --- a/board/freescale/mx28evk/README +++ b/board/freescale/mx28evk/README @@ -1,7 +1,7 @@ FREESCALE MX28EVK ================== -Supported hardware: MX28EVK rev C and D are supported in U-boot. +Supported hardware: MX28EVK rev C and D are supported in U-Boot. Files of the MX28EVK port -------------------------- diff --git a/board/freescale/mx35pdk/README b/board/freescale/mx35pdk/README index 7232b53357..6f6841f099 100644 --- a/board/freescale/mx35pdk/README +++ b/board/freescale/mx35pdk/README @@ -71,7 +71,7 @@ exec -c "noinitrd console=ttymxc0,115200 root=/dev/nfsroot rootfstype=nfsroot nf Flashing U-Boot -------------------------------- -U-boot should be stored on the NOR flash. +U-Boot should be stored on the NOR flash. The boot storage can be select using the switches on the personality board (SW1-SW2) and on the DEBUG board (SW4-SW10). @@ -96,7 +96,7 @@ Creating 6 MTD partitions on "mxc_nor_flash.0": To erase the whole partition: $ flash_eraseall /dev/mtd0 -Writing u-boot: +Writing U-Boot: dd if=u-boot.bin of=/dev/mtd0 To boot from NOR, you have to select the switches as follows: diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 46b4f3f68e..e9d9664a82 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -268,7 +268,7 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 SD2 * mmc1 SD3 * mmc2 eMMC diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index df205eac6f..4f816c4c02 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -202,7 +202,7 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 USDHC1 * mmc1 USDHC2 * mmc2 USDHC3 diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c index c9631d2578..a240982975 100644 --- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c @@ -339,7 +339,7 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 USDHC3 * mmc1 USDHC4 */ diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 97e9ed7df6..41319c66d2 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -348,7 +348,7 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 USDHC2 * mmc1 USDHC3 * mmc2 USDHC4 diff --git a/board/freescale/mx6ul_14x14_evk/README b/board/freescale/mx6ul_14x14_evk/README index d48c7ba20f..1edccf688c 100644 --- a/board/freescale/mx6ul_14x14_evk/README +++ b/board/freescale/mx6ul_14x14_evk/README @@ -1,7 +1,7 @@ -How to use U-boot on Freescale MX6UL 14x14 EVK +How to use U-Boot on Freescale MX6UL 14x14 EVK ----------------------------------------------- -- Build U-boot for MX6UL 14x14 EVK: +- Build U-Boot for MX6UL 14x14 EVK: $ make mrproper $ make mx6ul_14x14_evk_defconfig @@ -28,5 +28,5 @@ switch label numbers reference). - Connect the USB cable between the EVK and the PC for the console. (The USB console connector is the one close the push buttons) -- Insert the micro SD card in the board, power it up and U-boot messages should +- Insert the micro SD card in the board, power it up and U-Boot messages should come up. diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index b9b35736cf..98d5675ff1 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -394,7 +394,7 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 USDHC1 * mmc1 USDHC2 */ diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index 782acc6713..4d0b195798 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -375,7 +375,7 @@ int board_mmc_init(bd_t *bis) int i, ret; /* * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 USDHC1 * mmc2 USDHC3 (eMMC) */ diff --git a/board/freescale/p1010rdb/README.P1010RDB-PA b/board/freescale/p1010rdb/README.P1010RDB-PA index cde246dde2..105942f7a5 100644 --- a/board/freescale/p1010rdb/README.P1010RDB-PA +++ b/board/freescale/p1010rdb/README.P1010RDB-PA @@ -95,7 +95,7 @@ is set to spi-flash instead of to SLIC/TDM/DAC and tdm_can_sel is set to TDM instead of to CAN/UART1. -Build and burn u-boot to NOR flash +Build and burn U-Boot to NOR flash ================================== 1. Build u-boot.bin image export ARCH=powerpc @@ -131,7 +131,7 @@ CPLD NOR bank selection register address 0xFFB00009 Bit[0]: 1 - boot from lower 4 sectors -Build and burn u-boot to NAND flash +Build and burn U-Boot to NAND flash =================================== 1. Build u-boot.bin image export ARCH=powerpc @@ -146,7 +146,7 @@ Build and burn u-boot to NAND flash 3. Check SW4[1:4]= 1000 and SW6[4]=1, then power on. -Build and burn u-boot to SPI flash +Build and burn U-Boot to SPI flash ================================== 1. Build u-boot-spi.bin image make P1010RDB_SPIFLASH_config; make diff --git a/board/freescale/p1010rdb/README.P1010RDB-PB b/board/freescale/p1010rdb/README.P1010RDB-PB index c5d1419445..dc82f0df09 100644 --- a/board/freescale/p1010rdb/README.P1010RDB-PB +++ b/board/freescale/p1010rdb/README.P1010RDB-PB @@ -112,14 +112,14 @@ To enable FlexCAN: To enable SDHC in case of NOR/NAND/SPI boot a) For temporary use case in runtime without reboot system - run 'mux sdhc' in u-boot to validate SDHC with invalidating IFC. + run 'mux sdhc' in U-Boot to validate SDHC with invalidating IFC. b) For long-term use case set 'esdhc' in hwconfig and save it. To enable IFC in case of SD boot a) For temporary use case in runtime without reboot system - run 'mux ifc' in u-boot to validate IFC with invalidating SDHC. + run 'mux ifc' in U-Boot to validate IFC with invalidating SDHC. b) For long-term use case set 'ifc' in hwconfig and save it. diff --git a/board/freescale/t102xqds/README b/board/freescale/t102xqds/README index bb0f2805dc..c00e3bafbe 100644 --- a/board/freescale/t102xqds/README +++ b/board/freescale/t102xqds/README @@ -172,16 +172,16 @@ Start Address End Address Description Size 128MB NOR Flash memory Map -------------------------- Start Address End Address Definition Max size -0xEFF40000 0xEFFFFFFF u-boot (current bank) 768KB -0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB +0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB +0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB 0xEFE00000 0xEFE3FFFF QE firmware (current bank) 256KB 0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB 0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB 0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB 0xEC000000 0xEC01FFFF RCW (alt bank) 128KB -0xEBF40000 0xEBFFFFFF u-boot (alt bank) 768KB -0xEBF20000 0xEBF3FFFF u-boot env (alt bank) 128KB +0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB +0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB 0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB 0xEBE00000 0xEBE3FFFF QE firmware (alt bank) 256KB 0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB @@ -221,11 +221,11 @@ Software configurations and board settings Switching between default bank0 and alternate bank4 on NOR flash To change boot source to vbank4: - via software: run command 'qixis_reset altbank' in u-boot. + via software: run command 'qixis_reset altbank' in U-Boot. via DIP-switch: set SW6[1:4] = '0100' To change boot source to vbank0: - via software: run command 'qixis_reset' in u-boot. + via software: run command 'qixis_reset' in U-Boot. via DIP-Switch: set SW6[1:4] = '0000' 2. NAND Boot: @@ -273,8 +273,8 @@ e) For SDXC: set adaptor=sdxc in hwconfig ------------------------------- PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM. SPL further initializes DDR using SPD and environment variables -and copy u-boot(768 KB) from NAND/SPI/SD device to DDR. -Finally SPL transers control to u-boot for futher booting. +and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR. +Finally SPL transers control to U-Boot for futher booting. SPL has following features: - Executes within 256K @@ -294,14 +294,14 @@ Run time view of SPL framework ------------------------------------------------- |STACK | 0xFFFD8000 (22KB) | ------------------------------------------------- -|U-boot SPL | 0xFFFD8000 (160KB) | +|U-Boot SPL | 0xFFFD8000 (160KB) | ------------------------------------------------- NAND Flash memory Map on T1024QDS ------------------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot 1MB -0x100000 0x15FFFF u-boot env 8KB +0x000000 0x0FFFFF U-Boot 1MB +0x100000 0x15FFFF U-Boot env 8KB 0x160000 0x17FFFF FMAN Ucode 128KB 0x180000 0x19FFFF QE Firmware 128KB @@ -309,8 +309,8 @@ Start End Definition Size SD Card memory Map on T1024QDS ---------------------------------------------------- Block #blocks Definition Size -0x008 2048 u-boot img 1MB -0x800 0016 u-boot env 8KB +0x008 2048 U-Boot img 1MB +0x800 0016 U-Boot env 8KB 0x820 0256 FMAN Ucode 128KB 0x920 0256 QE Firmware 128KB @@ -318,8 +318,8 @@ Block #blocks Definition Size SPI Flash memory Map on T1024QDS ---------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot img 1MB -0x100000 0x101FFF u-boot env 8KB +0x000000 0x0FFFFF U-Boot img 1MB +0x100000 0x101FFF U-Boot env 8KB 0x110000 0x12FFFF FMAN Ucode 128KB 0x130000 0x14FFFF QE Firmware 128KB diff --git a/board/freescale/t102xqds/eth_t102xqds.c b/board/freescale/t102xqds/eth_t102xqds.c index ca54e2a4f0..19543c0738 100644 --- a/board/freescale/t102xqds/eth_t102xqds.c +++ b/board/freescale/t102xqds/eth_t102xqds.c @@ -310,7 +310,7 @@ int board_eth_init(bd_t *bis) case 0x95: case 0x99: /* - * XFI does not need a PHY to work, but to avoid U-boot use + * XFI does not need a PHY to work, but to avoid U-Boot use * default PHY address which is zero to a MAC when it found * a MAC has no PHY address, we give a PHY address to XFI * MAC, and should not use a real XAUI PHY address, since diff --git a/board/freescale/t102xrdb/README b/board/freescale/t102xrdb/README index 7d3794a6d6..a0af25a432 100644 --- a/board/freescale/t102xrdb/README +++ b/board/freescale/t102xrdb/README @@ -145,8 +145,8 @@ Start Address End Address Description Size 128MB NOR Flash Memory Layout ----------------------------- Start Address End Address Definition Max size -0xEFF40000 0xEFFFFFFF u-boot (current bank) 768KB -0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB +0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB +0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB 0xEFE00000 0xEFE3FFFF QE firmware (current bank) 256KB 0xED300000 0xEFDFFFFF rootfs (alt bank) 44MB @@ -158,8 +158,8 @@ Start Address End Address Definition Max size 0xEC700000 0xEC7FFFFF HV.uImage (alternate bank) 1MB 0xEC020000 0xEC6FFFFF Linux.uImage (alt bank) ~7MB 0xEC000000 0xEC01FFFF RCW (alt bank) 128KB -0xEBF40000 0xEBFFFFFF u-boot (alt bank) 768KB -0xEBF20000 0xEBF3FFFF u-boot env (alt bank) 128KB +0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB +0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB 0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB 0xEBE00000 0xEBE3FFFF QE firmware (alt bank) 256KB 0xE9300000 0xEBDFFFFF rootfs (current bank) 44MB @@ -198,18 +198,18 @@ Software configurations and board settings Switching between default bank0 and alternate bank4 on NOR flash To change boot source to vbank4: on T1024RDB: - via software: run command 'cpld reset altbank' in u-boot. + via software: run command 'cpld reset altbank' in U-Boot. via DIP-switch: set SW3[5:7] = '100' on T1023RDB: - via software: run command 'switch bank4' in u-boot. + via software: run command 'switch bank4' in U-Boot. via DIP-switch: set SW3[5:7] = '100' To change boot source to vbank0: on T1024RDB: - via software: run command 'cpld reset' in u-boot. + via software: run command 'cpld reset' in U-Boot. via DIP-Switch: set SW3[5:7] = '000' on T1023RDB: - via software: run command 'switch bank0' in u-boot. + via software: run command 'switch bank0' in U-Boot. via DIP-switch: set SW3[5:7] = '000' 2. NAND Boot: @@ -255,8 +255,8 @@ Software configurations and board settings ------------------------------- PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM. SPL further initializes DDR using SPD and environment variables -and copy u-boot(768 KB) from NAND/SPI/SD device to DDR. -Finally SPL transers control to u-boot for futher booting. +and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR. +Finally SPL transers control to U-Boot for futher booting. SPL has following features: - Executes within 256K @@ -276,14 +276,14 @@ Run time view of SPL framework ------------------------------------------------- |STACK | 0xFFFD8000 (22KB) | ------------------------------------------------- -|U-boot SPL | 0xFFFD8000 (160KB) | +|U-Boot SPL | 0xFFFD8000 (160KB) | ------------------------------------------------- NAND Flash memory Map on T1024RDB ------------------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot 1MB(2 block) -0x100000 0x17FFFF u-boot env 512KB(1 block) +0x000000 0x0FFFFF U-Boot 1MB(2 block) +0x100000 0x17FFFF U-Boot env 512KB(1 block) 0x180000 0x1FFFFF FMAN Ucode 512KB(1 block) 0x200000 0x27FFFF QE Firmware 512KB(1 block) @@ -291,16 +291,16 @@ Start End Definition Size NAND Flash memory Map on T1023RDB ---------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot 1MB -0x100000 0x15FFFF u-boot env 8KB +0x000000 0x0FFFFF U-Boot 1MB +0x100000 0x15FFFF U-Boot env 8KB 0x160000 0x17FFFF FMAN Ucode 128KB SD Card memory Map on T102xRDB ---------------------------------------------------- Block #blocks Definition Size -0x008 2048 u-boot img 1MB -0x800 0016 u-boot env 8KB +0x008 2048 U-Boot img 1MB +0x800 0016 U-Boot env 8KB 0x820 0256 FMAN Ucode 128KB 0x920 0256 QE Firmware 128KB(only T1024RDB) @@ -308,8 +308,8 @@ Block #blocks Definition Size 64MB SPI Flash memory Map on T102xRDB ---------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot img 1MB -0x100000 0x101FFF u-boot env 8KB +0x000000 0x0FFFFF U-Boot img 1MB +0x100000 0x101FFF U-Boot env 8KB 0x110000 0x12FFFF FMAN Ucode 128KB 0x130000 0x14FFFF QE Firmware 128KB(only T1024RDB) 0x300000 0x3FFFFF device tree 128KB diff --git a/board/freescale/t1040qds/README b/board/freescale/t1040qds/README index 8160ca0bc0..6c5ffc07f8 100644 --- a/board/freescale/t1040qds/README +++ b/board/freescale/t1040qds/README @@ -118,15 +118,15 @@ Start Address End Address Description Size NOR Flash memory Map on T1040QDS -------------------------------- Start End Definition Size -0xEFF40000 0xEFFFFFFF u-boot (current bank) 768KB -0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB +0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB +0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB 0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB 0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB 0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB 0xEC000000 0xEC01FFFF RCW (alt bank) 128KB -0xEBF40000 0xEBFFFFFF u-boot (alt bank) 768KB -0xEBF20000 0xEBF3FFFF u-boot env (alt bank) 128KB +0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB +0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB 0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB 0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB 0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 11MB + 512KB @@ -138,7 +138,7 @@ Various Software configurations/environment variables/commands -------------------------------------------------------------- The below commands apply to T1040QDS -1. U-boot environment variable hwconfig +1. U-Boot environment variable hwconfig The default hwconfig is: hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1: dr_mode=host,phy_type=utmi diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index b9d2212000..98b3f63db2 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -186,15 +186,15 @@ Start Address End Address Description Size NOR Flash memory Map --------------------- Start End Definition Size -0xEFF40000 0xEFFFFFFF u-boot (current bank) 768KB -0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB +0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB +0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB 0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB 0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB 0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB 0xEC000000 0xEC01FFFF RCW (alt bank) 128KB -0xEBF40000 0xEBFFFFFF u-boot (alt bank) 768KB -0xEBF20000 0xEBF3FFFF u-boot env (alt bank) 128KB +0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB +0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB 0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB 0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB 0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 11MB + 512KB @@ -206,7 +206,7 @@ Various Software configurations/environment variables/commands -------------------------------------------------------------- The below commands apply to the board -1. U-boot environment variable hwconfig +1. U-Boot environment variable hwconfig The default hwconfig is: hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1: dr_mode=host,phy_type=utmi @@ -228,8 +228,8 @@ NAND boot with 2 Stage boot loader ---------------------------------- PBL initialise the internal SRAM and copy SPL(160KB) in SRAM. SPL further initialise DDR using SPD and environment variables and copy -u-boot(768 KB) from flash to DDR. -Finally SPL transer control to u-boot for futher booting. +U-Boot(768 KB) from flash to DDR. +Finally SPL transer control to U-Boot for futher booting. SPL has following features: - Executes within 256K @@ -250,30 +250,30 @@ SPL has following features: ----------------------------------------------- STACK | 0xFFFD8000 (22KB) | ----------------------------------------------- - U-boot SPL | 0xFFFD8000 (160KB) | + U-Boot SPL | 0xFFFD8000 (160KB) | ----------------------------------------------- NAND Flash memory Map on T104xRDB ------------------------------------------ Start End Definition Size -0x000000 0x0FFFFF u-boot 1MB -0x180000 0x19FFFF u-boot env 128KB +0x000000 0x0FFFFF U-Boot 1MB +0x180000 0x19FFFF U-Boot env 128KB 0x280000 0x29FFFF FMAN Ucode 128KB 0x380000 0x39FFFF QE Firmware 128KB SD Card memory Map on T104xRDB ------------------------------------------ Block #blocks Definition Size -0x008 2048 u-boot 1MB -0x800 0024 u-boot env 8KB +0x008 2048 U-Boot 1MB +0x800 0024 U-Boot env 8KB 0x820 0256 FMAN Ucode 128KB 0x920 0256 QE Firmware 128KB SPI Flash memory Map on T104xRDB ------------------------------------------ Start End Definition Size -0x000000 0x0FFFFF u-boot 1MB -0x100000 0x101FFF u-boot env 8KB +0x000000 0x0FFFFF U-Boot 1MB +0x100000 0x101FFF U-Boot env 8KB 0x110000 0x12FFFF FMAN Ucode 128KB 0x130000 0x14FFFF QE Firmware 128KB diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README index 83060c10f3..2a2a0e514c 100755 --- a/board/freescale/t208xqds/README +++ b/board/freescale/t208xqds/README @@ -92,7 +92,7 @@ XFI: 10GBASE-KR scenario. So, for XFI usage, there are two scenarios, one will use fiber cable, another will use copper cable. An hwconfig env "fsl_10gkr_copper" is - introduced to indicate a XFI port will use copper cable, and U-boot + introduced to indicate a XFI port will use copper cable, and U-Boot will fixup the dtb accordingly. It's used as: fsl_10gkr_copper:<10g_mac_name> The <10g_mac_name> can be fm1_10g1, fm1_10g2, fm1_10g3, fm1_10g4, they @@ -108,7 +108,7 @@ XFI: - T2080QDS can support 1G-KX by using SGMII protocol, but serdes lane runs in 1G-KX mode. By default, the lane runs in SGMII mode, to set a lane in 1G-KX mode, need to set corresponding bit in SerDes Protocol Configuration - Register 1 (PCCR1), and U-boot fixup the dtb for kernel to do proper + Register 1 (PCCR1), and U-Boot fixup the dtb for kernel to do proper initialization. Hwconfig "fsl_1gkx" is used to indicate a lane runs in 1G-KX mode, MAC 1/2/5/6/9/10 are available for 1G-KX, MAC 3/4 run in RGMII mode. To set a @@ -142,15 +142,15 @@ Start Address End Address Description Size 128M NOR Flash memory Map ------------------------- Start Address End Address Definition Max size -0xEFF40000 0xEFFFFFFF u-boot (current bank) 768KB -0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB +0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB +0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB 0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB 0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB 0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB 0xEC000000 0xEC01FFFF RCW (alt bank) 128KB -0xEBF40000 0xEBFFFFFF u-boot (alt bank) 768KB -0xEBF20000 0xEBF3FFFF u-boot env (alt bank) 128KB +0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB +0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB 0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB 0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB 0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 1MB @@ -172,11 +172,11 @@ Software configurations and board settings Switching between default bank0 and alternate bank4 on NOR flash To change boot source to vbank4: - by software: run command 'qixis_reset altbank' in u-boot. + by software: run command 'qixis_reset altbank' in U-Boot. by DIP-switch: set SW6[1:4] = '0100' To change boot source to vbank0: - by software: run command 'qixis_reset' in u-boot. + by software: run command 'qixis_reset' in U-Boot. by DIP-Switch: set SW6[1:4] = '0000' 2. NAND Boot: @@ -216,8 +216,8 @@ Software configurations and board settings ------------------------------- PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM. SPL further initializes DDR using SPD and environment variables -and copy u-boot(768 KB) from NAND/SPI/SD device to DDR. -Finally SPL transers control to u-boot for futher booting. +and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR. +Finally SPL transers control to U-Boot for futher booting. SPL has following features: - Executes within 256K @@ -237,30 +237,30 @@ Run time view of SPL framework ------------------------------------------------- |STACK | 0xFFFD8000 (22KB) | ------------------------------------------------- -|U-boot SPL | 0xFFFD8000 (160KB) | +|U-Boot SPL | 0xFFFD8000 (160KB) | ------------------------------------------------- NAND Flash memory Map on T2080QDS -------------------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot img 1MB (2 blocks) -0x100000 0x17FFFF u-boot env 512KB (1 block) +0x000000 0x0FFFFF U-Boot img 1MB (2 blocks) +0x100000 0x17FFFF U-Boot env 512KB (1 block) 0x180000 0x1FFFFF FMAN ucode 512KB (1 block) Micro SD Card memory Map on T2080QDS ---------------------------------------------------- Block #blocks Definition Size -0x008 2048 u-boot img 1MB -0x800 0016 u-boot env 8KB +0x008 2048 U-Boot img 1MB +0x800 0016 U-Boot env 8KB 0x820 0128 FMAN ucode 64KB SPI Flash memory Map on T2080QDS ---------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot img 1MB -0x100000 0x101FFF u-boot env 8KB +0x000000 0x0FFFFF U-Boot img 1MB +0x100000 0x101FFF U-Boot env 8KB 0x110000 0x11FFFF FMAN ucode 64KB diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c index f08cff2654..e92b5d3a05 100644 --- a/board/freescale/t208xqds/eth_t208xqds.c +++ b/board/freescale/t208xqds/eth_t208xqds.c @@ -600,7 +600,7 @@ int board_eth_init(bd_t *bis) case 0x66: case 0x67: /* - * XFI does not need a PHY to work, but to avoid U-boot use + * XFI does not need a PHY to work, but to avoid U-Boot use * default PHY address which is zero to a MAC when it found * a MAC has no PHY address, we give a PHY address to XFI * MAC, and should not use a real XAUI PHY address, since diff --git a/board/freescale/t208xrdb/README b/board/freescale/t208xrdb/README index 24484cd0ff..42b2b92396 100644 --- a/board/freescale/t208xrdb/README +++ b/board/freescale/t208xrdb/README @@ -107,16 +107,16 @@ Start Address End Address Description Size 128M NOR Flash memory Map ------------------------- Start Address End Address Definition Max size -0xEFF40000 0xEFFFFFFF u-boot (current bank) 768KB -0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB +0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB +0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB 0xEFE00000 0xEFE3FFFF PHY CS4315 firmware 256KB 0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB 0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB 0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB 0xEC000000 0xEC01FFFF RCW (alt bank) 128KB -0xEBF40000 0xEBFFFFFF u-boot (alt bank) 768KB -0xEBF20000 0xEBF3FFFF u-boot env (alt bank) 128KB +0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB +0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB 0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB 0xEBE00000 0xEBE3FFFF PHY CS4315 firmware (alt bank) 256KB 0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB @@ -155,11 +155,11 @@ Software configurations and board settings Switching between default bank and alternate bank on NOR flash To change boot source to vbank4: - via software: run command 'cpld reset altbank' in u-boot. + via software: run command 'cpld reset altbank' in U-Boot. via DIP-switch: set SW3[5:7] = '100' To change boot source to vbank0: - via software: run command 'cpld reset' in u-boot. + via software: run command 'cpld reset' in U-Boot. via DIP-Switch: set SW3[5:7] = '000' 2. NAND Boot: @@ -197,8 +197,8 @@ Software configurations and board settings ------------------------------- PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM. SPL further initializes DDR using SPD and environment variables -and copy u-boot(768 KB) from NAND/SPI/SD device to DDR. -Finally SPL transers control to u-boot for futher booting. +and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR. +Finally SPL transers control to U-Boot for futher booting. SPL has following features: - Executes within 256K @@ -218,14 +218,14 @@ Run time view of SPL framework ------------------------------------------------- |STACK | 0xFFFD8000 (22KB) | ------------------------------------------------- -|U-boot SPL | 0xFFFD8000 (160KB) | +|U-Boot SPL | 0xFFFD8000 (160KB) | ------------------------------------------------- NAND Flash memory Map on T2080RDB -------------------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot img 1MB (2 blocks) -0x100000 0x17FFFF u-boot env 512KB (1 block) +0x000000 0x0FFFFF U-Boot img 1MB (2 blocks) +0x100000 0x17FFFF U-Boot env 512KB (1 block) 0x180000 0x1FFFFF FMAN ucode 512KB (1 block) 0x200000 0x27FFFF CS4315 ucode 512KB (1 block) @@ -233,8 +233,8 @@ Start End Definition Size Micro SD Card memory Map on T2080RDB ---------------------------------------------------- Block #blocks Definition Size -0x008 2048 u-boot img 1MB -0x800 0016 u-boot env 8KB +0x008 2048 U-Boot img 1MB +0x800 0016 U-Boot env 8KB 0x820 0128 FMAN ucode 64KB 0x8a0 0512 CS4315 ucode 256KB @@ -242,8 +242,8 @@ Block #blocks Definition Size SPI Flash memory Map on T2080RDB ---------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot img 1MB -0x100000 0x101FFF u-boot env 8KB +0x000000 0x0FFFFF U-Boot img 1MB +0x100000 0x101FFF U-Boot env 8KB 0x110000 0x11FFFF FMAN ucode 64KB 0x120000 0x15FFFF CS4315 ucode 256KB diff --git a/board/freescale/t4qds/README b/board/freescale/t4qds/README index 3962fee7f2..bf238146db 100644 --- a/board/freescale/t4qds/README +++ b/board/freescale/t4qds/README @@ -86,7 +86,7 @@ Board Features 10GBASE-KR scenario. So, for XFI usage, there are two scenarios, one will use fiber cable, another will use copper cable. An hwconfig env "fsl_10gkr_copper" is - introduced to indicate a XFI port will use copper cable, and U-boot + introduced to indicate a XFI port will use copper cable, and U-Boot will fixup the dtb accordingly. It's used as: fsl_10gkr_copper:<10g_mac_name> The <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2, they @@ -118,7 +118,7 @@ The physical address of the last (boot page translation) varies with the actual Voltage ID and VDD override -------------------- -T4240 has a VID feature. U-boot reads the VID efuses and adjust the voltage +T4240 has a VID feature. U-Boot reads the VID efuses and adjust the voltage accordingly. The voltage can also be override by command vdd_override. The syntax is @@ -144,8 +144,8 @@ Users can set the final voltage directly. ------------------------------- PBL initializes the internal SRAM and copy SPL(160K) in SRAM. SPL further initialise DDR using SPD and environment variables -and copy u-boot(768 KB) from NAND/SD device to DDR. -Finally SPL transers control to u-boot for futher booting. +and copy U-Boot(768 KB) from NAND/SD device to DDR. +Finally SPL transers control to U-Boot for futher booting. SPL has following features: - Executes within 256K @@ -165,21 +165,21 @@ Run time view of SPL framework ------------------------------------------------- |STACK | 0xFFFD8000 (22KB) | ------------------------------------------------- -|U-boot SPL | 0xFFFD8000 (160KB) | +|U-Boot SPL | 0xFFFD8000 (160KB) | ------------------------------------------------- NAND Flash memory Map on T4QDS -------------------------------------------------------------- Start End Definition Size -0x000000 0x0FFFFF u-boot img 1MB -0x140000 0x15FFFF u-boot env 128KB +0x000000 0x0FFFFF U-Boot img 1MB +0x140000 0x15FFFF U-Boot env 128KB 0x160000 0x17FFFF FMAN Ucode 128KB Micro SD Card memory Map on T4QDS ---------------------------------------------------- Block #blocks Definition Size -0x008 2048 u-boot img 1MB -0x800 0016 u-boot env 8KB +0x008 2048 U-Boot img 1MB +0x800 0016 U-Boot env 8KB 0x820 0128 FMAN ucode 64KB Switch Settings: (ON is 1, OFF is 0) diff --git a/board/freescale/t4qds/eth.c b/board/freescale/t4qds/eth.c index 83a3a9bba2..95f8c04e4d 100644 --- a/board/freescale/t4qds/eth.c +++ b/board/freescale/t4qds/eth.c @@ -658,7 +658,7 @@ int board_eth_init(bd_t *bis) switch (fm_info_get_enet_if(i)) { case PHY_INTERFACE_MODE_XGMII: if ((srds_prtcl_s2 == 55) || (srds_prtcl_s2 == 57)) { - /* A fake PHY address to make U-boot happy */ + /* A fake PHY address to make U-Boot happy */ fm_info_set_phy_address(i, i); } else { lane = serdes_get_first_lane(FSL_SRDS_1, @@ -839,7 +839,7 @@ int board_eth_init(bd_t *bis) switch (fm_info_get_enet_if(i)) { case PHY_INTERFACE_MODE_XGMII: if ((srds_prtcl_s2 == 55) || (srds_prtcl_s2 == 57)) { - /* A fake PHY address to make U-boot happy */ + /* A fake PHY address to make U-Boot happy */ fm_info_set_phy_address(i, i); } else { lane = serdes_get_first_lane(FSL_SRDS_2, diff --git a/board/gateworks/gw_ventana/README b/board/gateworks/gw_ventana/README index 697e5c8bb4..9418907697 100644 --- a/board/gateworks/gw_ventana/README +++ b/board/gateworks/gw_ventana/README @@ -16,13 +16,13 @@ The i.MX6 has a BOOT ROM PPL (Primary Program Loader) which supports loading an executable image from various boot devices. The Gateworks Ventana board config uses an SPL build configuration. This -will build the following artifacts from u-boot source: +will build the following artifacts from U-Boot source: - SPL - Secondary Program Loader that the i.MX6 BOOT ROM (Primary Program Loader) boots. This detects CPU/DRAM configuration, configures The DRAM controller, loads u-boot.img from the detected boot device, and jumps to it. As this is booted from the PPL, it has an IVT/DCD table. - - u-boot.img - The main u-boot core which is u-boot.bin with a image header. + - u-boot.img - The main U-Boot core which is u-boot.bin with a image header. 2. Build @@ -71,15 +71,15 @@ kobs-ng init -v -x --search_exponent=1 SPL The kobs-ng application uses an imximage which contains the Image Vector Table (IVT) and Device Configuration Data (DCD) structures that the i.MX6 BOOT ROM requires to boot. The kobs-ng adds the Firmware Configuration Block (FCB) and -Discovered Bad Block Table (DBBT). The SPL build artifact from u-boot is +Discovered Bad Block Table (DBBT). The SPL build artifact from U-Boot is an imximage. -The u-boot.img, which is the non SPL u-boot binary appended to a u-boot image +The u-boot.img, which is the non SPL U-Boot binary appended to a U-Boot image header must be programmed in the NAND flash boot device at an offset hard coded in the SPL. For the Ventana boards, this has been chosen to be 14MB. -The image can be programmed from either u-boot or Linux: +The image can be programmed from either U-Boot or Linux: -u-boot: +U-Boot: Ventana > setenv mtdparts mtdparts=nand:14m(spl),2m(uboot),1m(env),-(rootfs) Ventana > tftp ${loadaddr} u-boot.img && nand erase.part uboot && \ nand write ${loadaddr} uboot ${filesize} @@ -104,7 +104,7 @@ More details about the i.MX6 BOOT ROM can be found in the IMX6 reference manual. When the IMX6 eFUSE settings have been factory programmed to boot from micro-SD the SPL will be loaded from offset 0x400 (1KB). Once the SPL is -booted, it will load and execute U-boot (u-boot.img) from offset 69KB +booted, it will load and execute U-Boot (u-boot.img) from offset 69KB on the micro-SD (defined by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR). While it is technically possible to enable the SPL to be able to load diff --git a/board/ibf-dsp561/Makefile b/board/ibf-dsp561/Makefile index 5b05ba8003..cbf16121df 100644 --- a/board/ibf-dsp561/Makefile +++ b/board/ibf-dsp561/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2007 Analog Device Inc. # diff --git a/board/ibf-dsp561/ibf-dsp561.c b/board/ibf-dsp561/ibf-dsp561.c index d2ac7a502b..8475fda1a4 100644 --- a/board/ibf-dsp561/ibf-dsp561.c +++ b/board/ibf-dsp561/ibf-dsp561.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2008-2009 I-SYST. * diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c index e31331aec1..3a9e7807c6 100644 --- a/board/imgtec/malta/malta.c +++ b/board/imgtec/malta/malta.c @@ -93,7 +93,7 @@ int checkboard(void) { enum core_card core; - malta_lcd_puts("U-boot"); + malta_lcd_puts("U-Boot"); puts("Board: MIPS Malta"); core = malta_core_card(); diff --git a/board/intel/Kconfig b/board/intel/Kconfig index f7d71c3612..4d341aa799 100644 --- a/board/intel/Kconfig +++ b/board/intel/Kconfig @@ -18,6 +18,14 @@ config TARGET_BAYLEYBAY 4GB memory, HDMI/DP/VGA display, HD audio, SATA, USB2, USB3, SD, eMMC, PCIe and some other sensor interfaces. +config TARGET_COUGARCANYON2 + bool "Cougar Canyon 2" + help + This is the Intel Cougar Canyon 2 Customer Reference Board. It + is built on the Chief River platform with Intel Ivybridge Processor + and Panther Point chipset. The board has 4GB RAM, with some other + peripheral connectors for PCIe/SATA/USB2/USB3/LAN/UART/PS2/VGA/HDMI. + config TARGET_CROWNBAY bool "Crown Bay" help @@ -54,6 +62,7 @@ config TARGET_MINNOWMAX endchoice source "board/intel/bayleybay/Kconfig" +source "board/intel/cougarcanyon2/Kconfig" source "board/intel/crownbay/Kconfig" source "board/intel/galileo/Kconfig" source "board/intel/minnowmax/Kconfig" diff --git a/board/intel/cougarcanyon2/Kconfig b/board/intel/cougarcanyon2/Kconfig new file mode 100644 index 0000000000..95a617b725 --- /dev/null +++ b/board/intel/cougarcanyon2/Kconfig @@ -0,0 +1,25 @@ +if TARGET_COUGARCANYON2 + +config SYS_BOARD + default "cougarcanyon2" + +config SYS_VENDOR + default "intel" + +config SYS_SOC + default "ivybridge" + +config SYS_CONFIG_NAME + default "cougarcanyon2" + +config SYS_TEXT_BASE + default 0xffe00000 + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select X86_RESET_VECTOR + select NORTHBRIDGE_INTEL_IVYBRIDGE + select HAVE_FSP + select BOARD_ROMSIZE_KB_2048 + +endif diff --git a/board/intel/cougarcanyon2/MAINTAINERS b/board/intel/cougarcanyon2/MAINTAINERS new file mode 100644 index 0000000000..a486739b5e --- /dev/null +++ b/board/intel/cougarcanyon2/MAINTAINERS @@ -0,0 +1,6 @@ +INTEL COUGAR CANYON 2 BOARD +M: Bin Meng <bmeng.cn@gmail.com> +S: Maintained +F: board/intel/cougarcanyon2/ +F: include/configs/cougarcanyon2.h +F: configs/cougarcanyon2_defconfig diff --git a/board/intel/cougarcanyon2/Makefile b/board/intel/cougarcanyon2/Makefile new file mode 100644 index 0000000000..abd924c6b3 --- /dev/null +++ b/board/intel/cougarcanyon2/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += cougarcanyon2.o start.o diff --git a/board/intel/cougarcanyon2/cougarcanyon2.c b/board/intel/cougarcanyon2/cougarcanyon2.c new file mode 100644 index 0000000000..31a480a615 --- /dev/null +++ b/board/intel/cougarcanyon2/cougarcanyon2.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <pci.h> +#include <smsc_sio1007.h> +#include <asm/ibmpc.h> +#include <asm/pci.h> +#include <asm/arch/pch.h> + +#define SIO1007_RUNTIME_IOPORT 0x180 + +int board_early_init_f(void) +{ + struct udevice *pch; + int ret; + + ret = uclass_first_device(UCLASS_PCH, &pch); + if (ret) + return ret; + if (!pch) + return -ENODEV; + + /* Initialize LPC interface to turn on superio chipset decode range */ + dm_pci_write_config16(pch, LPC_IO_DEC, COMA_DEC_RANGE | COMB_DEC_RANGE); + dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | COMA_LPC_EN); + dm_pci_write_config32(pch, LPC_GEN1_DEC, GEN_DEC_RANGE_256B | + (SIO1007_IOPORT3 & 0xff00) | GEN_DEC_RANGE_EN); + dm_pci_write_config32(pch, LPC_GEN2_DEC, GEN_DEC_RANGE_16B | + SIO1007_RUNTIME_IOPORT | GEN_DEC_RANGE_EN); + + /* Enable legacy serial port at 0x3f8 */ + sio1007_enable_serial(SIO1007_IOPORT3, 0, UART0_BASE, UART0_IRQ); + + /* Enable SIO1007 runtime I/O port at 0x180 */ + sio1007_enable_runtime(SIO1007_IOPORT3, SIO1007_RUNTIME_IOPORT); + + /* + * On Cougar Canyon 2 board, the RS232 transiver connected to serial + * port 0 (0x3f8) is controlled by a GPIO pin (GPIO10) on the SIO1007. + * Set the pin value to 1 to enable the RS232 transiver. + */ + sio1007_gpio_config(SIO1007_IOPORT3, 0, GPIO_DIR_OUTPUT, + GPIO_POL_NO_INVERT, GPIO_TYPE_PUSH_PULL); + sio1007_gpio_set_value(SIO1007_RUNTIME_IOPORT, 0, 1); + + return 0; +} + +void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) +{ + return; +} diff --git a/board/intel/cougarcanyon2/start.S b/board/intel/cougarcanyon2/start.S new file mode 100644 index 0000000000..d8f227c706 --- /dev/null +++ b/board/intel/cougarcanyon2/start.S @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +.globl early_board_init +early_board_init: + jmp early_board_init_ret diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c index c1087acb69..212c9702d3 100644 --- a/board/intel/galileo/galileo.c +++ b/board/intel/galileo/galileo.c @@ -7,7 +7,6 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/device.h> -#include <asm/arch/gpio.h> #include <asm/arch/quark.h> int board_early_init_f(void) @@ -30,7 +29,7 @@ void board_assert_perst(void) u32 base, port, val; /* retrieve the GPIO IO base */ - qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base); + qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); base = (base & 0xffff) & ~0x7f; /* enable the pin */ @@ -57,7 +56,7 @@ void board_deassert_perst(void) u32 base, port, val; /* retrieve the GPIO IO base */ - qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base); + qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); base = (base & 0xffff) & ~0x7f; /* pull it up (de-assert) */ diff --git a/board/ip04/Makefile b/board/ip04/Makefile index caba16f199..44fa684729 100644 --- a/board/ip04/Makefile +++ b/board/ip04/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2010 Analog Device Inc. # diff --git a/board/ip04/ip04.c b/board/ip04/ip04.c index 70765bce50..c7bc33434e 100644 --- a/board/ip04/ip04.c +++ b/board/ip04/ip04.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2007 David Rowe, * (c) 2006 Ivan Danov diff --git a/board/keymile/km83xx/README.kmeter1 b/board/keymile/km83xx/README.kmeter1 index 7f4fc999f8..b85d7764bc 100644 --- a/board/keymile/km83xx/README.kmeter1 +++ b/board/keymile/km83xx/README.kmeter1 @@ -60,7 +60,7 @@ Keymile kmeter1 Board Bytes transferred = 204204 (31dac hex) => -4.1 Reflash U-boot Image using U-boot +4.1 Reflash U-Boot Image using U-Boot => run update ..... done diff --git a/board/l+g/vinco/Kconfig b/board/l+g/vinco/Kconfig new file mode 100644 index 0000000000..229b5ea129 --- /dev/null +++ b/board/l+g/vinco/Kconfig @@ -0,0 +1,12 @@ +if TARGET_VINCO + +config SYS_BOARD + default "vinco" + +config SYS_VENDOR + default "l+g" + +config SYS_CONFIG_NAME + default "vinco" + +endif diff --git a/board/l+g/vinco/MAINTAINERS b/board/l+g/vinco/MAINTAINERS new file mode 100644 index 0000000000..0cd6044172 --- /dev/null +++ b/board/l+g/vinco/MAINTAINERS @@ -0,0 +1,6 @@ +VInCo Platform +M: Gregory CLEMENT <gregory.clement@free-electrons.com> +S: Maintained +F: board/l+g/vinco +F: include/configs/vinco.h +F: configs/vinco_defconfig diff --git a/board/l+g/vinco/Makefile b/board/l+g/vinco/Makefile new file mode 100644 index 0000000000..a2b8a2bc4a --- /dev/null +++ b/board/l+g/vinco/Makefile @@ -0,0 +1 @@ +obj-y += vinco.o diff --git a/board/l+g/vinco/vinco.c b/board/l+g/vinco/vinco.c new file mode 100644 index 0000000000..3d7af092e8 --- /dev/null +++ b/board/l+g/vinco/vinco.c @@ -0,0 +1,212 @@ +/* + * Board file for the VInCo platform + * Based on the the SAMA5-EK board file + * Configuration settings for the VInCo platform. + * Copyright (C) 2014 Atmel + * Bo Shen <voice.shen@atmel.com> + * Copyright (C) 2015 Free Electrons + * Gregory CLEMENT <gregory.clement@free-electrons.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/atmel_mpddrc.h> +#include <asm/arch/atmel_usba_udc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/clk.h> +#include <asm/arch/sama5d3_smc.h> +#include <asm/arch/sama5d4.h> +#include <atmel_hlcdc.h> +#include <atmel_mci.h> +#include <lcd.h> +#include <mmc.h> +#include <net.h> +#include <netdev.h> +#include <nand.h> +#include <spi.h> +#include <version.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_ATMEL_SPI +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + at91_set_pio_output(AT91_PIO_PORTC, 3, 0); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + at91_set_pio_output(AT91_PIO_PORTC, 3, 1); +} + +static void vinco_spi0_hw_init(void) +{ + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* SPI0_MISO */ + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* SPI0_MOSI */ + at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* SPI0_SPCK */ + + at91_set_pio_output(AT91_PIO_PORTC, 3, 1); /* SPI0_CS0 */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_SPI0); +} +#endif /* CONFIG_ATMEL_SPI */ + + +#ifdef CONFIG_CMD_USB +static void vinco_usb_hw_init(void) +{ + at91_set_pio_output(AT91_PIO_PORTE, 11, 0); + at91_set_pio_output(AT91_PIO_PORTE, 12, 0); + at91_set_pio_output(AT91_PIO_PORTE, 10, 0); +} +#endif + + +#ifdef CONFIG_GENERIC_ATMEL_MCI +void vinco_mci0_hw_init(void) +{ + at91_set_b_periph(AT91_PIO_PORTC, 5, 1); /* MCI0 CDA */ + at91_set_b_periph(AT91_PIO_PORTC, 6, 1); /* MCI0 DA0 */ + at91_set_b_periph(AT91_PIO_PORTC, 7, 1); /* MCI0 DA1 */ + at91_set_b_periph(AT91_PIO_PORTC, 8, 1); /* MCI0 DA2 */ + at91_set_b_periph(AT91_PIO_PORTC, 9, 1); /* MCI0 DA3 */ + at91_set_b_periph(AT91_PIO_PORTC, 10, 1); /* MCI0 DA4 */ + at91_set_b_periph(AT91_PIO_PORTC, 11, 1); /* MCI0 DA5 */ + at91_set_b_periph(AT91_PIO_PORTC, 12, 1); /* MCI0 DA6 */ + at91_set_b_periph(AT91_PIO_PORTC, 13, 1); /* MCI0 DA7 */ + at91_set_b_periph(AT91_PIO_PORTC, 4, 0); /* MCI0 CLK */ + + /* + * As the mci io internal pull down is too strong, so if the io needs + * external pull up, the pull up resistor will be very small, if so + * the power consumption will increase, so disable the interanl pull + * down to save the power. + */ + at91_set_pio_pulldown(AT91_PIO_PORTC, 4, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 5, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 6, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 7, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 8, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 9, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 10, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 11, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 12, 0); + at91_set_pio_pulldown(AT91_PIO_PORTC, 13, 0); + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_MCI0); +} + +int board_mmc_init(bd_t *bis) +{ + /* Enable power for MCI0 interface */ + at91_set_pio_output(AT91_PIO_PORTE, 7, 1); + + return atmel_mci_init((void *)ATMEL_BASE_MCI0); +} +#endif /* CONFIG_GENERIC_ATMEL_MCI */ + +#ifdef CONFIG_MACB +void vinco_macb0_hw_init(void) +{ + at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* ETXCK_EREFCK */ + at91_set_a_periph(AT91_PIO_PORTB, 6, 0); /* ERXDV */ + at91_set_a_periph(AT91_PIO_PORTB, 8, 0); /* ERX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* ERX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* ERXER */ + at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* ETXEN */ + at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* ETX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* ETX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 17, 0); /* EMDIO */ + at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* EMDC */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_GMAC0); + + /* Enable Phy*/ + at91_set_pio_output(AT91_PIO_PORTE, 8, 1); +} +#endif + +static void vinco_serial3_hw_init(void) +{ + at91_set_b_periph(AT91_PIO_PORTE, 17, 1); /* TXD3 */ + at91_set_b_periph(AT91_PIO_PORTE, 16, 0); /* RXD3 */ + + /* Enable clock */ + at91_periph_clk_enable(ATMEL_ID_USART3); +} + +int board_early_init_f(void) +{ + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); + at91_periph_clk_enable(ATMEL_ID_PIOD); + at91_periph_clk_enable(ATMEL_ID_PIOE); + + vinco_serial3_hw_init(); + + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + +#ifdef CONFIG_ATMEL_SPI + vinco_spi0_hw_init(); +#endif + +#ifdef CONFIG_GENERIC_ATMEL_MCI + vinco_mci0_hw_init(); +#endif +#ifdef CONFIG_MACB + vinco_macb0_hw_init(); +#endif +#ifdef CONFIG_CMD_USB + vinco_usb_hw_init(); +#endif +#ifdef CONFIG_USB_GADGET_ATMEL_USBA + at91_udp_hw_init(); +#endif + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; + +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC0, 0x00); +#endif + +#ifdef CONFIG_USB_GADGET_ATMEL_USBA + usba_udc_probe(&pdata); +#ifdef CONFIG_USB_ETH_RNDIS + usb_eth_initialize(bis); +#endif +#endif + + return rc; +} diff --git a/board/lge/sniper/Makefile b/board/lge/sniper/Makefile index 2d216fcaf6..f32a481d0e 100644 --- a/board/lge/sniper/Makefile +++ b/board/lge/sniper/Makefile @@ -1,5 +1,5 @@ # -# LG Optimus Black (P970) codename sniper board +# LG Optimus Black codename sniper board # # Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> # diff --git a/board/lge/sniper/sniper.c b/board/lge/sniper/sniper.c index c818c9d4ce..d0e7d66b49 100644 --- a/board/lge/sniper/sniper.c +++ b/board/lge/sniper/sniper.c @@ -1,5 +1,5 @@ /* - * LG Optimus Black (P970) codename sniper board + * LG Optimus Black codename sniper board * * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> * diff --git a/board/lge/sniper/sniper.h b/board/lge/sniper/sniper.h index e5d0774e78..01ab3015d2 100644 --- a/board/lge/sniper/sniper.h +++ b/board/lge/sniper/sniper.h @@ -1,5 +1,5 @@ /* - * LG Optimus Black (P970) codename sniper board + * LG Optimus Black codename sniper board * * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> * diff --git a/board/logicpd/omap3som/MAINTAINERS b/board/logicpd/omap3som/MAINTAINERS index ffe2201b28..68ad3a511c 100644 --- a/board/logicpd/omap3som/MAINTAINERS +++ b/board/logicpd/omap3som/MAINTAINERS @@ -1,5 +1,5 @@ OMAP3SOM BOARD -M: Peter Barada <peter.barada@logicpd.com> +M: Adam Ford <aford173@gmail.com> S: Maintained F: board/logicpd/omap3som/ F: include/configs/omap3_logic.h diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c index fb89921e6b..b5c44f915b 100644 --- a/board/logicpd/omap3som/omap3logic.c +++ b/board/logicpd/omap3som/omap3logic.c @@ -26,10 +26,20 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/mach-types.h> +#include <linux/mtd/nand.h> +#include <asm/omap_musb.h> +#include <asm/errno.h> +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> +#include <linux/usb/musb.h> #include "omap3logic.h" DECLARE_GLOBAL_DATA_PTR; +#define CONTROL_WKUP_CTRL 0x48002a5c +#define GPIO_IO_PWRDNZ (1 << 6) +#define PBIASLITEVMODE1 (1 << 8) + /* * two dimensional array of strucures containining board name and Linux * machine IDs; row it selected based on CPU column is slected based @@ -73,6 +83,89 @@ static struct board_id { }, }; +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + return serial_tstc() && serial_getc() == 'c'; +} +#endif + +#if defined(CONFIG_SPL_BUILD) +/* + * Routine: get_board_mem_timings + * Description: If we use SPL then there is no x-loader nor config header + * so we have to setup the DDR timings ourself on the first bank. This + * provides the timing values back to the function that configures + * the memory. + */ +void get_board_mem_timings(struct board_sdrc_timings *timings) +{ + timings->mr = MICRON_V_MR_165; + /* 256MB DDR */ + timings->mcfg = MICRON_V_MCFG_200(256 << 20); + timings->ctrla = MICRON_V_ACTIMA_200; + timings->ctrlb = MICRON_V_ACTIMB_200; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; +} +#endif + +#ifdef CONFIG_USB_MUSB_OMAP2PLUS +static struct musb_hdrc_config musb_config = { + .multipoint = 1, + .dyn_fifo = 1, + .num_eps = 16, + .ram_bits = 12, +}; + +static struct omap_musb_board_data musb_board_data = { + .interface_type = MUSB_INTERFACE_ULPI, +}; + +static struct musb_hdrc_platform_data musb_plat = { +#if defined(CONFIG_USB_MUSB_HOST) + .mode = MUSB_HOST, +#elif defined(CONFIG_USB_MUSB_GADGET) + .mode = MUSB_PERIPHERAL, +#else +#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET" +#endif + .config = &musb_config, + .power = 100, + .platform_ops = &omap2430_ops, + .board_data = &musb_board_data, +}; +#endif + + +/* + * Routine: misc_init_r + * Description: Configure board specific parts + */ +int misc_init_r(void) +{ + t2_t *t2_base = (t2_t *)T2_BASE; + u32 pbias_lite; + /* set up dual-voltage GPIOs to 1.8V */ + pbias_lite = readl(&t2_base->pbias_lite); + pbias_lite &= ~PBIASLITEVMODE1; + pbias_lite |= PBIASLITEPWRDNZ1; + writel(pbias_lite, &t2_base->pbias_lite); + if (get_cpu_family() == CPU_OMAP36XX) + writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ, + CONTROL_WKUP_CTRL); + twl4030_power_init(); + + omap_die_id_display(); + putc('\n'); + +#ifdef CONFIG_USB_MUSB_OMAP2PLUS + musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); +#endif + + return 0; +} + /* * BOARD_ID_GPIO - GPIO of pin with optional pulldown resistor on SOM LV */ @@ -188,69 +281,317 @@ int board_eth_init(bd_t *bis) */ void set_muxconf_regs(void) { - /*GPMC*/ - MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTD | DIS | M0)); - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M4)); - MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | DIS | M1)); /*GPMC_IO_DIR*/ - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); - - /*Expansion card */ - MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); - MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); - MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); - MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); - MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); - MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); - - /* Serial Console */ - MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)); - MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); - MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); - MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)); - - /* I2C */ - MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); - MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); - MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); - MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); - - MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)); - - /*Control and debug */ - MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); - MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); - MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); - MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)); - MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0)); - MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)); /*SDRC_D0*/ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)); /*SDRC_D1*/ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)); /*SDRC_D2*/ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)); /*SDRC_D3*/ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)); /*SDRC_D4*/ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)); /*SDRC_D5*/ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)); /*SDRC_D6*/ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)); /*SDRC_D7*/ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)); /*SDRC_D8*/ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)); /*SDRC_D9*/ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)); /*SDRC_D10*/ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)); /*SDRC_D11*/ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)); /*SDRC_D12*/ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)); /*SDRC_D13*/ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)); /*SDRC_D14*/ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)); /*SDRC_D15*/ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)); /*SDRC_D16*/ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)); /*SDRC_D17*/ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)); /*SDRC_D18*/ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)); /*SDRC_D19*/ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)); /*SDRC_D20*/ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)); /*SDRC_D21*/ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)); /*SDRC_D22*/ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)); /*SDRC_D23*/ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)); /*SDRC_D24*/ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)); /*SDRC_D25*/ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)); /*SDRC_D26*/ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)); /*SDRC_D27*/ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)); /*SDRC_D28*/ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)); /*SDRC_D29*/ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)); /*SDRC_D30*/ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)); /*SDRC_D31*/ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)); /*SDRC_CLK*/ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)); /*SDRC_DQS0*/ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)); /*SDRC_DQS1*/ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)); /*SDRC_DQS2*/ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)); /*SDRC_DQS3*/ + MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); /*SDRC_CKE0*/ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)); /*SDRC_CKE1*/ + + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); /*GPMC_A1*/ + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); /*GPMC_A2*/ + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); /*GPMC_A3*/ + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); /*GPMC_A4*/ + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); /*GPMC_A5*/ + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); /*GPMC_A6*/ + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); /*GPMC_A7*/ + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); /*GPMC_A8*/ + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); /*GPMC_A9*/ + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); /*GPMC_A10*/ + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); /*GPMC_D0*/ + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); /*GPMC_D1*/ + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); /*GPMC_D2*/ + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); /*GPMC_D3*/ + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); /*GPMC_D4*/ + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); /*GPMC_D5*/ + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); /*GPMC_D6*/ + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); /*GPMC_D7*/ + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); /*GPMC_D8*/ + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); /*GPMC_D9*/ + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); /*GPMC_D10*/ + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); /*GPMC_D11*/ + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); /*GPMC_D12*/ + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); /*GPMC_D13*/ + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); /*GPMC_D14*/ + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); /*GPMC_D15*/ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); /*GPMC_nCS0*/ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)); /*GPMC_nCS1*/ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)); /*GPMC_nCS2*/ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)); /*GPMC_nCS3*/ + MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); /*GPMC_nCS4*/ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)); /*GPMC_nCS5*/ + MUX_VAL(CP(GPMC_NCS6), (IEN | PTU | EN | M0)); /*GPMC_nCS6*/ + MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)); /*GPMC_nCS7*/ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)); /*GPMC_CLK*/ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)); /*GPMC_nADV_ALE*/ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)); /*GPMC_nOE*/ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)); /*GPMC_nWE*/ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); /*GPMC_nBE0_CLE*/ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)); /*GPMC_nBE1*/ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)); /*GPMC_nWP*/ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)); /*GPMC_WAIT0*/ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); /*GPMC_WAIT1*/ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)); /*GPIO_64*/ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)); /*GPMC_WAIT3*/ + + MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)); /*CAM_HS */ + MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)); /*CAM_VS */ + MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)); /*CAM_XCLKA*/ + MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)); /*CAM_PCLK*/ + MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)); /*GPIO_98*/ + MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)); /*CAM_D0*/ + MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)); /*CAM_D1*/ + MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)); /*CAM_D2*/ + MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)); /*CAM_D3*/ + MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)); /*CAM_D4*/ + MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)); /*CAM_D5*/ + MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)); /*CAM_D6*/ + MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)); /*CAM_D7*/ + MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)); /*CAM_D8*/ + MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)); /*CAM_D9*/ + MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)); /*CAM_D10*/ + MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)); /*CAM_D11*/ + MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)); /*CAM_XCLKB*/ + MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)); /*GPIO_167*/ + MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)); /*CAM_STROBE*/ + + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)); /*CSI2_DX0*/ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)); /*CSI2_DY0*/ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)); /*CSI2_DX1*/ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)); /*CSI2_DY1*/ + + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)); /*McBSP2_FSX*/ + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)); /*McBSP2_CLKX*/ + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)); /*McBSP2_DR*/ + MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)); /*McBSP2_DX*/ + + MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); /*MMC1_CLK*/ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); /*MMC1_CMD*/ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); /*MMC1_DAT0*/ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); /*MMC1_DAT1*/ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); /*MMC1_DAT2*/ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); /*MMC1_DAT3*/ + MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)); /*MMC1_DAT4*/ + MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)); /*MMC1_DAT5*/ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)); /*MMC1_DAT6*/ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)); /*MMC1_DAT7*/ + + MUX_VAL(CP(MMC2_CLK), (IEN | PTD | DIS | M0)); /*MMC2_CLK*/ + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)); /*MMC2_CMD*/ + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)); /*MMC2_DAT0*/ + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)); /*MMC2_DAT1*/ + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)); /*MMC2_DAT2*/ + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)); /*MMC2_DAT3*/ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTD | DIS | M0)); /*MMC2_DAT4*/ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTD | DIS | M0)); /*MMC2_DAT5*/ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTD | DIS | M0)); /*MMC2_DAT6 */ + MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M0)); /*MMC2_DAT7*/ + + MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)); /*McBSP3_DX*/ + MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)); /*McBSP3_DR*/ + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M0)); /*McBSP3_CLKX*/ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)); /*McBSP3_FSX*/ + + MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)); /*UART2_CTS*/ + MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)); /*UART2_RTS*/ + MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)); /*UART2_TX*/ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)); /*UART2_RX*/ + + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)); /*UART1_TX*/ + MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); /*UART1_RTS*/ + MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); /*UART1_CTS*/ + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)); /*UART1_RX*/ + + MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)); /*GPIO_152*/ + MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)); /*GPIO_153*/ + + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)); /*MCBSP1_CLKR*/ + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)); /*MCBSP1_FSR*/ + MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)); /*MCBSP1_DX*/ + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)); /*MCBSP1_DR*/ + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)); /*MCBSP_CLKS*/ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)); /*MCBSP1_FSX*/ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)); /*MCBSP1_CLKX*/ + + MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)); /*UART3_CTS_*/ + MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)); /*UART3_RTS_SD */ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)); /*UART3_RX_IRRX*/ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)); /*UART3_TX_IRTX*/ + + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)); /*HSUSB0_CLK*/ + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)); /*HSUSB0_STP*/ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)); /*HSUSB0_DIR*/ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)); /*HSUSB0_NXT*/ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA0*/ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA1*/ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA2*/ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA3*/ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA4*/ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA5*/ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA6*/ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA7*/ + + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)); /*I2C1_SCL*/ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)); /*I2C1_SDA*/ + + MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); /*I2C2_SCL*/ + MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); /*I2C2_SDA*/ + + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); /*I2C3_SCL*/ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); /*I2C3_SDA*/ + + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)); /*I2C4_SCL*/ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)); /*I2C4_SDA*/ + + MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)); /*HDQ_SIO*/ + + MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)); /*McSPI1_CLK*/ + MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)); /*McSPI1_SIMO */ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)); /*McSPI1_SOMI */ + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)); /*McSPI1_CS0*/ + MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)); /*GPIO_175*/ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)); /*GPIO_176*/ + MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)); /*McSPI1_CS3*/ + + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)); /*McSPI2_CLK*/ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)); /*McSPI2_SIMO*/ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)); /*McSPI2_SOMI*/ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)); /*McSPI2_CS0*/ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)); /*McSPI2_CS1*/ + + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)); /*SYS_32K*/ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)); /*SYS_CLKREQ*/ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); /*SYS_nIRQ*/ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)); /*GPIO_2*/ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)); /*GPIO_3 */ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)); /*GPIO_4*/ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)); /*GPIO_5*/ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)); /*GPIO_6*/ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)); /*GPIO_7*/ + + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); /*SYS_OFF_MODE*/ + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); /*SYS_CLKOUT1*/ + MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)); /*SYS_CLKOUT2*/ + + MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)); /*JTAG_TCK*/ + MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)); /*JTAG_TMS*/ + MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)); /*JTAG_TDI*/ + MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)); /*JTAG_EMU0*/ + MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)); /*JTAG_EMU1*/ + + MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M0)); /*ETK_CLK*/ + MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M0)); /*ETK_CTL*/ + MUX_VAL(CP(ETK_D0_ES2), (IEN | PTD | DIS | M0)); /*ETK_D0*/ + MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | DIS | M0)); /*ETK_D1*/ + MUX_VAL(CP(ETK_D2_ES2), (IEN | PTD | EN | M0)); /*ETK_D2*/ + MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | DIS | M0)); /*ETK_D3*/ + MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | DIS | M0)); /*ETK_D4*/ + MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | DIS | M0)); /*ETK_D5*/ + MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | DIS | M0)); /*ETK_D6*/ + MUX_VAL(CP(ETK_D7_ES2), (IEN | PTD | DIS | M0)); /*ETK_D7*/ + MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | DIS | M0)); /*ETK_D8*/ + MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | DIS | M0)); /*ETK_D9*/ + MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)); /*ETK_D10*/ + MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)); /*ETK_D11*/ + MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)); /*ETK_D12*/ + MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)); /*ETK_D13*/ + MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)); /*ETK_D14*/ + MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)); /*ETK_D15*/ + + MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)); /*d2d_mcad1*/ + MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)); /*d2d_mcad2*/ + MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)); /*d2d_mcad3*/ + MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)); /*d2d_mcad4*/ + MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)); /*d2d_mcad5*/ + MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)); /*d2d_mcad6*/ + MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)); /*d2d_mcad7*/ + MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)); /*d2d_mcad8*/ + MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)); /*d2d_mcad9*/ + MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)); /*d2d_mcad10*/ + MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)); /*d2d_mcad11*/ + MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)); /*d2d_mcad12*/ + MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)); /*d2d_mcad13*/ + MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)); /*d2d_mcad14*/ + MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)); /*d2d_mcad15*/ + MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)); /*d2d_mcad16*/ + MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)); /*d2d_mcad17*/ + MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)); /*d2d_mcad18*/ + MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)); /*d2d_mcad19*/ + MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)); /*d2d_mcad20*/ + MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)); /*d2d_mcad21*/ + MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)); /*d2d_mcad22*/ + MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)); /*d2d_mcad23*/ + MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)); /*d2d_mcad24*/ + MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)); /*d2d_mcad25*/ + MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)); /*d2d_mcad26*/ + MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)); /*d2d_mcad27*/ + MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)); /*d2d_mcad28*/ + MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)); /*d2d_mcad29*/ + MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)); /*d2d_mcad30*/ + MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)); /*d2d_mcad31*/ + MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)); /*d2d_mcad32*/ + MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)); /*d2d_mcad33*/ + MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)); /*d2d_mcad34*/ + MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)); /*d2d_mcad35*/ + MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)); /*d2d_mcad36*/ + MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)); /*d2d_clk26mi*/ + MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)); /*d2d_nrespwron*/ + MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)); /*d2d_nreswarm */ + MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)); /*d2d_arm9nirq */ + MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)); /*d2d_uma2p6fiq*/ + MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)); /*d2d_spint*/ + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)); /*d2d_frint*/ + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)); /*d2d_dmareq0*/ + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)); /*d2d_dmareq1*/ + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)); /*d2d_dmareq2*/ + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)); /*d2d_dmareq3*/ + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)); /*d2d_n3gtrst*/ + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)); /*d2d_n3gtdi*/ + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)); /*d2d_n3gtdo*/ + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)); /*d2d_n3gtms*/ + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)); /*d2d_n3gtck*/ + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)); /*d2d_n3grtck*/ + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)); /*d2d_mstdby*/ + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)); /*d2d_swakeup*/ + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)); /*d2d_idlereq*/ + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)); /*d2d_idleack*/ + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)); /*d2d_mwrite*/ + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)); /*d2d_swrite*/ + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)); /*d2d_mread*/ + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)); /*d2d_sread*/ + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)); /*d2d_mbusflag*/ + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)); /*d2d_sbusflag*/ } diff --git a/board/mini-box/picosam9g45/led.c b/board/mini-box/picosam9g45/led.c index dc1013ad12..3fb6a7b7cd 100644 --- a/board/mini-box/picosam9g45/led.c +++ b/board/mini-box/picosam9g45/led.c @@ -9,15 +9,12 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/at91sam9g45.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> void coloured_LED_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clock */ - writel(1 << ATMEL_ID_PIODE, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIODE); at91_set_gpio_output(CONFIG_GREEN_LED, 1); diff --git a/board/mini-box/picosam9g45/picosam9g45.c b/board/mini-box/picosam9g45/picosam9g45.c index 193f14d75a..32ba9c6225 100644 --- a/board/mini-box/picosam9g45/picosam9g45.c +++ b/board/mini-box/picosam9g45/picosam9g45.c @@ -17,7 +17,6 @@ #include <asm/arch/at91sam9g45_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h> #include <asm/arch/clk.h> #include <lcd.h> @@ -80,15 +79,13 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; struct atmel_mpddrc_config ddr2; unsigned long csa; ddr2_conf(&ddr2); - /* enable DDR2 clock */ - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* Chip select 1 is for DDR2/SDRAM */ csa = readl(&mat->ebicsa); @@ -105,9 +102,7 @@ void mem_init(void) #ifdef CONFIG_CMD_USB static void picosam9g45_usb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - writel(1 << ATMEL_ID_PIODE, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIODE); at91_set_gpio_output(AT91_PIN_PD1, 0); at91_set_gpio_output(AT91_PIN_PD3, 0); @@ -117,11 +112,9 @@ static void picosam9g45_usb_hw_init(void) #ifdef CONFIG_MACB static void picosam9g45_macb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - /* Enable clock */ - writel(1 << ATMEL_ID_EMAC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC); /* * Disable pull-up on: @@ -181,8 +174,6 @@ void lcd_disable(void) static void picosam9g45_lcd_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */ at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */ at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */ @@ -214,7 +205,7 @@ static void picosam9g45_lcd_hw_init(void) at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */ at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */ - writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_LCDC); gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE; } diff --git a/board/pr1/Makefile b/board/pr1/Makefile index 4f375a8b5c..8caa3601f4 100644 --- a/board/pr1/Makefile +++ b/board/pr1/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) Switchfin Org. <dpn@switchfin.org> # diff --git a/board/pr1/pr1.c b/board/pr1/pr1.c index bb907f3966..3fffabdefb 100644 --- a/board/pr1/pr1.c +++ b/board/pr1/pr1.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) Switchfin Org. <dpn@switchfin.org> * diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 4b80d7b742..7f4fe64385 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -78,6 +78,11 @@ struct msg_get_clock_rate { * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/ * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733 * http://git.drogon.net/?p=wiringPi;a=blob;f=wiringPi/wiringPi.c;h=503151f61014418b9c42f4476a6086f75cd4e64b;hb=refs/heads/master#l922 + * + * In http://lists.denx.de/pipermail/u-boot/2016-January/243752.html + * ("[U-Boot] [PATCH] rpi: fix up Model B entries") Dom Cobley at the RPi + * Foundation stated that the following source was accurate: + * https://github.com/AndrewFromMelbourne/raspberry_pi_revision */ struct rpi_model { const char *name; @@ -110,28 +115,28 @@ static const struct rpi_model rpi_models_new_scheme[] = { static const struct rpi_model rpi_models_old_scheme[] = { [0x2] = { - "Model B (no P5)", - "bcm2835-rpi-b-i2c0.dtb", + "Model B", + "bcm2835-rpi-b.dtb", true, }, [0x3] = { - "Model B (no P5)", - "bcm2835-rpi-b-i2c0.dtb", + "Model B", + "bcm2835-rpi-b.dtb", true, }, [0x4] = { - "Model B", - "bcm2835-rpi-b.dtb", + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", true, }, [0x5] = { - "Model B", - "bcm2835-rpi-b.dtb", + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", true, }, [0x6] = { - "Model B", - "bcm2835-rpi-b.dtb", + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", true, }, [0x7] = { @@ -254,6 +259,9 @@ static void set_usbethaddr(void) eth_setenv_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac); + if (!getenv("ethaddr")) + setenv("ethaddr", getenv("usbethaddr")); + return; } diff --git a/board/ronetix/pm9261/led.c b/board/ronetix/pm9261/led.c index cc4c2a072b..53e353a75d 100644 --- a/board/ronetix/pm9261/led.c +++ b/board/ronetix/pm9261/led.c @@ -9,15 +9,12 @@ #include <common.h> #include <asm/gpio.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> void coloured_LED_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clock */ - writel(1 << ATMEL_ID_PIOC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOC); gpio_direction_output(CONFIG_RED_LED, 1); gpio_direction_output(CONFIG_GREEN_LED, 1); diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index b96f745773..3cc01cb687 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -14,7 +14,6 @@ #include <asm/gpio.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/at91_matrix.h> #include <asm/arch/clk.h> @@ -41,7 +40,6 @@ static void pm9261_nand_hw_init(void) unsigned long csa; struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; /* Enable CS3 */ csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; @@ -69,9 +67,8 @@ static void pm9261_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOA | - 1 << ATMEL_ID_PIOC, - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOC); /* Configure RDY/BSY */ gpio_direction_input(CONFIG_SYS_NAND_READY_PIN); @@ -89,7 +86,6 @@ static void pm9261_nand_hw_init(void) static void pm9261_dm9000_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; /* Configure SMC CS2 for DM9000 */ writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | @@ -110,7 +106,7 @@ static void pm9261_dm9000_hw_init(void) &smc->cs[2].mode); /* Configure Interrupt pin as input, no pull-up */ - writel(1 << ATMEL_ID_PIOA, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); at91_set_pio_input(AT91_PIO_PORTA, 24, 0); } #endif @@ -145,8 +141,6 @@ void lcd_disable(void) static void pm9261_lcd_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* LCDHSYNC */ at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* LCDDOTCK */ at91_set_a_periph(AT91_PIO_PORTB, 3, 0); /* LCDDEN */ @@ -170,7 +164,7 @@ static void pm9261_lcd_hw_init(void) at91_set_b_periph(AT91_PIO_PORTB, 27, 0); /* LCDD22 */ at91_set_b_periph(AT91_PIO_PORTB, 28, 0); /* LCDD23 */ - writel(1 << 17, &pmc->scer); /* LCD controller Clock, AT91SAM9261 only */ + at91_system_clk_enable(AT91_PMC_HCK1); gd->fb_base = ATMEL_BASE_SRAM; } @@ -224,12 +218,8 @@ void lcd_show_board_info(void) int board_early_init_f(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clocks for some PIOs */ - writel(1 << ATMEL_ID_PIOA | - 1 << ATMEL_ID_PIOC, - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOC); at91_seriald_hw_init(); diff --git a/board/ronetix/pm9263/led.c b/board/ronetix/pm9263/led.c index bfc2310b0e..8025a20a6a 100644 --- a/board/ronetix/pm9263/led.c +++ b/board/ronetix/pm9263/led.c @@ -9,15 +9,12 @@ #include <common.h> #include <asm/gpio.h> -#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> #include <asm/arch/gpio.h> void coloured_LED_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clock */ - writel(1 << ATMEL_ID_PIOB, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOB); gpio_direction_output(CONFIG_RED_LED, 1); gpio_direction_output(CONFIG_GREEN_LED, 1); diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index 1b00f08835..276ff80943 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -14,7 +14,6 @@ #include <asm/gpio.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/at91_matrix.h> #include <asm/arch/clk.h> @@ -78,8 +77,6 @@ static void pm9263_nand_hw_init(void) #ifdef CONFIG_MACB static void pm9263_macb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - /* * PB27 enables the 50MHz oscillator for Ethernet PHY * 1 - enable @@ -88,8 +85,7 @@ static void pm9263_macb_hw_init(void) at91_set_pio_output(AT91_PIO_PORTB, 27, 1); at91_set_pio_value(AT91_PIO_PORTB, 27, 1); /* 1- enable, 0 - disable */ - /* Enable clock */ - writel(1 << ATMEL_ID_EMAC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC); /* * Disable pull-up on: @@ -231,8 +227,6 @@ static int pm9263_lcd_hw_psram_init(void) static void pm9263_lcd_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDVSYNC */ at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */ at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */ @@ -257,7 +251,7 @@ static void pm9263_lcd_hw_init(void) at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */ at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */ - writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_LCDC); /* Power Control */ at91_set_pio_output(AT91_PIO_PORTA, 22, 1); @@ -323,12 +317,9 @@ void lcd_show_board_info(void) int board_early_init_f(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clocks for all PIOs */ - writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOCDE), - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOCDE); at91_seriald_hw_init(); diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c index efc4133bbf..c2707e0015 100644 --- a/board/ronetix/pm9g45/pm9g45.c +++ b/board/ronetix/pm9g45/pm9g45.c @@ -17,7 +17,6 @@ #include <asm/gpio.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/at91_matrix.h> #include <asm/arch/gpio.h> @@ -39,7 +38,6 @@ static void pm9g45_nand_hw_init(void) unsigned long csa; struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; /* Enable CS3 */ csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A; @@ -63,7 +61,7 @@ static void pm9g45_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(3), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOC); #ifdef CONFIG_SYS_NAND_READY_PIN /* Configure RDY/BSY */ @@ -78,8 +76,6 @@ static void pm9g45_nand_hw_init(void) #ifdef CONFIG_MACB static void pm9g45_macb_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - /* * PD2 enables the 50MHz oscillator for Ethernet PHY * 1 - enable @@ -88,8 +84,7 @@ static void pm9g45_macb_hw_init(void) at91_set_pio_output(AT91_PIO_PORTD, 2, 1); at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */ - /* Enable clock */ - writel(1 << ATMEL_ID_EMAC, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_EMAC); /* * Disable pull-up on: @@ -114,13 +109,10 @@ static void pm9g45_macb_hw_init(void) int board_early_init_f(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - - /* Enable clocks for all PIOs */ - writel((1 << ATMEL_ID_PIOA) | - (1 << ATMEL_ID_PIOB) | - (1 << ATMEL_ID_PIOC) | - (1 << ATMEL_ID_PIODE), &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOB); + at91_periph_clk_enable(ATMEL_ID_PIOC); + at91_periph_clk_enable(ATMEL_ID_PIODE); at91_seriald_hw_init(); diff --git a/board/sbc8349/README b/board/sbc8349/README index e2d60cc530..3c142e0407 100644 --- a/board/sbc8349/README +++ b/board/sbc8349/README @@ -30,21 +30,21 @@ image. Restoring a corrupted or missing flash image: ============================================= -Note that U-boot versions up to and including 2009.06 had essentially -two copies of u-boot in flash; one at the very beginning, which set +Note that U-Boot versions up to and including 2009.06 had essentially +two copies of U-Boot in flash; one at the very beginning, which set the HRCW, and one at the very end, which was the image that was run. As of this point in time, the two have been combined into just one at the beginning of flash, which provides both the HRCW, and the image that is executed. This frees up the remainder of flash for other uses. -Use of the u-boot command "fli" will indicate what parts are in use. -Details for storing U-boot to flash using a Wind River ICE can be found +Use of the U-Boot command "fli" will indicate what parts are in use. +Details for storing U-Boot to flash using a Wind River ICE can be found on page 19 of the board manual (request ERG-00328-001). The following is a summary of that information: - Connect ICE and establish connection to it from WorkBench/OCD. - Ensure you have background mode (BKM) in the OCD terminal window. - Select the appropriate flash type (listed above) - - Prepare a u-boot image by using the Wind River Convert utility; + - Prepare a U-Boot image by using the Wind River Convert utility; by using "Convert and Add file" on the ELF file from your build. Convert from FF80_0000 to FFFF_FFFF (or to FF83_FFFF if you are trying to preserve your old environment settings and user flash). @@ -55,9 +55,9 @@ is a summary of that information: Note that some versions of the register files used with Workbench would zero some TSEC registers, which inhibits ethernet operation -by u-boot when this register file is played to the target. Using +by U-Boot when this register file is played to the target. Using "INN" in the OCD terminal window instead of "IN" before the "GO" -will not play the register file, and allow u-boot to use the TSEC +will not play the register file, and allow U-Boot to use the TSEC interface while executed from the ICE "GO" command. Alternatively, you can locate the register file which will be named @@ -74,7 +74,7 @@ as u-boot.bin. Updating U-Boot with U-Boot: ============================ -This procedure is very similar to other boards that have u-boot installed. +This procedure is very similar to other boards that have U-Boot installed. Assuming that the network has been configured, and that the new u-boot.bin has been copied to the TFTP server, the commands are: @@ -98,7 +98,7 @@ There are three configuration choices: The 1st does not enable CONFIG_PCI, and assumes that the PCI slot will be left empty (M66EN high), and so the board will operate with -a base clock of 66MHz. Note that you need both PCI enabled in u-boot +a base clock of 66MHz. Note that you need both PCI enabled in U-Boot and linux in order to have functional PCI under linux. The only reason for choosing to not enable PCI would be if you had a very early (rev 1.0) CPU with possible PCI issues. diff --git a/board/sbc8548/README b/board/sbc8548/README index feac5e3e63..0def245bd9 100644 --- a/board/sbc8548/README +++ b/board/sbc8548/README @@ -7,10 +7,10 @@ memory. It also has 128MB SDRAM 100MHz LBC memory, with both a PCI-e, and a PCI-X slot, dual mini-DB9 for UART, and dual RJ-45 for eTSEC ethernet connections. -U-boot Configuration: +U-Boot Configuration: ===================== -The following possible u-boot configuration targets are available: +The following possible U-Boot configuration targets are available: 1) sbc8548_config 2) sbc8548_PCI_33_config @@ -23,7 +23,7 @@ of each choice are listed below. Choice #1 does not enable CONFIG_PCI, and assumes that the PCI slot will be left empty (M66EN high), and so the board will operate with -a base clock of 66MHz. Note that you need both PCI enabled in u-boot +a base clock of 66MHz. Note that you need both PCI enabled in U-Boot and linux in order to have functional PCI under linux. The second enables PCI support and builds for a 33MHz clock rate. Note @@ -100,13 +100,13 @@ from the board's socket to resolve the above i2c address overlap issue and allow SPD autodetection of RAM to work. -Updating U-boot with U-boot: +Updating U-Boot with U-Boot: ============================ -Note that versions of u-boot up to and including 2009.08 had u-boot stored +Note that versions of U-Boot up to and including 2009.08 had U-Boot stored at 0xfff8_0000 -> 0xffff_ffff (512k). Currently it is being stored from 0xfffa_0000 -> 0xffff_ffff (384k). If you use an old macro/script to -update u-boot with u-boot and it uses the old address, you will render +update U-Boot with U-Boot and it uses the old address, you will render your board inoperable, and you will require JTAG recovery. The following steps list how to update with the current address: @@ -120,11 +120,11 @@ The following steps list how to update with the current address: protect on all The "md" steps in the above are just a precautionary step that allow -you to confirm the u-boot version that was downloaded, and then confirm +you to confirm the U-Boot version that was downloaded, and then confirm that it was copied to flash. The above assumes that you are using the default board settings which -have u-boot in the 8MB flash, tied to /CS0. +have U-Boot in the 8MB flash, tied to /CS0. If you are running the default 8MB /CS0 settings but want to store an image in the SODIMM that is built with CONFIG_SYS_ALT_BOOT enabled, @@ -139,7 +139,7 @@ image in the SODIMM that is built with CONFIG_SYS_ALT_BOOT enabled, protect on all Finally, if you are running the alternate 64MB /CS0 settings and want -to update the in-use u-boot image, then (again with CONFIG_SYS_ALT_BOOT +to update the in-use U-Boot image, then (again with CONFIG_SYS_ALT_BOOT enabled) the steps will become: tftp u-boot.bin @@ -155,7 +155,7 @@ Hardware Reference: =================== The following contains some summary information on hardware settings -that are relevant to u-boot, based on the board manual. For the +that are relevant to U-Boot, based on the board manual. For the most up to date and complete details of the board, please request the reference manual ERG-00327-001.pdf from www.windriver.com @@ -166,7 +166,7 @@ Sodimm flash: intel V28F128Jx, 16384x8 (4 devices) at 0xfb80_0000 Note that this address reflects the default setting for the JTAG debugging tools, but since the alignment is - rather inconvenient, u-boot puts it at 0xec00_0000. + rather inconvenient, U-Boot puts it at 0xec00_0000. Jumpers: @@ -193,7 +193,7 @@ is jumpered parallel to the LBC-SDRAM, then /CS0 is for the SODIMM flash and /CS6 is for the boot flash. Note that in this alternate setting, you also need to switch SW2.8 to ON. See the setting CONFIG_SYS_ALT_BOOT if you want to use this setting -and boot u-boot from the 64MB SODIMM +and boot U-Boot from the 64MB SODIMM Switches: @@ -257,7 +257,7 @@ fb80_0000 ff7f_ffff CS6 32 SODIMM flash (64MB) [*] ff80_0000 ffff_ffff CS0 8 Boot flash (8MB) [*] fb80 represents the default programmed by WR JTAG register files, - but u-boot places the flash at either ec00 or fc00 based on JP12. + but U-Boot places the flash at either ec00 or fc00 based on JP12. The EPLD on CS5 demuxes the following devices at the following offsets: diff --git a/board/sbc8641d/README b/board/sbc8641d/README index d07f1ccf7c..4999b7763c 100644 --- a/board/sbc8641d/README +++ b/board/sbc8641d/README @@ -30,15 +30,15 @@ PCI: 4. Reflashing U-Boot -------------------- The board has two independent flash devices which can be used for dual -booting, or for u-boot backup and recovery. A two pin jumper on the +booting, or for U-Boot backup and recovery. A two pin jumper on the three pin JP10 determines which device is attached to /CS0 line. -Assuming one device has a functional u-boot, and the other device has +Assuming one device has a functional U-Boot, and the other device has a recently installed non-functional image, to perform a recovery from that non-functional image goes essentially as follows: a) power down the board and jumper JP10 to select the functional image. -b) power on the board and let it get to u-boot prompt. +b) power on the board and let it get to U-Boot prompt. c) while on, using static precautions, move JP10 back to the failed image. d) use "md fff00000" to confirm you are looking at the failed image e) turn off write protect with "prot off all" diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c index 6be0b987ca..08566fcb8d 100644 --- a/board/seco/mx6quq7/mx6quq7.c +++ b/board/seco/mx6quq7/mx6quq7.c @@ -122,7 +122,7 @@ int board_mmc_init(bd_t *bis) /* * Following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 eMMC on Board * mmc1 Ext SD */ diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c index 38c0ca3aae..9d5266151b 100644 --- a/board/siemens/corvus/board.c +++ b/board/siemens/corvus/board.c @@ -17,7 +17,6 @@ #include <asm/arch/at91sam9g45_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/clk.h> @@ -147,13 +146,11 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable DDR2 clock */ - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); @@ -210,10 +207,9 @@ int board_early_init_f(void) /* from ./arch/arm/mach-at91/armv7/sama5d3_devices.c */ void at91_udp_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - /* Enable UPLL clock */ - writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr); + at91_upll_clk_enable(); + /* Enable UDPHS clock */ at91_periph_clk_enable(ATMEL_ID_UDPHS); } diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c index d82f1b73a7..47a60a72ac 100644 --- a/board/siemens/smartweb/smartweb.c +++ b/board/siemens/smartweb/smartweb.c @@ -22,7 +22,6 @@ #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_spi.h> #include <spi.h> #include <asm/arch/clk.h> @@ -116,17 +115,13 @@ static void smartweb_macb_hw_init(void) void at91_udp_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; - /* Enable PLLB */ - writel(get_pllb_init(), &pmc->pllbr); - while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) - ; + at91_pllb_clk_enable(get_pllb_init()); /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */ at91_periph_clk_enable(ATMEL_ID_UDP); - writel(AT91SAM926x_PMC_UDP, &pmc->scer); + at91_system_clk_enable(AT91SAM926x_PMC_UDP); } struct at91_udc_data board_udc_data = { diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c index 72c5e6083d..b0385d8a6e 100644 --- a/board/siemens/taurus/taurus.c +++ b/board/siemens/taurus/taurus.c @@ -18,7 +18,6 @@ #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/at91sam9_sdramc.h> @@ -290,17 +289,13 @@ void spi_cs_deactivate(struct spi_slave *slave) void at91_udp_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; - /* Enable PLLB */ - writel(get_pllb_init(), &pmc->pllbr); - while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) - ; + at91_pllb_clk_enable(get_pllb_init()); /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */ at91_periph_clk_enable(ATMEL_ID_UDP); - writel(AT91SAM926x_PMC_UDP, &pmc->scer); + at91_system_clk_enable(AT91SAM926x_PMC_UDP); } struct at91_udc_data board_udc_data = { diff --git a/board/solidrun/mx6cuboxi/README b/board/solidrun/mx6cuboxi/README index b417ff0334..5d0a45d929 100644 --- a/board/solidrun/mx6cuboxi/README +++ b/board/solidrun/mx6cuboxi/README @@ -1,7 +1,7 @@ -How to use U-boot on Solid-run mx6 Hummingboard and Cubox-i +How to use U-Boot on Solid-run mx6 Hummingboard and Cubox-i ----------------------------------------------------------- -- Build U-boot for Hummingboard/Cubox-i: +- Build U-Boot for Hummingboard/Cubox-i: $ make mrproper $ make mx6cuboxi_defconfig @@ -17,5 +17,5 @@ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync -- Insert the SD card in the board, power it up and U-boot messages should +- Insert the SD card in the board, power it up and U-Boot messages should come up. diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c index 8bc2d9e4c1..fb8475f65f 100644 --- a/board/st/stm32f429-discovery/stm32f429-discovery.c +++ b/board/st/stm32f429-discovery/stm32f429-discovery.c @@ -19,6 +19,8 @@ #include <asm/arch/fmc.h> #include <dm/platdata.h> #include <dm/platform_data/serial_stm32.h> +#include <asm/arch/stm32_periph.h> +#include <asm/arch/stm32_defs.h> DECLARE_GLOBAL_DATA_PTR; @@ -286,6 +288,7 @@ int board_early_init_f(void) res = uart_setup_gpio(); if (res) return res; + clock_setup(USART1_CLOCK_CFG); return 0; } diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index d302fc23b6..f159af9fbe 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -220,7 +220,7 @@ int board_mmc_getcd(struct mmc *mmc) int board_mmc_init(bd_t *bis) { /* - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 SD2 * mmc1 SD3 * mmc2 eMMC diff --git a/board/tcm-bf518/Makefile b/board/tcm-bf518/Makefile index 2e029f5ce8..1ce8f64a08 100644 --- a/board/tcm-bf518/Makefile +++ b/board/tcm-bf518/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/tcm-bf518/tcm-bf518.c b/board/tcm-bf518/tcm-bf518.c index 4348678aeb..7923eae5d5 100644 --- a/board/tcm-bf518/tcm-bf518.c +++ b/board/tcm-bf518/tcm-bf518.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2008-2009 Analog Devices Inc. * diff --git a/board/tcm-bf537/Makefile b/board/tcm-bf537/Makefile index 93a01e4a3c..0fe25e80dc 100644 --- a/board/tcm-bf537/Makefile +++ b/board/tcm-bf537/Makefile @@ -1,5 +1,5 @@ # -# U-boot - Makefile +# U-Boot - Makefile # # Copyright (c) 2005-2008 Analog Device Inc. # diff --git a/board/tcm-bf537/tcm-bf537.c b/board/tcm-bf537/tcm-bf537.c index 2cf70cab15..19df51adab 100644 --- a/board/tcm-bf537/tcm-bf537.c +++ b/board/tcm-bf537/tcm-bf537.c @@ -1,5 +1,5 @@ /* - * U-boot - main board file + * U-Boot - main board file * * Copyright (c) 2005-2009 Analog Devices Inc. * diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 1bfb36243b..bec3b553bc 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -213,12 +213,12 @@ const struct pad_conf_entry dra74x_core_padconf_array[] = { {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */ - {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a13.qspi1_rtclk */ - {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a14.qspi1_d3 */ - {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a15.qspi1_d2 */ - {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a16.qspi1_d0 */ - {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a17.qspi1_d1 */ - {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a18.qspi1_sclk */ + {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ + {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ + {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ + {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ + {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ + {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ @@ -229,7 +229,7 @@ const struct pad_conf_entry dra74x_core_padconf_array[] = { {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ - {GPMC_CS2, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs2.qspi1_cs0 */ + {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ {VIN1A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_clk0.vin1a_clk0 */ {VIN1A_DE0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_de0.vin1a_de0 */ @@ -430,6 +430,14 @@ const struct iodelay_cfg_entry dra742_es1_1_iodelay_cfg_array[] = { {0x0AE0, 189, 1462}, /* CFG_VIN2A_D21_IN */ {0x0AEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ {0x0AF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ + {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ + {0x0150, 1976, 1389}, /* CFG_GPMC_A14_IN */ + {0x015C, 1872, 1408}, /* CFG_GPMC_A15_IN */ + {0x0168, 1914, 1506}, /* CFG_GPMC_A16_IN */ + {0x0170, 57, 0}, /* CFG_GPMC_A16_OUT */ + {0x0174, 1904, 1471}, /* CFG_GPMC_A17_IN */ + {0x0188, 1690, 0}, /* CFG_GPMC_A18_OUT */ + {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ }; const struct iodelay_cfg_entry dra742_es2_0_iodelay_cfg_array[] = { @@ -486,6 +494,14 @@ const struct iodelay_cfg_entry dra742_es2_0_iodelay_cfg_array[] = { {0x0AE0, 130, 1450}, /* CFG_VIN2A_D21_IN */ {0x0AEC, 144, 1269}, /* CFG_VIN2A_D22_IN */ {0x0AF8, 0, 1330}, /* CFG_VIN2A_D23_IN */ + {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ + {0x0150, 2575, 966}, /* CFG_GPMC_A14_IN */ + {0x015C, 2503, 889}, /* CFG_GPMC_A15_IN */ + {0x0168, 2528, 1007}, /* CFG_GPMC_A16_IN */ + {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ + {0x0174, 2533, 980}, /* CFG_GPMC_A17_IN */ + {0x0188, 590, 0}, /* CFG_GPMC_A18_OUT */ + {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ }; #endif diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README index 0fe5c3b9c3..05baff6e33 100644 --- a/board/ti/ks2_evm/README +++ b/board/ti/ks2_evm/README @@ -3,7 +3,7 @@ U-Boot port for Texas Instruments Keystone II EVM boards Author: Murali Karicheri <m-karicheri2@ti.com> -This README has information on the u-boot port for K2HK, K2E, and K2L EVM boards. +This README has information on the U-Boot port for K2HK, K2E, and K2L EVM boards. Documentation for this board can be found at http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx https://www.einfochips.com/index.php/partnerships/texas-instruments/k2e-evm.html @@ -23,7 +23,7 @@ The K2L SoC details are available at Board configuration: ==================== -Some of the peripherals that are configured by u-boot +Some of the peripherals that are configured by U-Boot +------+-------+-------+-----------+-----------+-------+-------+----+ | |DDR3 |NAND |MSM SRAM |ETH ports |UART |I2C |SPI | +------+-------+-------+-----------+-----------+-------+-------+----+ @@ -37,7 +37,7 @@ There are only 2 eth port installed on the boards. There are separate PLLs to drive clocks to Tetris ARM and Peripherals. To bring up SMP Linux on this board, there is a boot monitor code that will be installed in MSMC SRAM. There is command available -to install this image from u-boot. +to install this image from U-Boot. The port related files can be found at following folders keystone2 SoC related files: arch/arm/cpu/armv7/keystone/ @@ -48,7 +48,7 @@ include/configs/k2hk_evm.h include/configs/k2e_evm.h include/configs/k2l_evm.h -As u-boot is migrating to Kconfig there is also board defconfig files +As U-Boot is migrating to Kconfig there is also board defconfig files configs/k2e_evm_defconfig configs/k2hk_evm_defconfig configs/k2l_evm_defconfig @@ -80,7 +80,7 @@ Need Code Composer Studio (CCS) installed on a PC to load and run u-boot-dtb.bin on EVM. See instructions at below link for installing CCS on a Windows PC. http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started# Installing_Code_Composer_Studio -Use u-boot-dtb.bin from the build folder for loading and running u-boot binary +Use u-boot-dtb.bin from the build folder for loading and running U-Boot binary on EVM. Follow instructions at K2HK http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup K2E http://processors.wiki.ti.com/index.php/EVMK2E_Hardware_Setup @@ -94,7 +94,7 @@ Start CCS on a Windows machine and Launch Target configuration as instructed at http://processors.wiki.ti.com/index.php/ MCSDK_UG_Chapter_Exploring#Loading_and_Running_U-Boot_on_EVM_through_CCS. The instructions provided in the above link uses a script for -loading the u-boot binary on the target EVM. Instead do the following:- +loading the U-Boot binary on the target EVM. Instead do the following:- 1. Right click to "Texas Instruments XDS2xx USB Emulator_0/CortexA15_1 core (D is connected: Unknown)" at the debug window (This is created once Target @@ -126,41 +126,41 @@ SPI NOR Flash programming instructions U-Boot image can be flashed to first 512KB of the NOR flash using following instructions: -1. Start CCS and run U-boot as described above. +1. Start CCS and run U-Boot as described above. 2. Suspend Target. Select Run -> Suspend from top level menu CortexA15_1 (Free Running)" 3. Load u-boot-spi.gph binary from build folder on to DDR address 0x87000000 through CCS as described in step 2 of "Load and Run U-Boot on K2HK/K2E/K2L EVM using CCS", but using address 0x87000000. -4. Free Run the target as described earlier (step 4) to get u-boot prompt -5. At the U-Boot console type following to setup u-boot environment variables. +4. Free Run the target as described earlier (step 4) to get U-Boot prompt +5. At the U-Boot console type following to setup U-Boot environment variables. setenv addr_uboot 0x87000000 setenv filesize <size in hex of u-boot-spi.gph rounded to hex 0x10000> run burn_uboot_spi - Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch + Once U-Boot prompt is available, Power OFF the EVM. Set the SW1 dip switch to "SPI Little Endian Boot mode" as per instruction at http://processors.wiki.ti.com/index.php/*_Hardware_Setup. -6. Power ON the EVM. The EVM now boots with u-boot image on the NOR flash. +6. Power ON the EVM. The EVM now boots with U-Boot image on the NOR flash. AEMIF NAND Flash programming instructions ====================================== U-Boot image can be flashed to first 1024KB of the NAND flash using following instructions: -1. Start CCS and run U-boot as described above. +1. Start CCS and run U-Boot as described above. 2. Suspend Target. Select Run -> Suspend from top level menu CortexA15_1 (Free Running)" 3. Load MLO binary from build folder on to DDR address 0x87000000 through CCS as described in step 2 of "Load and Run U-Boot on K2HK EVM using CCS", but using address 0x87000000. -4. Free Run the target as described earlier (step 4) to get u-boot prompt -5. At the U-Boot console type following to setup u-boot environment variables. +4. Free Run the target as described earlier (step 4) to get U-Boot prompt +5. At the U-Boot console type following to setup U-Boot environment variables. setenv filesize <size in hex of MLO rounded to hex 0x10000> run burn_uboot_nand - Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch + Once U-Boot prompt is available, Power OFF the EVM. Set the SW1 dip switch to "ARM NAND Boot mode" as per instruction at http://processors.wiki.ti.com/index.php/*_Hardware_Setup. -6. Power ON the EVM. The EVM now boots with u-boot image on the NAND flash. +6. Power ON the EVM. The EVM now boots with U-Boot image on the NAND flash. Load and Run U-Boot on keystone EVMs using UART download ======================================================== @@ -171,4 +171,4 @@ Open BMC and regular UART terminals. 2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM BMC> bootmode #4 MBC> reboot -3. When xmodem is complete you should see the u-boot starts on the UART port +3. When xmodem is complete you should see the U-Boot starts on the UART port diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 73d94a6729..7d1709c880 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -56,6 +56,7 @@ int board_init(void) } #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET +#ifndef CONFIG_DM_ETH int get_eth_env_param(char *env_name) { char *env; @@ -105,6 +106,7 @@ int board_eth_init(bd_t *bis) return 0; } #endif +#endif #ifdef CONFIG_SPL_BUILD void spl_board_init(void) diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 83e1ddc734..879f25a538 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -114,7 +114,7 @@ void pin_mux_usb(void) } #endif -#ifdef CONFIG_VIDEO_TEGRA +#ifdef CONFIG_VIDEO_TEGRA20 /* * Routine: pin_mux_display * Description: setup the pin muxes/tristate values for the LCD interface) diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c index 8656782d86..7fc57da132 100644 --- a/board/tqc/tqma6/tqma6.c +++ b/board/tqc/tqma6/tqma6.c @@ -77,7 +77,7 @@ static iomux_v3_cfg_t const tqma6_usdhc3_pads[] = { /* * According to board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 eMMC (SD3) on TQMa6 * mmc1 .. n optional slots used on baseboard */ diff --git a/board/wandboard/README b/board/wandboard/README index c6c01322b6..6345416b2f 100644 --- a/board/wandboard/README +++ b/board/wandboard/README @@ -9,7 +9,7 @@ SoCs: mx6 quad, mx6 dual lite and mx6 solo. For more details about Wandboard, please refer to: http://www.wandboard.org/ -Building U-boot for Wandboard +Building U-Boot for Wandboard ----------------------------- To build U-Boot for the Wandboard: @@ -17,7 +17,7 @@ To build U-Boot for the Wandboard: $ make wandboard_config $ make -Flashing U-boot into the SD card +Flashing U-Boot into the SD card -------------------------------- - After the 'make' command completes, the generated 'SPL' binary must be @@ -36,4 +36,4 @@ as the mx6 processor) - Connect the serial cable to the host PC -- Power up the board and U-boot messages will appear in the serial console. +- Power up the board and U-Boot messages will appear in the serial console. diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index ac001edf3a..4ce74cd971 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -155,7 +155,7 @@ int board_mmc_init(bd_t *bis) /* * Following map is done: - * (U-boot device node) (Physical Port) + * (U-Boot device node) (Physical Port) * mmc0 SOM MicroSD * mmc1 Carrier board MicroSD */ diff --git a/board/warp/README b/board/warp/README index 22f9055eb6..3cfd22ec76 100644 --- a/board/warp/README +++ b/board/warp/README @@ -1,4 +1,4 @@ -How to Update U-boot on Warp board +How to Update U-Boot on Warp board ---------------------------------- Required software on the host PC: @@ -7,13 +7,13 @@ Required software on the host PC: - dfu-util: http://dfu-util.sourceforge.net/releases/ -Build U-boot for Warp: +Build U-Boot for Warp: $ make mrproper $ make warp_config $ make -This will generate the U-boot binary called u-boot.imx. +This will generate the U-Boot binary called u-boot.imx. Put warp board in USB download mode @@ -29,7 +29,7 @@ Load u-boot.imx via USB: $ sudo ./imx_usb u-boot.imx -Then U-boot should start and its messages will appear in the console program. +Then U-Boot should start and its messages will appear in the console program. Use the default environment variables: @@ -43,7 +43,7 @@ Transfer u-boot.imx that will be flashed into the eMMC: $ sudo dfu-util -D u-boot.imx -a boot -Then on the U-boot prompt the following message should be seen after a +Then on the U-Boot prompt the following message should be seen after a successful upgrade: #DOWNLOAD ... OK @@ -53,4 +53,4 @@ Remove power from the warp board. Put warp board into normal boot mode -Power up the board and the new updated U-boot should boot from eMMC +Power up the board and the new updated U-Boot should boot from eMMC |
