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-rw-r--r--board/BuR/common/bur_common.h4
-rw-r--r--board/BuR/common/common.c446
-rw-r--r--board/BuR/kwb/board.c152
-rw-r--r--board/BuR/kwb/mux.c51
-rw-r--r--board/BuR/tseries/board.c58
-rw-r--r--board/BuR/tseries/mux.c23
6 files changed, 636 insertions, 98 deletions
diff --git a/board/BuR/common/bur_common.h b/board/BuR/common/bur_common.h
index 15225b0724..39afbba7db 100644
--- a/board/BuR/common/bur_common.h
+++ b/board/BuR/common/bur_common.h
@@ -12,6 +12,10 @@
#ifndef _BUR_COMMON_H_
#define _BUR_COMMON_H_
+#include <../../../drivers/video/am335x-fb.h>
+
+int load_lcdtiming(struct am335x_lcdpanel *panel);
+void br_summaryscreen(void);
void blink(u32 blinks, u32 intervall, u32 pin);
void pmicsetup(u32 mpupll);
void enable_uart0_pin_mux(void);
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 25cbe62b1f..5ff8a7e0ae 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -9,7 +9,7 @@
* SPDX-License-Identifier: GPL-2.0+
*
*/
-
+#include <version.h>
#include <common.h>
#include <errno.h>
#include <spl.h>
@@ -26,10 +26,421 @@
#include <miiphy.h>
#include <cpsw.h>
#include <power/tps65217.h>
+#include <lcd.h>
+#include <fs.h>
+#ifdef CONFIG_USE_FDT
+ #include <fdt_support.h>
+#endif
#include "bur_common.h"
+#include "../../../drivers/video/am335x-fb.h"
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_USE_FDT
+ #define FDTPROP(a, b, c) fdt_getprop_u32_default((void *)a, b, c, ~0UL)
+ #define PATHTIM "/panel/display-timings/default"
+ #define PATHINF "/panel/panel-info"
+#endif
/* --------------------------------------------------------------------------*/
+#if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \
+ !defined(CONFIG_SPL_BUILD)
+int load_lcdtiming(struct am335x_lcdpanel *panel)
+{
+ struct am335x_lcdpanel pnltmp;
+#ifdef CONFIG_USE_FDT
+ u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
+ u32 dtbprop;
+
+ if (dtbaddr == ~0UL) {
+ puts("load_lcdtiming: failed to get 'dtbaddr' from env!\n");
+ return -1;
+ }
+ memcpy(&pnltmp, (void *)panel, sizeof(struct am335x_lcdpanel));
+
+ pnltmp.hactive = FDTPROP(dtbaddr, PATHTIM, "hactive");
+ pnltmp.vactive = FDTPROP(dtbaddr, PATHTIM, "vactive");
+ pnltmp.bpp = FDTPROP(dtbaddr, PATHINF, "bpp");
+ pnltmp.hfp = FDTPROP(dtbaddr, PATHTIM, "hfront-porch");
+ pnltmp.hbp = FDTPROP(dtbaddr, PATHTIM, "hback-porch");
+ pnltmp.hsw = FDTPROP(dtbaddr, PATHTIM, "hsync-len");
+ pnltmp.vfp = FDTPROP(dtbaddr, PATHTIM, "vfront-porch");
+ pnltmp.vbp = FDTPROP(dtbaddr, PATHTIM, "vback-porch");
+ pnltmp.vsw = FDTPROP(dtbaddr, PATHTIM, "vsync-len");
+ pnltmp.pup_delay = FDTPROP(dtbaddr, PATHTIM, "pupdelay");
+ pnltmp.pon_delay = FDTPROP(dtbaddr, PATHTIM, "pondelay");
+
+ /* calc. proper clk-divisor */
+ dtbprop = FDTPROP(dtbaddr, PATHTIM, "clock-frequency");
+ if (dtbprop != ~0UL)
+ pnltmp.pxl_clk_div = 192000000 / dtbprop;
+ else
+ pnltmp.pxl_clk_div = ~0UL;
+
+ /* check polarity of control-signals */
+ dtbprop = FDTPROP(dtbaddr, PATHTIM, "hsync-active");
+ if (dtbprop == 0)
+ pnltmp.pol |= HSYNC_INVERT;
+ dtbprop = FDTPROP(dtbaddr, PATHTIM, "vsync-active");
+ if (dtbprop == 0)
+ pnltmp.pol |= VSYNC_INVERT;
+ dtbprop = FDTPROP(dtbaddr, PATHINF, "sync-ctrl");
+ if (dtbprop == 1)
+ pnltmp.pol |= HSVS_CONTROL;
+ dtbprop = FDTPROP(dtbaddr, PATHINF, "sync-edge");
+ if (dtbprop == 1)
+ pnltmp.pol |= HSVS_RISEFALL;
+ dtbprop = FDTPROP(dtbaddr, PATHTIM, "pixelclk-active");
+ if (dtbprop == 0)
+ pnltmp.pol |= PXCLK_INVERT;
+ dtbprop = FDTPROP(dtbaddr, PATHTIM, "de-active");
+ if (dtbprop == 0)
+ pnltmp.pol |= DE_INVERT;
+#else
+ pnltmp.hactive = getenv_ulong("ds1_hactive", 10, ~0UL);
+ pnltmp.vactive = getenv_ulong("ds1_vactive", 10, ~0UL);
+ pnltmp.bpp = getenv_ulong("ds1_bpp", 10, ~0UL);
+ pnltmp.hfp = getenv_ulong("ds1_hfp", 10, ~0UL);
+ pnltmp.hbp = getenv_ulong("ds1_hbp", 10, ~0UL);
+ pnltmp.hsw = getenv_ulong("ds1_hsw", 10, ~0UL);
+ pnltmp.vfp = getenv_ulong("ds1_vfp", 10, ~0UL);
+ pnltmp.vbp = getenv_ulong("ds1_vbp", 10, ~0UL);
+ pnltmp.vsw = getenv_ulong("ds1_vsw", 10, ~0UL);
+ pnltmp.pxl_clk_div = getenv_ulong("ds1_pxlclkdiv", 10, ~0UL);
+ pnltmp.pol = getenv_ulong("ds1_pol", 16, ~0UL);
+ pnltmp.pup_delay = getenv_ulong("ds1_pupdelay", 10, ~0UL);
+ pnltmp.pon_delay = getenv_ulong("ds1_tondelay", 10, ~0UL);
+#endif
+ if (
+ ~0UL == (pnltmp.hactive) ||
+ ~0UL == (pnltmp.vactive) ||
+ ~0UL == (pnltmp.bpp) ||
+ ~0UL == (pnltmp.hfp) ||
+ ~0UL == (pnltmp.hbp) ||
+ ~0UL == (pnltmp.hsw) ||
+ ~0UL == (pnltmp.vfp) ||
+ ~0UL == (pnltmp.vbp) ||
+ ~0UL == (pnltmp.vsw) ||
+ ~0UL == (pnltmp.pxl_clk_div) ||
+ ~0UL == (pnltmp.pol) ||
+ ~0UL == (pnltmp.pup_delay) ||
+ ~0UL == (pnltmp.pon_delay)
+ ) {
+ puts("lcd-settings in env/dtb incomplete!\n");
+ printf("display-timings:\n"
+ "================\n"
+ "hactive: %d\n"
+ "vactive: %d\n"
+ "bpp : %d\n"
+ "hfp : %d\n"
+ "hbp : %d\n"
+ "hsw : %d\n"
+ "vfp : %d\n"
+ "vbp : %d\n"
+ "vsw : %d\n"
+ "pxlclk : %d\n"
+ "pol : 0x%08x\n"
+ "pondly : %d\n",
+ pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
+ pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
+ pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
+ pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay);
+
+ return -1;
+ }
+ debug("lcd-settings in env complete, taking over.\n");
+ memcpy((void *)panel,
+ (void *)&pnltmp,
+ sizeof(struct am335x_lcdpanel));
+
+ return 0;
+}
+
+#ifdef CONFIG_USE_FDT
+static int load_devicetree(void)
+{
+ char *dtbname = getenv("dtb");
+ char *dtbdev = getenv("dtbdev");
+ char *dtppart = getenv("dtbpart");
+ u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
+ loff_t dtbsize;
+
+ if (!dtbdev || !dtbdev) {
+ puts("load_devicetree: <dtbdev>/<dtbpart> missing.\n");
+ return -1;
+ }
+
+ if (fs_set_blk_dev(dtbdev, dtppart, FS_TYPE_EXT)) {
+ puts("load_devicetree: set_blk_dev failed.\n");
+ return -1;
+ }
+ if (dtbname && dtbaddr != ~0UL) {
+ if (fs_read(dtbname, dtbaddr, 0, 0, &dtbsize) == 0) {
+ gd->fdt_blob = (void *)dtbaddr;
+ gd->fdt_size = dtbsize;
+ debug("loaded %d bytes of dtb onto 0x%08x\n",
+ (u32)dtbsize, dtbaddr);
+ return dtbsize;
+ }
+ puts("load_devicetree: load dtb failed,file does not exist!\n");
+ }
+
+ puts("load_devicetree: <dtb>/<dtbaddr> missing!\n");
+ return -1;
+}
+
+static const char *dtbmacaddr(u32 ifno)
+{
+ int node, len;
+ char enet[16];
+ const char *mac;
+ const char *path;
+ u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
+
+ if (dtbaddr == ~0UL) {
+ puts("dtbmacaddr: failed to get 'dtbaddr' from env!\n");
+ return NULL;
+ }
+
+ node = fdt_path_offset((void *)dtbaddr, "/aliases");
+ if (node < 0)
+ return NULL;
+
+ sprintf(enet, "ethernet%d", ifno);
+ path = fdt_getprop((void *)dtbaddr, node, enet, NULL);
+ if (!path) {
+ printf("no alias for %s\n", enet);
+ return NULL;
+ }
+
+ node = fdt_path_offset((void *)dtbaddr, path);
+ mac = fdt_getprop((void *)dtbaddr, node, "mac-address", &len);
+ if (mac && is_valid_ether_addr((u8 *)mac))
+ return mac;
+
+ return NULL;
+}
+
+static void br_summaryscreen_printdtb(char *prefix,
+ char *name,
+ char *suffix)
+{
+ u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
+ char buf[32] = { 0 };
+ const char *nodep = buf;
+ char *mac = 0;
+ int nodeoffset;
+ int len;
+
+ if (dtbaddr == ~0UL) {
+ puts("br_summaryscreen: failed to get 'dtbaddr' from env!\n");
+ return;
+ }
+
+ if (strcmp(name, "brmac1") == 0) {
+ mac = (char *)dtbmacaddr(0);
+ if (mac)
+ sprintf(buf, "%pM", mac);
+ } else if (strcmp(name, "brmac2") == 0) {
+ mac = (char *)dtbmacaddr(1);
+ if (mac)
+ sprintf(buf, "%pM", mac);
+ } else {
+ nodeoffset = fdt_path_offset((void *)dtbaddr,
+ "/factory-settings");
+ if (nodeoffset < 0) {
+ puts("no 'factory-settings' in dtb!\n");
+ return;
+ }
+ nodep = fdt_getprop((void *)dtbaddr, nodeoffset, name, &len);
+ }
+ if (nodep && strlen(nodep) > 1)
+ lcd_printf("%s %s %s", prefix, nodep, suffix);
+ else
+ lcd_printf("\n");
+}
+int ft_board_setup(void *blob, bd_t *bd)
+{
+ int nodeoffset;
+
+ nodeoffset = fdt_path_offset(blob, "/factory-settings");
+ if (nodeoffset < 0) {
+ puts("set bootloader version 'factory-settings' not in dtb!\n");
+ return -1;
+ }
+ if (fdt_setprop(blob, nodeoffset, "bl-version",
+ PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
+ puts("set bootloader version 'bl-version' prop. not in dtb!\n");
+ return -1;
+ }
+ return 0;
+}
+#else
+
+static void br_summaryscreen_printenv(char *prefix,
+ char *name, char *altname,
+ char *suffix)
+{
+ char *envval = getenv(name);
+ if (0 != envval) {
+ lcd_printf("%s %s %s", prefix, envval, suffix);
+ } else if (0 != altname) {
+ envval = getenv(altname);
+ if (0 != envval)
+ lcd_printf("%s %s %s", prefix, envval, suffix);
+ } else {
+ lcd_printf("\n");
+ }
+}
+#endif
+void br_summaryscreen(void)
+{
+#ifdef CONFIG_USE_FDT
+ br_summaryscreen_printdtb(" - B&R -", "order-no", "-\n");
+ br_summaryscreen_printdtb(" Serial/Rev :", "serial-no", " /");
+ br_summaryscreen_printdtb(" ", "hw-revision", "\n");
+ br_summaryscreen_printdtb(" MAC (IF1) :", "brmac1", "\n");
+ br_summaryscreen_printdtb(" MAC (IF2) :", "brmac2", "\n");
+ lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
+ lcd_puts("\n");
+#else
+ br_summaryscreen_printenv(" - B&R -", "br_orderno", 0, "-\n");
+ br_summaryscreen_printenv(" Serial/Rev :", "br_serial", 0, "\n");
+ br_summaryscreen_printenv(" MAC (IF1) :", "br_mac1", "ethaddr", "\n");
+ br_summaryscreen_printenv(" MAC (IF2) :", "br_mac2", 0, "\n");
+ lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
+ lcd_puts("\n");
+#endif
+}
+
+void lcdpower(int on)
+{
+ u32 pin, swval, i;
+#ifdef CONFIG_USE_FDT
+ u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
+
+ if (dtbaddr == ~0UL) {
+ puts("lcdpower: failed to get 'dtbaddr' from env!\n");
+ return;
+ }
+ pin = FDTPROP(dtbaddr, PATHINF, "pwrpin");
+#else
+ pin = getenv_ulong("ds1_pwr", 16, ~0UL);
+#endif
+ if (pin == ~0UL) {
+ puts("no pwrpin in dtb/env, cannot powerup display!\n");
+ return;
+ }
+
+ for (i = 0; i < 3; i++) {
+ if (pin != 0) {
+ swval = pin & 0x80 ? 0 : 1;
+ if (on)
+ gpio_direction_output(pin & 0x7F, swval);
+ else
+ gpio_direction_output(pin & 0x7F, !swval);
+
+ debug("switched pin %d to %d\n", pin & 0x7F, swval);
+ }
+ pin >>= 8;
+ }
+}
+
+vidinfo_t panel_info = {
+ .vl_col = 1366, /*
+ * give full resolution for allocating enough
+ * memory
+ */
+ .vl_row = 768,
+ .vl_bpix = 5,
+ .priv = 0
+};
+
+void lcd_ctrl_init(void *lcdbase)
+{
+ struct am335x_lcdpanel lcd_panel;
+#ifdef CONFIG_USE_FDT
+ /* TODO: is there a better place to load the dtb ? */
+ load_devicetree();
+#endif
+ memset(&lcd_panel, 0, sizeof(struct am335x_lcdpanel));
+ if (load_lcdtiming(&lcd_panel) != 0)
+ return;
+
+ lcd_panel.panel_power_ctrl = &lcdpower;
+
+ if (0 != am335xfb_init(&lcd_panel))
+ printf("ERROR: failed to initialize video!");
+ /*
+ * modifiy panel info to 'real' resolution, to operate correct with
+ * lcd-framework.
+ */
+ panel_info.vl_col = lcd_panel.hactive;
+ panel_info.vl_row = lcd_panel.vactive;
+
+ lcd_set_flush_dcache(1);
+}
+
+void lcd_enable(void)
+{
+#ifdef CONFIG_USE_FDT
+ u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
+
+ if (dtbaddr == ~0UL) {
+ puts("lcdpower: failed to get 'dtbaddr' from env!\n");
+ return;
+ }
+ unsigned int driver = FDTPROP(dtbaddr, PATHINF, "brightdrv");
+ unsigned int bright = FDTPROP(dtbaddr, PATHINF, "brightdef");
+ unsigned int pwmfrq = FDTPROP(dtbaddr, PATHINF, "brightfdim");
+#else
+ unsigned int driver = getenv_ulong("ds1_bright_drv", 16, 0UL);
+ unsigned int bright = getenv_ulong("ds1_bright_def", 10, 50);
+ unsigned int pwmfrq = getenv_ulong("ds1_pwmfreq", 10, ~0UL);
+#endif
+ unsigned int tmp;
+ struct gptimer *const timerhw = (struct gptimer *)DM_TIMER6_BASE;
+
+ bright = bright != ~0UL ? bright : 50;
+
+ switch (driver) {
+ case 0: /* PMIC LED-Driver */
+ /* brightness level */
+ tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
+ TPS65217_WLEDCTRL2, bright, 0xFF);
+ /* turn on light */
+ tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
+ TPS65217_WLEDCTRL1, 0x0A, 0xFF);
+ break;
+ case 1: /* PWM using timer6 */
+ if (pwmfrq != ~0UL) {
+ timerhw->tiocp_cfg = TCFG_RESET;
+ udelay(10);
+ while (timerhw->tiocp_cfg & TCFG_RESET)
+ ;
+ tmp = ~0UL-(V_OSCK/pwmfrq); /* bottom value */
+ timerhw->tldr = tmp;
+ timerhw->tcrr = tmp;
+ tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright;
+ timerhw->tmar = tmp;
+ timerhw->tclr = (TCLR_PT | (2 << TCLR_TRG_SHIFT) |
+ TCLR_CE | TCLR_AR | TCLR_ST);
+ } else {
+ puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n");
+ }
+ break;
+ default:
+ puts("no suitable backlightdriver in env/dtb!\n");
+ break;
+ }
+ br_summaryscreen();
+}
+#elif CONFIG_SPL_BUILD
+#else
+#error "LCD-support with a suitable FB-Driver is mandatory !"
+#endif /* CONFIG_LCD */
+
void blink(u32 blinks, u32 intervall, u32 pin)
{
gpio_direction_output(pin, 0);
@@ -43,6 +454,7 @@ void blink(u32 blinks, u32 intervall, u32 pin)
gpio_set_value(pin, 0);
}
+
#ifdef CONFIG_SPL_BUILD
void pmicsetup(u32 mpupll)
{
@@ -115,6 +527,9 @@ void pmicsetup(u32 mpupll)
/* Set MPU Frequency to what we detected now that voltages are set */
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
+ /* Set PWR_EN bit in Status Register */
+ tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
+ TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
}
void set_uart_mux_conf(void)
@@ -176,9 +591,9 @@ static struct cpsw_platform_data cpsw_data = {
int board_eth_init(bd_t *bis)
{
int rv = 0;
- uint8_t mac_addr[6];
+ char mac_addr[6];
+ const char *mac = 0;
uint32_t mac_hi, mac_lo;
-
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_hi = readl(&cdev->macid0h);
@@ -192,14 +607,19 @@ int board_eth_init(bd_t *bis)
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
if (!getenv("ethaddr")) {
- printf("<ethaddr> not set. Validating first E-fuse MAC ... ");
-
- if (is_valid_ether_addr(mac_addr)) {
- printf("using: %02X:%02X:%02X:%02X:%02X:%02X.\n",
- mac_addr[0], mac_addr[1], mac_addr[2],
- mac_addr[3], mac_addr[4], mac_addr[5]
- );
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_FDT)
+ printf("<ethaddr> not set. trying DTB ... ");
+ mac = dtbmacaddr(0);
+ #endif
+ if (!mac) {
+ printf("<ethaddr> not set. validating E-fuse MAC ... ");
+ if (is_valid_ether_addr((const u8 *)mac_addr))
+ mac = (const char *)mac_addr;
+ }
+
+ if (mac) {
+ printf("using: %pM on ", mac);
+ eth_setenv_enetaddr("ethaddr", (const u8 *)mac);
}
}
writel(MII_MODE_ENABLE, &cdev->miisel);
@@ -221,3 +641,7 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(1, 0, 0, -1, -1);
}
#endif
+int overwrite_console(void)
+{
+ return 1;
+}
diff --git a/board/BuR/kwb/board.c b/board/BuR/kwb/board.c
index 804765a8de..892311e6ee 100644
--- a/board/BuR/kwb/board.c
+++ b/board/BuR/kwb/board.c
@@ -26,14 +26,13 @@
#include <i2c.h>
#include <power/tps65217.h>
#include "../common/bur_common.h"
+#include <lcd.h>
/* -------------------------------------------------------------------------*/
/* -- defines for used GPIO Hardware -- */
-#define KEY (0+4)
-#define LCD_PWR (0+5)
-#define PUSH_KEY (0+31)
-#define USB2SD_NRST (32+29)
-#define USB2SD_PWR (96+13)
+#define ESC_KEY (0+19)
+#define LCD_PWR (0+5)
+#define PUSH_KEY (0+31)
/* -------------------------------------------------------------------------*/
/* -- PSOC Resetcontroller Register defines -- */
@@ -46,6 +45,13 @@
/* -- defines for RSTCTRL_CTRLREG -- */
#define RSTCTRL_FORCE_PWR_NEN 0x0404
+#define RSTCTRL_CAN_STB 0x4040
+
+#define VXWORKS_BOOTLINE 0x80001100
+#define DEFAULT_BOOTLINE "cpsw(0,0):pme/vxWorks"
+#define VXWORKS_USER "u=vxWorksFTP pw=vxWorks tn=vxtarget"
+
+DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_SPL_BUILD)
/* TODO: check ram-timing ! */
@@ -107,10 +113,13 @@ void am33xx_spl_board_init(void)
&cmper->epwmss0clkctrl,
&cmper->epwmss1clkctrl,
&cmper->epwmss2clkctrl,
+ &cmper->lcdclkctrl,
+ &cmper->lcdcclkstctrl,
0
};
do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1);
-
+ /* setup LCD-Pixel Clock */
+ writel(0x2, CM_DPLL + 0x34);
/* power-OFF LCD-Display */
gpio_direction_output(LCD_PWR, 0);
@@ -121,7 +130,7 @@ void am33xx_spl_board_init(void)
/* power-ON 3V3 via Resetcontroller */
oldspeed = i2c_get_bus_speed();
if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
- buf = RSTCTRL_FORCE_PWR_NEN;
+ buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1,
(uint8_t *)&buf, sizeof(buf));
i2c_set_bus_speed(oldspeed);
@@ -129,15 +138,6 @@ void am33xx_spl_board_init(void)
puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n");
}
-#if defined(CONFIG_AM335X_USB0)
- /* power on USB2SD Controller */
- gpio_direction_output(USB2SD_PWR, 1);
- mdelay(1);
- /* give a reset Pulse to USB2SD Controller */
- gpio_direction_output(USB2SD_NRST, 0);
- mdelay(1);
- gpio_set_value(USB2SD_NRST, 1);
-#endif
pmicsetup(0);
}
@@ -166,59 +166,111 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
- const unsigned int ton = 250;
const unsigned int toff = 1000;
unsigned int cnt = 3;
unsigned short buf = 0xAAAA;
+ unsigned char scratchreg = 0;
unsigned int oldspeed;
- tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
- TPS65217_WLEDCTRL2, 0x32, 0xFF); /* 50% dimlevel */
+ /* try to read out some boot-instruction from resetcontroller */
+ oldspeed = i2c_get_bus_speed();
+ if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
+ i2c_read(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
+ &scratchreg, sizeof(scratchreg));
+ i2c_set_bus_speed(oldspeed);
+ } else {
+ puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
+ }
- if (gpio_get_value(KEY)) {
+ if (gpio_get_value(ESC_KEY)) {
do {
- /* turn on light */
- tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
- TPS65217_WLEDCTRL1, 0x09, 0xFF);
- mdelay(ton);
- /* turn off light */
- tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
- TPS65217_WLEDCTRL1, 0x01, 0xFF);
+ lcd_position_cursor(1, 8);
+ switch (cnt) {
+ case 3:
+ lcd_puts(
+ "release ESC-KEY to enter SERVICE-mode.");
+ break;
+ case 2:
+ lcd_puts(
+ "release ESC-KEY to enter DIAGNOSE-mode.");
+ break;
+ case 1:
+ lcd_puts(
+ "release ESC-KEY to enter BOOT-mode. ");
+ break;
+ }
mdelay(toff);
cnt--;
- if (!gpio_get_value(KEY) &&
+ if (!gpio_get_value(ESC_KEY) &&
+ gpio_get_value(PUSH_KEY) && 2 == cnt) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "switching to network-console ... ");
+ setenv("bootcmd", "run netconsole");
+ cnt = 4;
+ break;
+ } else if (!gpio_get_value(ESC_KEY) &&
gpio_get_value(PUSH_KEY) && 1 == cnt) {
- puts("updating from USB ...\n");
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "updating U-BOOT from USB ... ");
setenv("bootcmd", "run usbupdate");
+ cnt = 4;
+ break;
+ } else if ((!gpio_get_value(ESC_KEY) &&
+ gpio_get_value(PUSH_KEY) && cnt == 0) ||
+ (gpio_get_value(ESC_KEY) &&
+ gpio_get_value(PUSH_KEY) && cnt == 0)) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting script from network ... ");
+ setenv("bootcmd", "run netscript");
+ cnt = 4;
break;
- } else if (!gpio_get_value(KEY)) {
+ } else if (!gpio_get_value(ESC_KEY)) {
break;
}
} while (cnt);
+ } else if (scratchreg == 0xCC) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting vxworks from network ... ");
+ setenv("bootcmd", "run netboot");
+ cnt = 4;
+ } else if (scratchreg == 0xCD) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting script from network ... ");
+ setenv("bootcmd", "run netscript");
+ cnt = 4;
+ } else if (scratchreg == 0xCE) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting AR from eMMC ... ");
+ setenv("bootcmd", "run mmcboot");
+ cnt = 4;
}
+ lcd_position_cursor(1, 8);
switch (cnt) {
case 0:
- puts("3 blinks ... entering BOOT mode.\n");
+ lcd_puts("entering BOOT-mode. ");
+ setenv("bootcmd", "run defaultAR");
buf = 0x0000;
break;
case 1:
- puts("2 blinks ... entering DIAGNOSE mode.\n");
+ lcd_puts("entering DIAGNOSE-mode. ");
buf = 0x0F0F;
break;
case 2:
- puts("1 blinks ... entering SERVICE mode.\n");
+ lcd_puts("entering SERVICE mode. ");
buf = 0xB4B4;
break;
case 3:
- puts("0 blinks ... entering RUN mode.\n");
+ lcd_puts("loading OS... ");
buf = 0x0404;
break;
}
- mdelay(ton);
- /* turn on light */
- tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
- TPS65217_WLEDCTRL1, 0x09, 0xFF);
/* write bootinfo into scratchregister of resetcontroller */
oldspeed = i2c_get_bus_speed();
if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
@@ -228,6 +280,30 @@ int board_late_init(void)
} else {
puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
}
+ /* setup vxworks bootline */
+ char *vxworksbootline = (char *)VXWORKS_BOOTLINE;
+
+ /* setup default IP, in case if there is nothing in environment */
+ if (!getenv("ipaddr")) {
+ setenv("ipaddr", "192.168.60.1");
+ setenv("netmask", "255.255.255.0");
+ setenv("serverip", "192.168.60.254");
+ setenv("gatewayip", "192.168.60.254");
+ puts("net: had no IP! made default setup.\n");
+ }
+
+ sprintf(vxworksbootline,
+ "%s h=%s e=%s:%s g=%s %s o=0x%08x;0x%08x;0x%08x;0x%08x",
+ DEFAULT_BOOTLINE,
+ getenv("serverip"),
+ getenv("ipaddr"), getenv("netmask"),
+ getenv("gatewayip"),
+ VXWORKS_USER,
+ (unsigned int) gd->fb_base-0x20,
+ (u32)getenv_ulong("vx_memtop", 16, gd->fb_base-0x20),
+ (u32)getenv_ulong("vx_romfsbase", 16, 0),
+ (u32)getenv_ulong("vx_romfssize", 16, 0));
+
/*
* reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
* expect that vectors are there, original u-boot moves them to _start
diff --git a/board/BuR/kwb/mux.c b/board/BuR/kwb/mux.c
index ecb2e7a427..9f89b5e53d 100644
--- a/board/BuR/kwb/mux.c
+++ b/board/BuR/kwb/mux.c
@@ -16,23 +16,17 @@
#include <asm/io.h>
#include <i2c.h>
-static struct module_pin_mux usb0_pin_mux[] = {
- {OFFSET(usb0_id), (MODE(0) | RXACTIVE)},
- /* USB0 DrvBus Receiver disable (from romcode 0x20) */
- {OFFSET(usb0_drvvbus), (MODE(0))},
- /* USB1 DrvBus as GPIO due to HW-Workaround */
- {OFFSET(usb1_drvvbus), (MODE(7))},
- {-1},
-};
-static struct module_pin_mux spi1_pin_mux[] = {
+static struct module_pin_mux spi0_pin_mux[] = {
/* SPI1_SCLK */
- {OFFSET(mcasp0_aclkx), MODE(3) | PULLUDEN | RXACTIVE},
+ {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE},
/* SPI1_D0 */
- {OFFSET(mcasp0_fsx), MODE(3) | PULLUDEN | RXACTIVE},
+ {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE},
/* SPI1_D1 */
- {OFFSET(mcasp0_axr0), MODE(3) | PULLUDEN | RXACTIVE},
+ {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE},
/* SPI1_CS0 */
- {OFFSET(mcasp0_ahclkr), MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE},
+ {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
+ /* SPI1_CS1 */
+ {OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
{-1},
};
@@ -53,30 +47,34 @@ static struct module_pin_mux dcan1_pin_mux[] = {
};
static struct module_pin_mux gpios[] = {
- /* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */
- {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)},
- /* GPIO0_4 (SPI D1) - TA602 */
- {OFFSET(spi0_d1), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO0_5 (SPI CS0) - DISPLAY_ON_OFF */
- {OFFSET(spi0_cs0), (MODE(7) | PULLUDDIS)},
/* GPIO0_7 (PWW0 OUT) - CAN TERM */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO0_19 (DMA_INTR0) - CLKOUT SYS */
- {OFFSET(xdma_event_intr0), (MODE(7) | RXACTIVE)},
- /* GPIO0_20 (DMA_INTR1) - SPI1 nCS1 */
- {OFFSET(xdma_event_intr1), (MODE(7) | PULLUDEN | PULLUP_EN)},
+ /* GPIO0_19 (DMA_INTR0) - TA602 */
+ {OFFSET(xdma_event_intr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO0_20 (DMA_INTR1) - SPI0 nCS1 */
+ {OFFSET(xdma_event_intr1), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */
+ {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)},
/* GPIO0_30 (GPMC_WAIT0) - TA601 */
{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO0_31 (GPMC_nWP) - SW601 PushButton */
{OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO1_28 (GPMC_nWE) - FRAM_nWP */
{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},
+ /* GPIO1_29 (gpmc_csn0) - MMC nRST */
+ {OFFSET(gpmc_csn0), (MODE(7) | PULLUDDIS)},
/* GPIO2_0 (GPMC_nCS3) - VBAT_OK */
{OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) },
/* GPIO2_2 (GPMC_nADV_ALE) - DCOK */
{OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO2_4 (GPMC_nWE) - TST_BAST */
{OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)},
+ /* GPIO2_5 (gpmc_be0n_cle) - DISPLAY_ON_OFF */
+ {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLUDDIS)},
+ /* GPIO3_16 (mcasp0_axr0) - ETH-LED green */
+ {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO3_17 (mcasp0_ahclkr) - CAN_STB */
+ {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO3_18 (MCASP0_ACLKR) - SW601 CNTup, mapped to Counter eQEB0A_in */
{OFFSET(mcasp0_aclkr), (MODE(1) | PULLUDDIS | RXACTIVE)},
/* GPIO3_19 (MCASP0_FSR) - SW601 CNTdown, mapped to Counter eQEB0B_in */
@@ -126,6 +124,10 @@ static struct module_pin_mux mii1_pin_mux[] = {
};
static struct module_pin_mux mmc1_pin_mux[] = {
+ {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
+ {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
+ {OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT5 */
+ {OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT4 */
{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
@@ -187,8 +189,7 @@ void enable_board_pin_mux(void)
{
configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(mii1_pin_mux);
- configure_module_pin_mux(usb0_pin_mux);
- configure_module_pin_mux(spi1_pin_mux);
+ configure_module_pin_mux(spi0_pin_mux);
configure_module_pin_mux(dcan0_pin_mux);
configure_module_pin_mux(dcan1_pin_mux);
configure_module_pin_mux(mmc1_pin_mux);
diff --git a/board/BuR/tseries/board.c b/board/BuR/tseries/board.c
index c0178e75cf..9402aa4205 100644
--- a/board/BuR/tseries/board.c
+++ b/board/BuR/tseries/board.c
@@ -27,15 +27,15 @@
#include <i2c.h>
#include <power/tps65217.h>
#include "../common/bur_common.h"
+#include <lcd.h>
+#include <watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
/* --------------------------------------------------------------------------*/
/* -- defines for GPIO -- */
-#define ETHLED_ORANGE (96+16) /* GPIO3_16 */
#define REPSWITCH (0+20) /* GPIO0_20 */
-
#if defined(CONFIG_SPL_BUILD)
/* TODO: check ram-timing ! */
static const struct ddr_data ddr3_data = {
@@ -82,7 +82,6 @@ static const struct ctrl_ioregs ddr3_ioregs = {
int spl_start_uboot(void)
{
if (0 == gpio_get_value(REPSWITCH)) {
- blink(5, 125, ETHLED_ORANGE);
mdelay(1000);
printf("SPL: entering u-boot instead kernel image.\n");
return 1;
@@ -96,7 +95,35 @@ static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
void am33xx_spl_board_init(void)
{
- pmicsetup(1000);
+ struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
+ /*struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;*/
+ struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL;
+
+ /*
+ * in TRM they write a reset value of 1 (=CLK_M_OSC) for the
+ * CLKSEL_TIMER6_CLK Register, in fact reset value is 0, so we need set
+ * the source of timer6 clk to CLK_M_OSC
+ */
+ writel(0x01, &cmdpll->clktimer6clk);
+
+ /* enable additional clocks of modules which are accessed later */
+ u32 *const clk_domains[] = {
+ &cmper->lcdcclkstctrl,
+ 0
+ };
+
+ u32 *const clk_modules_tsspecific[] = {
+ &cmper->lcdclkctrl,
+ &cmper->timer5clkctrl,
+ &cmper->timer6clkctrl,
+ 0
+ };
+ do_enable_clocks(clk_domains, clk_modules_tsspecific, 1);
+
+ /* setup LCD-Pixel Clock */
+ writel(0x2, &cmdpll->clklcdcpixelclk); /* clock comes from perPLL M2 */
+
+ pmicsetup(0);
}
const struct dpll_params *get_dpll_ddr_params(void)
@@ -116,6 +143,9 @@ void sdram_init(void)
/* Basic board specific setup. Pinmux has been handled already. */
int board_init(void)
{
+#if defined(CONFIG_HW_WATCHDOG)
+ hw_watchdog_init();
+#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_NAND
gpmc_init();
@@ -126,24 +156,12 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
- gpio_direction_output(ETHLED_ORANGE, 0);
-
if (0 == gpio_get_value(REPSWITCH)) {
- printf("\n\n\n"
- "!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"
- "!!!!!!! recovery switch activated !!!!!!!\n"
- "!!!!!!! running usbupdate !!!!!!!\n"
- "!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n\n\n");
- setenv("bootcmd", "sleep 2; run netupdate;");
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "switching to network-console ... ");
+ setenv("bootcmd", "run netconsole");
}
-
- printf("turning on display power+backlight ... ");
- tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL1,
- 0x09, TPS65217_MASK_ALL_BITS); /* 200 Hz, ON */
- tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL2,
- 0x62, TPS65217_MASK_ALL_BITS); /* 100% */
- printf("ok.\n");
-
return 0;
}
#endif /* CONFIG_BOARD_LATE_INIT */
diff --git a/board/BuR/tseries/mux.c b/board/BuR/tseries/mux.c
index 0ba25ee318..2c87a63b85 100644
--- a/board/BuR/tseries/mux.c
+++ b/board/BuR/tseries/mux.c
@@ -25,6 +25,13 @@ static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
{-1},
};
+static struct module_pin_mux uart1_pin_mux[] = {
+ /* UART0_RXD */
+ {OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
+ /* UART0_TXD */
+ {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},
+ {-1},
+};
#ifdef CONFIG_MMC
static struct module_pin_mux mmc1_pin_mux[] = {
{OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
@@ -131,9 +138,9 @@ static struct module_pin_mux gpIOs[] = {
{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
/* TIMER5 (MMC0_DAT3) - TIMER5 (Buzzer) */
{OFFSET(mmc0_dat3), (MODE(3) | PULLUDEN | RXACTIVE)},
- /* TIMER6 (MMC0_DAT2) - PWM_BACK_3V3, later used as MODE3 for PWM */
- {OFFSET(mmc0_dat2), (MODE(7) | PULLUDEN | RXACTIVE)},
- /* GPIO2_27 (MMC0_DAT1) - MII_nNAND */
+ /* TIMER6 (MMC0_DAT2) - PWM_BACK_3V3 */
+ {OFFSET(mmc0_dat2), (MODE(3) | PULLUDEN | RXACTIVE)},
+ /* GPIO2_28 (MMC0_DAT1) - MII_nNAND */
{OFFSET(mmc0_dat1), (MODE(7) | PULLUDEN | RXACTIVE)},
/* GPIO2_29 (MMC0_DAT0) - NAND_1n0 */
{OFFSET(mmc0_dat0), (MODE(7) | PULLUDEN | RXACTIVE)},
@@ -168,7 +175,14 @@ static struct module_pin_mux gpIOs[] = {
{OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) },
/* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) },
-
+#ifndef CONFIG_NAND
+ /* GPIO2_3 - NAND_OE */
+ {OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
+ /* GPIO2_4 - NAND_WEN */
+ {OFFSET(gpmc_wen), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
+ /* GPIO2_5 - NAND_BE_CLE */
+ {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
+#endif
{-1},
};
@@ -229,5 +243,6 @@ void enable_board_pin_mux(void)
#endif
configure_module_pin_mux(spi0_pin_mux);
configure_module_pin_mux(lcd_pin_mux);
+ configure_module_pin_mux(uart1_pin_mux);
configure_module_pin_mux(gpIOs);
}
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