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-rw-r--r--arch/nios2/config.mk2
-rw-r--r--arch/nios2/cpu/start.S9
-rw-r--r--arch/nios2/include/asm/byteorder.h6
-rw-r--r--arch/nios2/include/asm/dma-mapping.h23
-rw-r--r--arch/nios2/lib/board.c18
-rw-r--r--arch/powerpc/cpu/mpc5xxx/serial.c2
-rw-r--r--arch/powerpc/cpu/mpc8xx/serial.c2
-rw-r--r--arch/powerpc/cpu/ppc4xx/4xx_uart.c2
8 files changed, 58 insertions, 6 deletions
diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk
index f455982f3a..8e5d6ef03c 100644
--- a/arch/nios2/config.mk
+++ b/arch/nios2/config.mk
@@ -29,4 +29,4 @@ STANDALONE_LOAD_ADDR = 0x02000000 -L $(gcclibdir)
PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
PLATFORM_CPPFLAGS += -ffixed-r15 -G0
-LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
+LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds
diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
index 31cd5b004a..d1016ea718 100644
--- a/arch/nios2/cpu/start.S
+++ b/arch/nios2/cpu/start.S
@@ -34,6 +34,7 @@
.global _start
_start:
+ wrctl status, r0 /* Disable interrupts */
/* ICACHE INIT -- only the icache line at the reset address
* is invalidated at reset. So the init must stay within
* the cache line size (8 words). If GERMS is used, we'll
@@ -43,10 +44,9 @@ _start:
ori r4, r0, %lo(CONFIG_SYS_ICACHELINE_SIZE)
movhi r5, %hi(CONFIG_SYS_ICACHE_SIZE)
ori r5, r5, %lo(CONFIG_SYS_ICACHE_SIZE)
- mov r6, r0
-0: initi r6
- add r6, r6, r4
- bltu r6, r5, 0b
+0: initi r5
+ sub r5, r5, r4
+ bgt r5, r0, 0b
br _except_end /* Skip the tramp */
/* EXCEPTION TRAMPOLINE -- the following gets copied
@@ -62,7 +62,6 @@ _except_end:
/* INTERRUPTS -- for now, all interrupts masked and globally
* disabled.
*/
- wrctl status, r0 /* Disable interrupts */
wrctl ienable, r0 /* All disabled */
/* DCACHE INIT -- if dcache not implemented, initd behaves as
diff --git a/arch/nios2/include/asm/byteorder.h b/arch/nios2/include/asm/byteorder.h
index 495c823af2..d5c152e73e 100644
--- a/arch/nios2/include/asm/byteorder.h
+++ b/arch/nios2/include/asm/byteorder.h
@@ -25,6 +25,12 @@
#define __ASM_NIOS2_BYTEORDER_H_
#include <asm/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+# define __BYTEORDER_HAS_U64__
+# define __SWAB_64_THRU_32__
+#endif
+
#include <linux/byteorder/little_endian.h>
#endif /* __ASM_NIOS2_BYTEORDER_H_ */
diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h
new file mode 100644
index 0000000000..1350e3b96f
--- /dev/null
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_NIOS2_DMA_MAPPING_H
+#define __ASM_NIOS2_DMA_MAPPING_H
+
+/* dma_alloc_coherent() return cache-line aligned allocation which is mapped
+ * to uncached io region.
+ *
+ * IO_REGION_BASE should be defined in board config header file
+ * 0x80000000 for nommu, 0xe0000000 for mmu
+ */
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+ void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
+ if (!addr)
+ return 0;
+ flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
+ *handle = ((unsigned long)addr +
+ (CONFIG_SYS_DCACHELINE_SIZE - 1)) &
+ ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
+ return (void *)(*handle | IO_REGION_BASE);
+}
+
+#endif /* __ASM_NIOS2_DMA_MAPPING_H */
diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c
index 8ec66a3540..f83e691a34 100644
--- a/arch/nios2/lib/board.c
+++ b/arch/nios2/lib/board.c
@@ -28,6 +28,7 @@
#include <stdio_dev.h>
#include <watchdog.h>
#include <malloc.h>
+#include <mmc.h>
#include <net.h>
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
@@ -35,6 +36,9 @@
#if defined(CONFIG_SYS_NIOS_EPCSBASE)
#include <nios2-epcs.h>
#endif
+#ifdef CONFIG_CMD_NAND
+#include <nand.h> /* cannot even include nand.h if it isnt configured */
+#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -100,7 +104,9 @@ void board_init (void)
bd = gd->bd;
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+#ifndef CONFIG_SYS_NO_FLASH
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
+#endif
#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
bd->bi_sramstart= CONFIG_SYS_SRAM_BASE;
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;
@@ -119,8 +125,20 @@ void board_init (void)
/* The Malloc area is immediately below the monitor copy in RAM */
mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
+#ifndef CONFIG_SYS_NO_FLASH
WATCHDOG_RESET ();
bd->bi_flashsize = flash_init();
+#endif
+
+#ifdef CONFIG_CMD_NAND
+ puts("NAND: ");
+ nand_init();
+#endif
+
+#ifdef CONFIG_GENERIC_MMC
+ puts("MMC: ");
+ mmc_initialize(bd);
+#endif
WATCHDOG_RESET ();
env_relocate();
diff --git a/arch/powerpc/cpu/mpc5xxx/serial.c b/arch/powerpc/cpu/mpc5xxx/serial.c
index 59a877a8f9..01270655ae 100644
--- a/arch/powerpc/cpu/mpc5xxx/serial.c
+++ b/arch/powerpc/cpu/mpc5xxx/serial.c
@@ -340,6 +340,7 @@ struct serial_device serial0_device =
"serial0",
"UART0",
serial0_init,
+ NULL,
serial0_setbrg,
serial0_getc,
serial0_tstc,
@@ -352,6 +353,7 @@ struct serial_device serial1_device =
"serial1",
"UART1",
serial1_init,
+ NULL,
serial1_setbrg,
serial1_getc,
serial1_tstc,
diff --git a/arch/powerpc/cpu/mpc8xx/serial.c b/arch/powerpc/cpu/mpc8xx/serial.c
index 664db65a56..9514c66fd5 100644
--- a/arch/powerpc/cpu/mpc8xx/serial.c
+++ b/arch/powerpc/cpu/mpc8xx/serial.c
@@ -392,6 +392,7 @@ struct serial_device serial_smc_device =
"serial_smc",
"SMC",
smc_init,
+ NULL,
smc_setbrg,
smc_getc,
smc_tstc,
@@ -662,6 +663,7 @@ struct serial_device serial_scc_device =
"serial_scc",
"SCC",
scc_init,
+ NULL,
scc_setbrg,
scc_getc,
scc_tstc,
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
index 8de65425c9..e6ab570c02 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
@@ -822,6 +822,7 @@ struct serial_device serial0_device =
"serial0",
"UART0",
serial0_init,
+ NULL,
serial0_setbrg,
serial0_getc,
serial0_tstc,
@@ -834,6 +835,7 @@ struct serial_device serial1_device =
"serial1",
"UART1",
serial1_init,
+ NULL,
serial1_setbrg,
serial1_getc,
serial1_tstc,
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