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-rw-r--r--arch/x86/cpu/queensbay/Kconfig8
-rw-r--r--arch/x86/cpu/queensbay/tnc.c19
-rw-r--r--arch/x86/include/asm/arch-queensbay/tnc.h5
3 files changed, 32 insertions, 0 deletions
diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
index fbf85f233f..6136d75422 100644
--- a/arch/x86/cpu/queensbay/Kconfig
+++ b/arch/x86/cpu/queensbay/Kconfig
@@ -42,4 +42,12 @@ config CPU_ADDR_BITS
int
default 32
+config DISABLE_IGD
+ bool "Disable Integrated Graphics Device (IGD)"
+ help
+ Disable the Integrated Graphics Device (IGD) so that it does not
+ show in the PCI configuration space as a VGA disaplay controller.
+ This gives a chance for U-Boot to run PCI/PCIe based graphics
+ card's VGA BIOS and use that card for the graphics console.
+
endif
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 9682cfff26..0c02a44f63 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -23,6 +23,16 @@ static void unprotect_spi_flash(void)
x86_pci_write_config32(TNC_LPC, 0xd8, bc);
}
+static void __maybe_unused disable_igd(void)
+{
+ u32 gc;
+
+ gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
+ gc &= ~GMS_MASK;
+ gc |= VGA_DISABLE;
+ x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
+}
+
int arch_cpu_init(void)
{
int ret;
@@ -39,6 +49,15 @@ int arch_cpu_init(void)
return 0;
}
+int arch_early_init_r(void)
+{
+#ifdef CONFIG_DISABLE_IGD
+ disable_igd();
+#endif
+
+ return 0;
+}
+
void cpu_irq_init(void)
{
struct tnc_rcba *rcba;
diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
index ad9a6c4892..23653949de 100644
--- a/arch/x86/include/asm/arch-queensbay/tnc.h
+++ b/arch/x86/include/asm/arch-queensbay/tnc.h
@@ -7,6 +7,11 @@
#ifndef _X86_ARCH_TNC_H_
#define _X86_ARCH_TNC_H_
+/* IGD Control Register */
+#define IGD_GC 0x50
+#define VGA_DISABLE 0x00020000
+#define GMS_MASK 0x00700000
+
/* Memory BAR Enable */
#define MEM_BAR_EN 0x00000001
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