summaryrefslogtreecommitdiffstats
path: root/arch/x86/dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/x86/dts')
-rw-r--r--arch/x86/dts/bayleybay.dts88
-rw-r--r--arch/x86/dts/broadwell_som-6896.dts2
-rw-r--r--arch/x86/dts/chromebook_link.dts44
-rw-r--r--arch/x86/dts/chromebox_panther.dts46
-rw-r--r--arch/x86/dts/crownbay.dts32
-rw-r--r--arch/x86/dts/galileo.dts30
-rw-r--r--arch/x86/dts/minnowmax.dts89
7 files changed, 170 insertions, 161 deletions
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index fbca46762c..4ea9262251 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -65,48 +65,6 @@
};
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x20>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x20 0x20>;
- bank-name = "B";
- };
-
- gpioc {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x40 0x20>;
- bank-name = "C";
- };
-
- gpiod {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x60 0x20>;
- bank-name = "D";
- };
-
- gpioe {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x80 0x20>;
- bank-name = "E";
- };
-
- gpiof {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0xA0 0x20>;
- bank-name = "F";
- };
-
pci {
compatible = "pci-x86";
#address-cells = <3>;
@@ -119,6 +77,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
+ #address-cells = <1>;
+ #size-cells = <1>;
irq-router {
compatible = "intel,irq-router";
@@ -187,7 +147,7 @@
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "intel,ich-spi";
+ compatible = "intel,ich9-spi";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
@@ -201,6 +161,48 @@
};
};
};
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x20>;
+ bank-name = "C";
+ };
+
+ gpiod {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x60 0x20>;
+ bank-name = "D";
+ };
+
+ gpioe {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x80 0x20>;
+ bank-name = "E";
+ };
+
+ gpiof {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0xA0 0x20>;
+ bank-name = "F";
+ };
};
};
diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
index 7b2c51504b..4bb0a34b5f 100644
--- a/arch/x86/dts/broadwell_som-6896.dts
+++ b/arch/x86/dts/broadwell_som-6896.dts
@@ -37,7 +37,7 @@
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "intel,ich-spi";
+ compatible = "intel,ich9-spi";
spi-flash@0 {
reg = <0>;
compatible = "winbond,w25q128", "spi-flash";
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index 58072031df..f85e55cd6d 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -54,27 +54,6 @@
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x10>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x30 0x10>;
- bank-name = "B";
- };
-
- gpioc {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x40 0x10>;
- bank-name = "C";
- };
-
chosen {
stdout-path = "/serial";
};
@@ -255,7 +234,7 @@
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "intel,ich-spi";
+ compatible = "intel,ich9-spi";
spi-flash@0 {
#size-cells = <1>;
#address-cells = <1>;
@@ -270,6 +249,27 @@
};
};
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x10>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x30 0x10>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x10>;
+ bank-name = "C";
+ };
+
lpc {
compatible = "intel,bd82x6x-lpc";
#address-cells = <1>;
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index 48f0c77d45..480b36658e 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -18,27 +18,6 @@
no-keyboard;
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x10>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x30 0x10>;
- bank-name = "B";
- };
-
- gpioc {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x40 0x10>;
- bank-name = "C";
- };
-
chosen {
stdout-path = "/serial";
};
@@ -55,11 +34,13 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
+ #address-cells = <1>;
+ #size-cells = <1>;
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "intel,ich-spi";
+ compatible = "intel,ich9-spi";
spi-flash@0 {
#size-cells = <1>;
#address-cells = <1>;
@@ -73,6 +54,27 @@
};
};
};
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x10>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x30 0x10>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x10>;
+ bank-name = "C";
+ };
};
};
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 47fab0fda6..337513be57 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -46,20 +46,6 @@
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x20>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x20 0x20>;
- bank-name = "B";
- };
-
chosen {
/*
* By default the legacy superio serial port is used as the
@@ -162,6 +148,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch7";
+ #address-cells = <1>;
+ #size-cells = <1>;
irq-router {
compatible = "intel,queensbay-irq-router";
@@ -230,7 +218,7 @@
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "intel,ich-spi";
+ compatible = "intel,ich7-spi";
spi-flash@0 {
reg = <0>;
compatible = "sst,25vf016b",
@@ -238,6 +226,20 @@
memory-map = <0xffe00000 0x00200000>;
};
};
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
};
};
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index dd75fc4dc9..21c36412e2 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -82,6 +82,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch7";
+ #address-cells = <1>;
+ #size-cells = <1>;
irq-router {
compatible = "intel,quark-irq-router";
@@ -118,7 +120,7 @@
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "intel,ich-spi";
+ compatible = "intel,ich7-spi";
spi-flash@0 {
#size-cells = <1>;
#address-cells = <1>;
@@ -132,21 +134,21 @@
};
};
};
- };
- };
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x20>;
- bank-name = "A";
- };
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x20 0x20>;
- bank-name = "B";
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
+ };
};
};
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 7afdf6c30b..60bd05afb6 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -29,7 +29,6 @@
pch_pinctrl {
compatible = "intel,x86-pinctrl";
- io-base = <0x4c>;
/* GPIO E0 */
soc_gpio_s5_0@0 {
@@ -75,48 +74,6 @@
};
};
- gpioa {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0 0x20>;
- bank-name = "A";
- };
-
- gpiob {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x20 0x20>;
- bank-name = "B";
- };
-
- gpioc {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x40 0x20>;
- bank-name = "C";
- };
-
- gpiod {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x60 0x20>;
- bank-name = "D";
- };
-
- gpioe {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0x80 0x20>;
- bank-name = "E";
- };
-
- gpiof {
- compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
- reg = <0xA0 0x20>;
- bank-name = "F";
- };
-
chosen {
stdout-path = "/serial";
};
@@ -153,6 +110,8 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "pci8086,0f1c", "intel,pch9";
+ #address-cells = <1>;
+ #size-cells = <1>;
irq-router {
compatible = "intel,irq-router";
@@ -221,7 +180,7 @@
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "intel,ich-spi";
+ compatible = "intel,ich9-spi";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
@@ -235,6 +194,48 @@
};
};
};
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x20>;
+ bank-name = "C";
+ };
+
+ gpiod {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x60 0x20>;
+ bank-name = "D";
+ };
+
+ gpioe {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x80 0x20>;
+ bank-name = "E";
+ };
+
+ gpiof {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0xA0 0x20>;
+ bank-name = "F";
+ };
};
};
OpenPOWER on IntegriCloud