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Diffstat (limited to 'arch/x86/cpu/sc520/sc520_pci.c')
-rw-r--r--arch/x86/cpu/sc520/sc520_pci.c24
1 files changed, 14 insertions, 10 deletions
diff --git a/arch/x86/cpu/sc520/sc520_pci.c b/arch/x86/cpu/sc520/sc520_pci.c
index e26793ab1b..a13798f1f7 100644
--- a/arch/x86/cpu/sc520/sc520_pci.c
+++ b/arch/x86/cpu/sc520/sc520_pci.c
@@ -70,26 +70,28 @@ int pci_sc520_set_irq(int pci_pin, int irq)
debug("set_irq(): map INT%c to IRQ%d\n", pci_pin + 'A', irq);
- if (irq < 0 || irq > 15) {
+ if (irq < 0 || irq > 15)
return -1; /* illegal irq */
- }
- if (pci_pin < 0 || pci_pin > 15) {
+ if (pci_pin < 0 || pci_pin > 15)
return -1; /* illegal pci int pin */
- }
/* first disable any non-pci interrupt source that use
* this level */
/* PCI interrupt mapping (A through D)*/
- for (i=0; i<=3 ;i++) {
- if (readb(&sc520_mmcr->pci_int_map[i]) == sc520_irq[irq].priority)
+ for (i = 0; i <= 3 ; i++) {
+ tmpb = readb(&sc520_mmcr->pci_int_map[i]);
+
+ if (tmpb == sc520_irq[irq].priority)
writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[i]);
}
/* GP IRQ interrupt mapping */
- for (i=0; i<=10 ;i++) {
- if (readb(&sc520_mmcr->gp_int_map[i]) == sc520_irq[irq].priority)
+ for (i = 0; i <= 10 ; i++) {
+ tmpb = readb(&sc520_mmcr->gp_int_map[i]);
+
+ if (tmpb == sc520_irq[irq].priority)
writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_int_map[i]);
}
@@ -102,10 +104,12 @@ int pci_sc520_set_irq(int pci_pin, int irq)
if (pci_pin < 4) {
/* PCI INTA-INTD */
/* route the interrupt */
- writeb(sc520_irq[irq].priority, &sc520_mmcr->pci_int_map[pci_pin]);
+ writeb(sc520_irq[irq].priority,
+ &sc520_mmcr->pci_int_map[pci_pin]);
} else {
/* GPIRQ0-GPIRQ10 used for additional PCI INTS */
- writeb(sc520_irq[irq].priority, &sc520_mmcr->gp_int_map[pci_pin - 4]);
+ writeb(sc520_irq[irq].priority,
+ &sc520_mmcr->gp_int_map[pci_pin - 4]);
/* also set the polarity in this case */
tmpw = readw(&sc520_mmcr->intpinpol);
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