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-rw-r--r--arch/x86/cpu/qemu/pci.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c
index ac9c056e2b..2f4ba1785d 100644
--- a/arch/x86/cpu/qemu/pci.c
+++ b/arch/x86/cpu/qemu/pci.c
@@ -7,6 +7,8 @@
#include <common.h>
#include <pci.h>
#include <pci_rom.h>
+#include <asm/pci.h>
+#include <asm/arch/qemu.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -50,6 +52,8 @@ int board_pci_post_scan(struct pci_controller *hose)
ulong start;
pci_dev_t bdf;
struct pci_device_id graphic_card[] = { { 0x1234, 0x1111 } };
+ u16 device;
+ int pam, i;
/*
* QEMU emulated graphic card shows in the PCI configuration space with
@@ -67,5 +71,21 @@ int board_pci_post_scan(struct pci_controller *hose)
debug("BIOS ran in %lums\n", get_timer(start));
}
+ /*
+ * i440FX and Q35 chipset have different PAM register offset, but with
+ * the same bitfield layout. Here we determine the offset based on its
+ * PCI device ID.
+ */
+ device = x86_pci_read_config16(PCI_BDF(0, 0, 0), PCI_DEVICE_ID);
+ pam = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_PAM : Q35_PAM;
+
+ /*
+ * Initialize Programmable Attribute Map (PAM) Registers
+ *
+ * Configure legacy segments C/D/E/F to system RAM
+ */
+ for (i = 0; i < PAM_NUM; i++)
+ x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW);
+
return ret;
}
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