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-rw-r--r--arch/x86/cpu/cpu.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 233a6c8695..269043dedc 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -24,11 +24,14 @@
#include <dm.h>
#include <errno.h>
#include <malloc.h>
+#include <syscon.h>
#include <asm/control_regs.h>
+#include <asm/coreboot_tables.h>
#include <asm/cpu.h>
#include <asm/lapic.h>
#include <asm/microcode.h>
#include <asm/mp.h>
+#include <asm/mrccache.h>
#include <asm/msr.h>
#include <asm/mtrr.h>
#include <asm/post.h>
@@ -661,10 +664,20 @@ void show_boot_progress(int val)
}
#ifndef CONFIG_SYS_COREBOOT
+/*
+ * Implement a weak default function for boards that optionally
+ * need to clean up the system before jumping to the kernel.
+ */
+__weak void board_final_cleanup(void)
+{
+}
+
int last_stage_init(void)
{
write_tables();
+ board_final_cleanup();
+
return 0;
}
#endif
@@ -739,5 +752,24 @@ int cpu_init_r(void)
uclass_first_device(UCLASS_PCH, &dev);
uclass_first_device(UCLASS_LPC, &dev);
+ /* Set up pin control if available */
+ ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
+ debug("%s, pinctrl=%p, ret=%d\n", __func__, dev, ret);
+
+ return 0;
+}
+
+#ifndef CONFIG_EFI_STUB
+int reserve_arch(void)
+{
+#ifdef CONFIG_ENABLE_MRC_CACHE
+ mrccache_reserve();
+#endif
+
+#ifdef CONFIG_SEABIOS
+ high_table_reserve();
+#endif
+
return 0;
}
+#endif
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