diff options
Diffstat (limited to 'arch/powerpc')
24 files changed, 69 insertions, 151 deletions
diff --git a/arch/powerpc/cpu/mpc512x/fixed_sdram.c b/arch/powerpc/cpu/mpc512x/fixed_sdram.c index 6451ea9a4a..68c5f8a27b 100644 --- a/arch/powerpc/cpu/mpc512x/fixed_sdram.c +++ b/arch/powerpc/cpu/mpc512x/fixed_sdram.c @@ -70,7 +70,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config, mddrc_config = &default_mddrc_config; if (dram_init_seq == NULL) { dram_init_seq = default_init_seq; - seq_sz = sizeof(default_init_seq)/sizeof(u32); + seq_sz = ARRAY_SIZE(default_init_seq); } /* Initialize IO Control */ diff --git a/arch/powerpc/cpu/mpc5xxx/cpu.c b/arch/powerpc/cpu/mpc5xxx/cpu.c index 7a463b5e09..84fabbd473 100644 --- a/arch/powerpc/cpu/mpc5xxx/cpu.c +++ b/arch/powerpc/cpu/mpc5xxx/cpu.c @@ -96,7 +96,7 @@ unsigned long get_tbclk (void) /* ------------------------------------------------------------------------- */ -#if defined(CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP) +#ifdef CONFIG_OF_BOARD_SETUP void ft_cpu_setup(void *blob, bd_t *bd) { int div = in_8((void*)CONFIG_SYS_MBAR + 0x204) & 0x0020 ? 8 : 4; @@ -117,7 +117,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_path(blob, eth_path, "mac-address", enetaddr, 6, 0); do_fixup_by_path(blob, eth_path, "local-mac-address", enetaddr, 6, 0); #endif -#if defined(CONFIG_OF_IDE_FIXUP) +#ifdef CONFIG_OF_IDE_FIXUP if (!ide_device_present(0)) { /* NO CF card detected -> delete ata node in DTS */ int nodeoffset = 0; @@ -132,10 +132,10 @@ void ft_cpu_setup(void *blob, bd_t *bd) } } -#endif +#endif /* CONFIG_OF_IDE_FIXUP */ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); } -#endif +#endif /* CONFIG_OF_BOARD_SETUP */ #ifdef CONFIG_MPC5xxx_FEC /* Default initializations for FEC controllers. To override, diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S index 54793f0523..b4c5543eb5 100644 --- a/arch/powerpc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -83,8 +83,7 @@ _start: * This function is called when the platform is build with SPL * support from the main (full-blown) U-Boot. And the GD needs * to get cleared (again) so that the following generic - * board support code, defined via CONFIG_SYS_GENERIC_BOARD, - * initializes all variables correctly. + * board support code initializes all variables correctly. */ mr r3, r2 /* parameter 1: GD pointer */ li r4,0 /* parameter 2: value to fill */ diff --git a/arch/powerpc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c index 6eed6f53a3..9f2be3cb22 100644 --- a/arch/powerpc/cpu/mpc8260/cpu.c +++ b/arch/powerpc/cpu/mpc8260/cpu.c @@ -284,7 +284,7 @@ void watchdog_reset (void) #endif /* CONFIG_WATCHDOG */ /* ------------------------------------------------------------------------- */ -#if defined(CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP) +#ifdef CONFIG_OF_BOARD_SETUP void ft_cpu_setup (void *blob, bd_t *bd) { #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ @@ -303,7 +303,7 @@ void ft_cpu_setup (void *blob, bd_t *bd) "clock-frequency", bd->bi_intfreq, 1); fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); } -#endif /* CONFIG_OF_LIBFDT */ +#endif /* CONFIG_OF_BOARD_SETUP */ /* * Initializes on-chip ethernet controllers. diff --git a/arch/powerpc/cpu/mpc8260/cpu_init.c b/arch/powerpc/cpu/mpc8260/cpu_init.c index a9bb5adeb2..55130f7831 100644 --- a/arch/powerpc/cpu/mpc8260/cpu_init.c +++ b/arch/powerpc/cpu/mpc8260/cpu_init.c @@ -253,7 +253,7 @@ int prt_8260_rsr (void) RSR_ESRS, "External Soft"}, { RSR_EHRS, "External Hard"} }; - static int n = sizeof bits / sizeof bits[0]; + static int n = ARRAY_SIZE(bits); ulong rsr = gd->arch.reset_status; int i; char *sep; diff --git a/arch/powerpc/cpu/mpc8260/ether_fcc.c b/arch/powerpc/cpu/mpc8260/ether_fcc.c index 9bb395e6a2..a11ad1e9d0 100644 --- a/arch/powerpc/cpu/mpc8260/ether_fcc.c +++ b/arch/powerpc/cpu/mpc8260/ether_fcc.c @@ -362,7 +362,7 @@ int fec_initialize(bd_t *bis) struct eth_device* dev; int i; - for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) + for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++) { dev = (struct eth_device*) malloc(sizeof *dev); memset(dev, 0, sizeof *dev); @@ -432,7 +432,7 @@ static elbt_prdesc rxeacc_descs[] = { { offsetof(elbt_rxeacc, badlen), "Bad Frame Length" }, { offsetof(elbt_rxeacc, badbit), "Data Compare Errors" }, }; -static int rxeacc_ndesc = sizeof (rxeacc_descs) / sizeof (rxeacc_descs[0]); +static int rxeacc_ndesc = ARRAY_SIZE(rxeacc_descs); typedef struct { @@ -449,7 +449,7 @@ static elbt_prdesc txeacc_descs[] = { { offsetof(elbt_txeacc, un), "Underrun" }, { offsetof(elbt_txeacc, csl), "Carrier Sense Lost" }, }; -static int txeacc_ndesc = sizeof (txeacc_descs) / sizeof (txeacc_descs[0]); +static int txeacc_ndesc = ARRAY_SIZE(txeacc_descs); typedef struct { @@ -500,7 +500,7 @@ static elbt_prdesc epram_descs[] = { { offsetof(fcc_enet_t, fen_p512c), "512-1023 Octet Frames" }, { offsetof(fcc_enet_t, fen_p1024c), "1024-1518 Octet Frames"}, }; -static int epram_ndesc = sizeof (epram_descs) / sizeof (epram_descs[0]); +static int epram_ndesc = ARRAY_SIZE(epram_descs); /* * given an elbt_prdesc array and an array of base addresses, print diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index 0791043ee1..f911275b25 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -484,7 +484,7 @@ int prt_83xx_rsr(void) RSR_SRS, "External/Internal Soft"}, { RSR_HRS, "External/Internal Hard"} }; - static int n = sizeof bits / sizeof bits[0]; + static int n = ARRAY_SIZE(bits); ulong rsr = gd->arch.reset_status; int i; char *sep; diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 2e91f51fce..5498c19e25 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -412,7 +412,7 @@ int get_clocks(void) #endif corecnf_tab_index = ((corepll & 0x1F) << 2) | ((corepll & 0x60) >> 5); - if (corecnf_tab_index > (sizeof(corecnf_tab) / sizeof(corecnf_t))) { + if (corecnf_tab_index > (ARRAY_SIZE(corecnf_tab))) { /* corecnf_tab_index is too high, possibly wrong value */ return -11; } diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index f168375b45..61f5639e0d 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -958,6 +958,15 @@ int cpu_init_r(void) #ifdef CONFIG_FSL_CAAM sec_init(); + +#if defined(CONFIG_PPC_C29X) + if ((SVR_SOC_VER(svr) == SVR_C292) || + (SVR_SOC_VER(svr) == SVR_C293)) + sec_init_idx(1); + + if (SVR_SOC_VER(svr) == SVR_C293) + sec_init_idx(2); +#endif #endif #if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001) diff --git a/arch/powerpc/cpu/mpc85xx/ether_fcc.c b/arch/powerpc/cpu/mpc85xx/ether_fcc.c index 14358aeb03..51f1beef51 100644 --- a/arch/powerpc/cpu/mpc85xx/ether_fcc.c +++ b/arch/powerpc/cpu/mpc85xx/ether_fcc.c @@ -424,7 +424,7 @@ int fec_initialize(bd_t *bis) struct eth_device* dev; int i; - for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) + for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++) { dev = (struct eth_device*) malloc(sizeof *dev); memset(dev, 0, sizeof *dev); diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 82a151a0d0..4c51225868 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -720,16 +720,39 @@ enable_l2_cluster_l2: ori r4, r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@l sync stw r4, 0(r3) /* invalidate L2 */ + /* Poll till the bits are cleared */ 1: sync lwz r0, 0(r3) twi 0, r0, 0 isync and. r1, r0, r4 bne 1b + + /* L2PE must be set before L2 cache is enabled */ + lis r4, (L2CSR0_L2PE)@h + ori r4, r4, (L2CSR0_L2PE)@l + sync + stw r4, 0(r3) /* enable L2 parity/ECC error checking */ + /* Poll till the bit is set */ +1: sync + lwz r0, 0(r3) + twi 0, r0, 0 + isync + and. r1, r0, r4 + beq 1b + lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h ori r4, r4, (L2CSR0_L2REP_MODE)@l sync stw r4, 0(r3) /* enable L2 */ + /* Poll till the bit is set */ +1: sync + lwz r0, 0(r3) + twi 0, r0, 0 + isync + and. r1, r0, r4 + beq 1b + delete_ccsr_l2_tlb: delete_tlb0_entry 0, CONFIG_SYS_CCSRBAR + 0xC20000, MAS2_I|MAS2_G, r3 #endif diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c index ea4ab3a042..f1ae358466 100644 --- a/arch/powerpc/cpu/mpc8xx/fec.c +++ b/arch/powerpc/cpu/mpc8xx/fec.c @@ -137,7 +137,7 @@ int fec_initialize(bd_t *bis) struct ether_fcc_info_s *efis; int i; - for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) { + for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++) { dev = malloc(sizeof(*dev)); if (dev == NULL) @@ -879,7 +879,7 @@ void mii_init (void) /* Setup the pin configuration of the FEC(s) */ - for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) + for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++) fec_pin_init(ether_fcc_info[i].ether_index); } diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c index 5f5c72002e..4013a0c24a 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu_init.c +++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c @@ -449,13 +449,6 @@ cpu_init_f (void) mtdcr(PLB4A1_ACR, (mfdcr(PLB4A1_ACR) & ~PLB4Ax_ACR_RDP_MASK) | PLB4Ax_ACR_RDP_4DEEP); #endif /* CONFIG_440SP/SPE || CONFIG_460EX/GT || CONFIG_405EX */ - -#ifndef CONFIG_SYS_GENERIC_BOARD - gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); - - /* Clear initial global data */ - memset((void *)gd, 0, sizeof(gd_t)); -#endif } /* diff --git a/arch/powerpc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c index eef9c5a17f..c73509b3ee 100644 --- a/arch/powerpc/cpu/ppc4xx/fdt.c +++ b/arch/powerpc/cpu/ppc4xx/fdt.c @@ -11,7 +11,7 @@ #include <asm/cache.h> #include <asm/ppc4xx.h> -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +#ifdef CONFIG_OF_BOARD_SETUP #include <libfdt.h> #include <fdt_support.h> #include <asm/4xx_pcie.h> @@ -160,4 +160,4 @@ void ft_cpu_setup(void *blob, bd_t *bd) */ fdt_pcie_setup(blob); } -#endif /* CONFIG_OF_LIBFDT && CONFIG_OF_BOARD_SETUP */ +#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/arch/powerpc/cpu/ppc4xx/reginfo.c b/arch/powerpc/cpu/ppc4xx/reginfo.c index 339d38aa99..a42327eb3d 100644 --- a/arch/powerpc/cpu/ppc4xx/reginfo.c +++ b/arch/powerpc/cpu/ppc4xx/reginfo.c @@ -321,7 +321,7 @@ void ppc4xx_reginfo(void) PRINT_DCR(OPB2PLB40_BCTRL); PRINT_DCR(P4P3BO0_CFG); #endif - n = sizeof(ppc4xx_reg) / sizeof(ppc4xx_reg[0]); + n = ARRAY_SIZE(ppc4xx_reg); for (i = 0; i < n; i++) { value = 0; type = ppc4xx_reg[i].type; diff --git a/arch/powerpc/cpu/ppc4xx/sdram.c b/arch/powerpc/cpu/ppc4xx/sdram.c index d4ef36d39f..cd63456e70 100644 --- a/arch/powerpc/cpu/ppc4xx/sdram.c +++ b/arch/powerpc/cpu/ppc4xx/sdram.c @@ -33,7 +33,7 @@ sdram_conf_t mb0cf[] = { sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE; #endif -#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0])) +#define N_MB0CF (ARRAY_SIZE(mb0cf)) #ifdef CONFIG_SYS_SDRAM_CASL static ulong ns2clks(ulong ns) @@ -266,7 +266,7 @@ sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE; #define CONFIG_SYS_SDRAM0_CFG0 0x82000000 /* DCEN=1, PMUD=0, 64-bit */ #endif -#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0])) +#define N_MB0CF (ARRAY_SIZE(mb0cf)) #define NUM_TRIES 64 #define NUM_READS 10 diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 137afce37a..b432b18c74 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -760,7 +760,6 @@ _start: #endif bl cpu_init_f /* run low-level CPU init code (from Flash) */ -#ifdef CONFIG_SYS_GENERIC_BOARD mr r3, r1 bl board_init_f_alloc_reserve mr r1, r3 @@ -768,7 +767,6 @@ _start: li r0,0 stwu r0, -4(r1) stwu r0, -4(r1) -#endif li r3, 0 bl board_init_f /* NOTREACHED - board_init_f() does not return */ @@ -1037,14 +1035,12 @@ _start: GET_GOT /* initialize GOT access */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ -#ifdef CONFIG_SYS_GENERIC_BOARD mr r3, r1 bl board_init_f_alloc_reserve mr r1, r3 bl board_init_f_init_reserve stwu r0, -4(r1) stwu r0, -4(r1) -#endif li r3, 0 bl board_init_f /* run first part of init code (from Flash) */ /* NOTREACHED - board_init_f() does not return */ diff --git a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h index da7352abb2..41b6677bba 100644 --- a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h +++ b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h @@ -14,6 +14,8 @@ #ifndef __ASM_ARCH_MX85XX_GPIO_H #define __ASM_ARCH_MX85XX_GPIO_H +#ifndef CONFIG_MPC85XX_GPIO #include <asm/mpc85xx_gpio.h> +#endif #endif diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index eccc146dae..505d355bc8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -928,6 +928,8 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 3 +#define CONFIG_SYS_FSL_SEC_IDX_OFFSET 0x20000 #elif defined(CONFIG_QEMU_E500) #define CONFIG_MAX_CPUS 1 @@ -954,4 +956,8 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_DDRC_GEN3 #endif +#if !defined(CONFIG_PPC_C29X) +#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 +#endif + #endif /* _ASM_MPC85xx_CONFIG_H_ */ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 07d2adf71f..c045a24d1a 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -265,6 +265,7 @@ typedef struct ccsr_pcix { #define PIWAR_WRITE_SNOOP 0x00005000 #define PIWAR_MEM_2G 0x0000001e +#ifndef CONFIG_MPC85XX_GPIO typedef struct ccsr_gpio { u32 gpdir; u32 gpodr; @@ -273,6 +274,7 @@ typedef struct ccsr_gpio { u32 gpimr; u32 gpicr; } ccsr_gpio_t; +#endif /* L2 Cache Registers */ typedef struct ccsr_l2cache { diff --git a/arch/powerpc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h index a61e998df6..74b620294e 100644 --- a/arch/powerpc/include/asm/u-boot.h +++ b/arch/powerpc/include/asm/u-boot.h @@ -14,112 +14,8 @@ #ifndef __U_BOOT_H__ #define __U_BOOT_H__ -/* - * Board information passed to Linux kernel from U-Boot - * - * include/asm-ppc/u-boot.h - */ - -#ifdef CONFIG_SYS_GENERIC_BOARD /* Use the generic board which requires a unified bd_info */ #include <asm-generic/u-boot.h> -#else - -#ifndef __ASSEMBLY__ - -typedef struct bd_info { - unsigned long bi_memstart; /* start of DRAM memory */ - phys_size_t bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* reserved area for startup monitor */ - unsigned long bi_sramstart; /* start of SRAM memory */ - unsigned long bi_sramsize; /* size of SRAM memory */ -#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \ - || defined(CONFIG_E500) || defined(CONFIG_MPC86xx) - unsigned long bi_immr_base; /* base of IMMR register */ -#endif -#if defined(CONFIG_MPC5xxx) - unsigned long bi_mbar_base; /* base of internal registers */ -#endif -#if defined(CONFIG_MPC83xx) - unsigned long bi_immrbar; -#endif - unsigned long bi_bootflags; /* boot / reboot flag (Unused) */ - unsigned long bi_ip_addr; /* IP Address */ - unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */ - unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ - unsigned long bi_intfreq; /* Internal Freq, in MHz */ - unsigned long bi_busfreq; /* Bus Freq, in MHz */ -#if defined(CONFIG_CPM2) - unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ - unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ - unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ - unsigned long bi_vco; /* VCO Out from PLL, in MHz */ -#endif -#if defined(CONFIG_MPC512X) - unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */ -#endif /* CONFIG_MPC512X */ -#if defined(CONFIG_MPC5xxx) - unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ - unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ -#endif -#if defined(CONFIG_405) || \ - defined(CONFIG_405GP) || \ - defined(CONFIG_405EP) || \ - defined(CONFIG_405EZ) || \ - defined(CONFIG_405EX) || \ - defined(CONFIG_440) - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */ - unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ - unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ - unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ -#endif - -#ifdef CONFIG_HAS_ETH1 - unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH2 - unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH3 - unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH4 - unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH5 - unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */ -#endif - -#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ - defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \ - defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) - unsigned int bi_opbfreq; /* OPB clock in Hz */ - int bi_iic_fast[2]; /* Use fast i2c mode */ -#endif -#if defined(CONFIG_4xx) -#if defined(CONFIG_440GX) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) - int bi_phynum[4]; /* Determines phy mapping */ - int bi_phymode[4]; /* Determines phy mode */ -#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440) - int bi_phynum[2]; /* Determines phy mapping */ - int bi_phymode[2]; /* Determines phy mode */ -#else - int bi_phynum[1]; /* Determines phy mapping */ - int bi_phymode[1]; /* Determines phy mode */ -#endif -#endif /* defined(CONFIG_4xx) */ -} bd_t; - -#endif /* __ASSEMBLY__ */ - -#endif /* !CONFIG_SYS_GENERIC_BOARD */ /* For image.h:image_check_target_arch() */ #define IH_ARCH_DEFAULT IH_ARCH_PPC diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 05b22bb5f7..3c97476a83 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -29,11 +29,6 @@ obj-y += ticks.o obj-y += reloc.o obj-$(CONFIG_BAT_RW) += bat_rw.o -ifndef CONFIG_SPL_BUILD -ifndef CONFIG_SYS_GENERIC_BOARD -obj-y += board.o -endif -endif obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += cache.o obj-y += extable.o diff --git a/arch/powerpc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S index b96dbc60e0..66cf02dbd0 100644 --- a/arch/powerpc/lib/ppccache.S +++ b/arch/powerpc/lib/ppccache.S @@ -65,6 +65,7 @@ ppcSync: * flush_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(flush_dcache_range) +#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx) li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4 @@ -77,6 +78,7 @@ _GLOBAL(flush_dcache_range) addi r3,r3,L1_CACHE_BYTES bdnz 1b sync /* wait for dcbst's to get to ram */ +#endif blr /* @@ -87,6 +89,7 @@ _GLOBAL(flush_dcache_range) * invalidate_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(invalidate_dcache_range) +#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx) li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4 @@ -100,5 +103,6 @@ _GLOBAL(invalidate_dcache_range) addi r3,r3,L1_CACHE_BYTES bdnz 1b sync /* wait for dcbi's to get to ram */ +#endif blr diff --git a/arch/powerpc/lib/ppcstring.S b/arch/powerpc/lib/ppcstring.S index 8152ac9b0f..56bb3b824e 100644 --- a/arch/powerpc/lib/ppcstring.S +++ b/arch/powerpc/lib/ppcstring.S @@ -92,13 +92,6 @@ memset: bdnz 8b blr - .globl bcopy -bcopy: - mr r6,r3 - mr r3,r4 - mr r4,r6 - b memcpy - .globl memmove memmove: cmplw 0,r3,r4 |
