diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr/util.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/util.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c b/arch/powerpc/cpu/mpc8xxx/ddr/util.c index 664ad09298..940ffff773 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/util.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/util.c @@ -121,6 +121,16 @@ void fsl_ddr_set_intl3r(const unsigned int granule_size) #endif } +u32 fsl_ddr_get_intl3r(void) +{ + u32 val = 0; +#ifdef CONFIG_E6500 + u32 *mcintl3r = (void *) (CONFIG_SYS_IMMR + 0x18004); + val = *mcintl3r; +#endif + return val; +} + void board_add_ram_info(int use_default) { #if defined(CONFIG_MPC83xx) @@ -140,6 +150,18 @@ void board_add_ram_info(int use_default) uint32_t sdram_cfg = in_be32(&ddr->sdram_cfg); int cas_lat; +#if CONFIG_NUM_DDR_CONTROLLERS >= 2 + if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) { + ddr = (void __iomem *)CONFIG_SYS_MPC85xx_DDR2_ADDR; + sdram_cfg = in_be32(&ddr->sdram_cfg); + } +#endif +#if CONFIG_NUM_DDR_CONTROLLERS >= 3 + if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) { + ddr = (void __iomem *)CONFIG_SYS_MPC85xx_DDR3_ADDR; + sdram_cfg = in_be32(&ddr->sdram_cfg); + } +#endif puts(" (DDR"); switch ((sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) >> SDRAM_CFG_SDRAM_TYPE_SHIFT) { |
