diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 8 | ||||
| -rw-r--r-- | arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 18 | ||||
| -rw-r--r-- | arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 16 | ||||
| -rw-r--r-- | arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/dts/s5pc110-pinctrl.dtsi | 4 |
5 files changed, 29 insertions, 29 deletions
diff --git a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi index 0ff41d0028..b76c77d719 100644 --- a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi +++ b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi @@ -9,21 +9,21 @@ /{ pinctrl_0: pinctrl@11400000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; compatible = "samsung,exynos4210-pinctrl"; }; pinctrl_1: pinctrl@11000000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; gpx0: gpx0 { - reg = <0xc00>; + reg = <0xc00 0x20>; }; }; pinctrl_2: pinctrl@03860000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; }; diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi index 8e5a6c6118..33ecc148a7 100644 --- a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi +++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi @@ -9,37 +9,37 @@ /{ pinctrl_0: pinctrl@11400000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; gpf0: gpf0 { - reg = <0x180>; + reg = <0x180 0x20>; }; gpj0: gpj0 { - reg = <0x240>; + reg = <0x240 0x20>; }; }; pinctrl_1: pinctrl@11000000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; gpk0: gpk0 { - reg = <0x40>; + reg = <0x40 0x20>; }; gpm0: gpm0 { - reg = <0x260>; + reg = <0x260 0x20>; }; gpx0: gpx0 { - reg = <0xc00>; + reg = <0xc00 0x20>; }; }; pinctrl_2: pinctrl@03860000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; pinctrl_3: pinctrl@106E0000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; }; diff --git a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi index 068c5f696f..b8c0526def 100644 --- a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi +++ b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi @@ -9,34 +9,34 @@ /{ pinctrl_0: pinctrl@11400000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; gpc4: gpc4 { - reg = <0x2e0>; + reg = <0x2e0 0x20>; }; gpx0: gpx0 { - reg = <0xc00>; + reg = <0xc00 0x20>; }; }; pinctrl_1: pinctrl@13400000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; pinctrl_2: pinctrl@10d10000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; gpv2: gpv2 { - reg = <0x060>; + reg = <0x060 0x20>; }; gpv4: gpv4 { - reg = <0xc0>; + reg = <0xc0 0x20>; }; }; pinctrl_3: pinctrl@03860000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; }; diff --git a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi index 635a1b0d3a..341194f5a7 100644 --- a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi +++ b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi @@ -14,29 +14,29 @@ */ pinctrl@14010000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; pinctrl@13400000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; gpy7 { }; gpx0 { - reg = <0xc00>; + reg = <0xc00 0x0>; }; }; pinctrl@13410000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; pinctrl@14000000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; pinctrl@03860000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; }; }; diff --git a/arch/arm/dts/s5pc110-pinctrl.dtsi b/arch/arm/dts/s5pc110-pinctrl.dtsi index 2e9d552daa..07e76c0985 100644 --- a/arch/arm/dts/s5pc110-pinctrl.dtsi +++ b/arch/arm/dts/s5pc110-pinctrl.dtsi @@ -9,7 +9,7 @@ / { pinctrl@e0200000 { #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; gpa0: gpa0 { gpio-controller; #gpio-cells = <2>; @@ -251,7 +251,7 @@ }; gph0: gph0 { - reg = <0xc00>; + reg = <0xc00 0x20>; gpio-controller; #gpio-cells = <2>; }; |
