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-rw-r--r--arch/arm/mach-uniphier/umc/Makefile7
-rw-r--r--arch/arm/mach-uniphier/umc/umc-ph1-ld4.c175
-rw-r--r--arch/arm/mach-uniphier/umc/umc-ph1-pro4.c161
-rw-r--r--arch/arm/mach-uniphier/umc/umc-ph1-sld8.c155
4 files changed, 0 insertions, 498 deletions
diff --git a/arch/arm/mach-uniphier/umc/Makefile b/arch/arm/mach-uniphier/umc/Makefile
deleted file mode 100644
index 89b2dec118..0000000000
--- a/arch/arm/mach-uniphier/umc/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += umc-ph1-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += umc-ph1-pro4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += umc-ph1-sld8.o
diff --git a/arch/arm/mach-uniphier/umc/umc-ph1-ld4.c b/arch/arm/mach-uniphier/umc/umc-ph1-ld4.c
deleted file mode 100644
index 81246850b3..0000000000
--- a/arch/arm/mach-uniphier/umc/umc-ph1-ld4.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/sizes.h>
-#include <mach/init.h>
-#include <mach/umc-regs.h>
-#include <mach/ddrphy-regs.h>
-
-static void umc_start_ssif(void __iomem *ssif_base)
-{
- writel(0x00000000, ssif_base + 0x0000b004);
- writel(0xffffffff, ssif_base + 0x0000c004);
- writel(0x000fffcf, ssif_base + 0x0000c008);
- writel(0x00000001, ssif_base + 0x0000b000);
- writel(0x00000001, ssif_base + 0x0000c000);
- writel(0x03010101, ssif_base + UMC_MDMCHSEL);
- writel(0x03010100, ssif_base + UMC_DMDCHSEL);
-
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_FETCH);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMQUE0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMWC0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMRC0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMQUE1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMWC1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMRC1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_WC);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_RC);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_DST);
-
- writel(0x00000001, ssif_base + UMC_CPURST);
- writel(0x00000001, ssif_base + UMC_IDSRST);
- writel(0x00000001, ssif_base + UMC_IXMRST);
- writel(0x00000001, ssif_base + UMC_MDMRST);
- writel(0x00000001, ssif_base + UMC_MDDRST);
- writel(0x00000001, ssif_base + UMC_SIORST);
- writel(0x00000001, ssif_base + UMC_VIORST);
- writel(0x00000001, ssif_base + UMC_FRCRST);
- writel(0x00000001, ssif_base + UMC_RGLRST);
- writel(0x00000001, ssif_base + UMC_AIORST);
- writel(0x00000001, ssif_base + UMC_DMDRST);
-}
-
-static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
- int size, int freq)
-{
- if (freq == 1333) {
- writel(0x45990b11, dramcont + UMC_CMDCTLA);
- writel(0x16958924, dramcont + UMC_CMDCTLB);
- writel(0x5101046A, dramcont + UMC_INITCTLA);
-
- if (size == 1)
- writel(0x27028B0A, dramcont + UMC_INITCTLB);
- else if (size == 2)
- writel(0x38028B0A, dramcont + UMC_INITCTLB);
-
- writel(0x000FF0FF, dramcont + UMC_INITCTLC);
- writel(0x00000b51, dramcont + UMC_DRMMR0);
- } else if (freq == 1600) {
- writel(0x36BB0F17, dramcont + UMC_CMDCTLA);
- writel(0x18C6AA24, dramcont + UMC_CMDCTLB);
- writel(0x5101387F, dramcont + UMC_INITCTLA);
-
- if (size == 1)
- writel(0x2F030D3F, dramcont + UMC_INITCTLB);
- else if (size == 2)
- writel(0x43030D3F, dramcont + UMC_INITCTLB);
-
- writel(0x00FF00FF, dramcont + UMC_INITCTLC);
- writel(0x00000d71, dramcont + UMC_DRMMR0);
- }
-
- writel(0x00000006, dramcont + UMC_DRMMR1);
-
- if (freq == 1333)
- writel(0x00000290, dramcont + UMC_DRMMR2);
- else if (freq == 1600)
- writel(0x00000298, dramcont + UMC_DRMMR2);
-
- writel(0x00000800, dramcont + UMC_DRMMR3);
-
- if (freq == 1333) {
- if (size == 1)
- writel(0x00240512, dramcont + UMC_SPCCTLA);
- else if (size == 2)
- writel(0x00350512, dramcont + UMC_SPCCTLA);
-
- writel(0x00ff0006, dramcont + UMC_SPCCTLB);
- writel(0x000a00ac, dramcont + UMC_RDATACTL_D0);
- } else if (freq == 1600) {
- if (size == 1)
- writel(0x002B0617, dramcont + UMC_SPCCTLA);
- else if (size == 2)
- writel(0x003F0617, dramcont + UMC_SPCCTLA);
-
- writel(0x00ff0008, dramcont + UMC_SPCCTLB);
- writel(0x000c00ae, dramcont + UMC_RDATACTL_D0);
- }
-
- writel(0x04060806, dramcont + UMC_WDATACTL_D0);
- writel(0x04a02000, dramcont + UMC_DATASET);
- writel(0x00000000, ca_base + 0x2300);
- writel(0x00400020, dramcont + UMC_DCCGCTL);
- writel(0x00000003, dramcont + 0x7000);
- writel(0x0000000f, dramcont + 0x8000);
- writel(0x000000c3, dramcont + 0x8004);
- writel(0x00000071, dramcont + 0x8008);
- writel(0x0000003b, dramcont + UMC_DICGCTLA);
- writel(0x020a0808, dramcont + UMC_DICGCTLB);
- writel(0x00000004, dramcont + UMC_FLOWCTLG);
- writel(0x80000201, ca_base + 0xc20);
- writel(0x0801e01e, dramcont + UMC_FLOWCTLA);
- writel(0x00200000, dramcont + UMC_FLOWCTLB);
- writel(0x00004444, dramcont + UMC_FLOWCTLC);
- writel(0x200a0a00, dramcont + UMC_SPCSETB);
- writel(0x00000000, dramcont + UMC_SPCSETD);
- writel(0x00000520, dramcont + UMC_DFICUPDCTLA);
-}
-
-static int umc_init_sub(int freq, int size_ch0, int size_ch1)
-{
- void __iomem *ssif_base = (void __iomem *)UMC_SSIF_BASE;
- void __iomem *ca_base0 = (void __iomem *)UMC_CA_BASE(0);
- void __iomem *ca_base1 = (void __iomem *)UMC_CA_BASE(1);
- void __iomem *dramcont0 = (void __iomem *)UMC_DRAMCONT_BASE(0);
- void __iomem *dramcont1 = (void __iomem *)UMC_DRAMCONT_BASE(1);
- void __iomem *phy0_0 = (void __iomem *)DDRPHY_BASE(0, 0);
- void __iomem *phy1_0 = (void __iomem *)DDRPHY_BASE(1, 0);
-
- umc_dram_init_start(dramcont0);
- umc_dram_init_start(dramcont1);
- umc_dram_init_poll(dramcont0);
- umc_dram_init_poll(dramcont1);
-
- writel(0x00000101, dramcont0 + UMC_DIOCTLA);
-
- ph1_ld4_ddrphy_init(phy0_0, freq, size_ch0);
-
- ddrphy_prepare_training(phy0_0, 0);
- ddrphy_training(phy0_0);
-
- writel(0x00000101, dramcont1 + UMC_DIOCTLA);
-
- ph1_ld4_ddrphy_init(phy1_0, freq, size_ch1);
-
- ddrphy_prepare_training(phy1_0, 1);
- ddrphy_training(phy1_0);
-
- umc_dramcont_init(dramcont0, ca_base0, size_ch0, freq);
- umc_dramcont_init(dramcont1, ca_base1, size_ch1, freq);
-
- umc_start_ssif(ssif_base);
-
- return 0;
-}
-
-int ph1_ld4_umc_init(const struct uniphier_board_data *bd)
-{
- if ((bd->dram_ch0_size == SZ_128M || bd->dram_ch0_size == SZ_256M) &&
- (bd->dram_ch1_size == SZ_128M || bd->dram_ch1_size == SZ_256M) &&
- (bd->dram_freq == 1333 || bd->dram_freq == 1600) &&
- bd->dram_ch0_width == 16 && bd->dram_ch1_width == 16) {
- return umc_init_sub(bd->dram_freq,
- bd->dram_ch0_size / SZ_128M,
- bd->dram_ch1_size / SZ_128M);
- } else {
- pr_err("Unsupported DDR configuration\n");
- return -EINVAL;
- }
-}
diff --git a/arch/arm/mach-uniphier/umc/umc-ph1-pro4.c b/arch/arm/mach-uniphier/umc/umc-ph1-pro4.c
deleted file mode 100644
index 8c9f0579fc..0000000000
--- a/arch/arm/mach-uniphier/umc/umc-ph1-pro4.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/sizes.h>
-#include <mach/init.h>
-#include <mach/umc-regs.h>
-#include <mach/ddrphy-regs.h>
-
-static void umc_start_ssif(void __iomem *ssif_base)
-{
- writel(0x00000001, ssif_base + 0x0000b004);
- writel(0xffffffff, ssif_base + 0x0000c004);
- writel(0x07ffffff, ssif_base + 0x0000c008);
- writel(0x00000001, ssif_base + 0x0000b000);
- writel(0x00000001, ssif_base + 0x0000c000);
-
- writel(0x03010100, ssif_base + UMC_HDMCHSEL);
- writel(0x03010101, ssif_base + UMC_MDMCHSEL);
- writel(0x03010100, ssif_base + UMC_DVCCHSEL);
- writel(0x03010100, ssif_base + UMC_DMDCHSEL);
-
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_FETCH);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMQUE0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMWC0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMRC0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMQUE1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMWC1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMRC1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_WC);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_RC);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_DST);
- writel(0x00000000, ssif_base + 0x0000c044); /* DCGIV_SSIF_REG */
-
- writel(0x00000001, ssif_base + UMC_CPURST);
- writel(0x00000001, ssif_base + UMC_IDSRST);
- writel(0x00000001, ssif_base + UMC_IXMRST);
- writel(0x00000001, ssif_base + UMC_HDMRST);
- writel(0x00000001, ssif_base + UMC_MDMRST);
- writel(0x00000001, ssif_base + UMC_HDDRST);
- writel(0x00000001, ssif_base + UMC_MDDRST);
- writel(0x00000001, ssif_base + UMC_SIORST);
- writel(0x00000001, ssif_base + UMC_GIORST);
- writel(0x00000001, ssif_base + UMC_HD2RST);
- writel(0x00000001, ssif_base + UMC_VIORST);
- writel(0x00000001, ssif_base + UMC_DVCRST);
- writel(0x00000001, ssif_base + UMC_RGLRST);
- writel(0x00000001, ssif_base + UMC_VPERST);
- writel(0x00000001, ssif_base + UMC_AIORST);
- writel(0x00000001, ssif_base + UMC_DMDRST);
-}
-
-static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
- int size, int freq)
-{
- writel(0x66bb0f17, dramcont + UMC_CMDCTLA);
- writel(0x18c6aa44, dramcont + UMC_CMDCTLB);
- writel(0x5101387f, dramcont + UMC_INITCTLA);
- writel(0x43030d3f, dramcont + UMC_INITCTLB);
- writel(0x00ff00ff, dramcont + UMC_INITCTLC);
- writel(0x00000d71, dramcont + UMC_DRMMR0);
- writel(0x00000006, dramcont + UMC_DRMMR1);
- writel(0x00000298, dramcont + UMC_DRMMR2);
- writel(0x00000000, dramcont + UMC_DRMMR3);
- writel(0x003f0617, dramcont + UMC_SPCCTLA);
- writel(0x00ff0008, dramcont + UMC_SPCCTLB);
- writel(0x000c00ae, dramcont + UMC_RDATACTL_D0);
- writel(0x000c00ae, dramcont + UMC_RDATACTL_D1);
- writel(0x04060802, dramcont + UMC_WDATACTL_D0);
- writel(0x04060802, dramcont + UMC_WDATACTL_D1);
- writel(0x04a02000, dramcont + UMC_DATASET);
- writel(0x00000000, ca_base + 0x2300);
- writel(0x00400020, dramcont + UMC_DCCGCTL);
- writel(0x0000000f, dramcont + 0x7000);
- writel(0x0000000f, dramcont + 0x8000);
- writel(0x000000c3, dramcont + 0x8004);
- writel(0x00000071, dramcont + 0x8008);
- writel(0x00000004, dramcont + UMC_FLOWCTLG);
- writel(0x00000000, dramcont + 0x0060);
- writel(0x80000201, ca_base + 0xc20);
- writel(0x0801e01e, dramcont + UMC_FLOWCTLA);
- writel(0x00200000, dramcont + UMC_FLOWCTLB);
- writel(0x00004444, dramcont + UMC_FLOWCTLC);
- writel(0x200a0a00, dramcont + UMC_SPCSETB);
- writel(0x00010000, dramcont + UMC_SPCSETD);
- writel(0x80000020, dramcont + UMC_DFICUPDCTLA);
-}
-
-static int umc_init_sub(int freq, int size_ch0, int size_ch1)
-{
- void __iomem *ssif_base = (void __iomem *)UMC_SSIF_BASE;
- void __iomem *ca_base0 = (void __iomem *)UMC_CA_BASE(0);
- void __iomem *ca_base1 = (void __iomem *)UMC_CA_BASE(1);
- void __iomem *dramcont0 = (void __iomem *)UMC_DRAMCONT_BASE(0);
- void __iomem *dramcont1 = (void __iomem *)UMC_DRAMCONT_BASE(1);
- void __iomem *phy0_0 = (void __iomem *)DDRPHY_BASE(0, 0);
- void __iomem *phy0_1 = (void __iomem *)DDRPHY_BASE(0, 1);
- void __iomem *phy1_0 = (void __iomem *)DDRPHY_BASE(1, 0);
- void __iomem *phy1_1 = (void __iomem *)DDRPHY_BASE(1, 1);
-
- umc_dram_init_start(dramcont0);
- umc_dram_init_start(dramcont1);
- umc_dram_init_poll(dramcont0);
- umc_dram_init_poll(dramcont1);
-
- writel(0x00000101, dramcont0 + UMC_DIOCTLA);
-
- ph1_pro4_ddrphy_init(phy0_0, freq, size_ch0);
-
- ddrphy_prepare_training(phy0_0, 0);
- ddrphy_training(phy0_0);
-
- writel(0x00000103, dramcont0 + UMC_DIOCTLA);
-
- ph1_pro4_ddrphy_init(phy0_1, freq, size_ch0);
-
- ddrphy_prepare_training(phy0_1, 1);
- ddrphy_training(phy0_1);
-
- writel(0x00000101, dramcont1 + UMC_DIOCTLA);
-
- ph1_pro4_ddrphy_init(phy1_0, freq, size_ch1);
-
- ddrphy_prepare_training(phy1_0, 0);
- ddrphy_training(phy1_0);
-
- writel(0x00000103, dramcont1 + UMC_DIOCTLA);
-
- ph1_pro4_ddrphy_init(phy1_1, freq, size_ch1);
-
- ddrphy_prepare_training(phy1_1, 1);
- ddrphy_training(phy1_1);
-
- umc_dramcont_init(dramcont0, ca_base0, size_ch0, freq);
- umc_dramcont_init(dramcont1, ca_base1, size_ch1, freq);
-
- umc_start_ssif(ssif_base);
-
- return 0;
-}
-
-int ph1_pro4_umc_init(const struct uniphier_board_data *bd)
-{
- if (((bd->dram_ch0_size == SZ_512M && bd->dram_ch0_width == 32) ||
- (bd->dram_ch0_size == SZ_256M && bd->dram_ch0_width == 16)) &&
- ((bd->dram_ch1_size == SZ_512M && bd->dram_ch1_width == 32) ||
- (bd->dram_ch1_size == SZ_256M && bd->dram_ch1_width == 16)) &&
- bd->dram_freq == 1600) {
- return umc_init_sub(bd->dram_freq,
- bd->dram_ch0_size / SZ_128M,
- bd->dram_ch1_size / SZ_128M);
- } else {
- pr_err("Unsupported DDR configuration\n");
- return -EINVAL;
- }
-}
diff --git a/arch/arm/mach-uniphier/umc/umc-ph1-sld8.c b/arch/arm/mach-uniphier/umc/umc-ph1-sld8.c
deleted file mode 100644
index bc60a3472e..0000000000
--- a/arch/arm/mach-uniphier/umc/umc-ph1-sld8.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/sizes.h>
-#include <mach/init.h>
-#include <mach/umc-regs.h>
-#include <mach/ddrphy-regs.h>
-
-static void umc_start_ssif(void __iomem *ssif_base)
-{
- writel(0x00000000, ssif_base + 0x0000b004);
- writel(0xffffffff, ssif_base + 0x0000c004);
- writel(0x000fffcf, ssif_base + 0x0000c008);
- writel(0x00000001, ssif_base + 0x0000b000);
- writel(0x00000001, ssif_base + 0x0000c000);
- writel(0x03010101, ssif_base + UMC_MDMCHSEL);
- writel(0x03010100, ssif_base + UMC_DMDCHSEL);
-
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_FETCH);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMQUE0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMWC0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMRC0);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMQUE1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMWC1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_COMRC1);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_WC);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_RC);
- writel(0x00000000, ssif_base + UMC_CLKEN_SSIF_DST);
-
- writel(0x00000001, ssif_base + UMC_CPURST);
- writel(0x00000001, ssif_base + UMC_IDSRST);
- writel(0x00000001, ssif_base + UMC_IXMRST);
- writel(0x00000001, ssif_base + UMC_MDMRST);
- writel(0x00000001, ssif_base + UMC_MDDRST);
- writel(0x00000001, ssif_base + UMC_SIORST);
- writel(0x00000001, ssif_base + UMC_VIORST);
- writel(0x00000001, ssif_base + UMC_FRCRST);
- writel(0x00000001, ssif_base + UMC_RGLRST);
- writel(0x00000001, ssif_base + UMC_AIORST);
- writel(0x00000001, ssif_base + UMC_DMDRST);
-}
-
-static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
- int size, int freq)
-{
-#ifdef CONFIG_DDR_STANDARD
- writel(0x55990b11, dramcont + UMC_CMDCTLA);
- writel(0x16958944, dramcont + UMC_CMDCTLB);
-#else
- writel(0x45990b11, dramcont + UMC_CMDCTLA);
- writel(0x16958924, dramcont + UMC_CMDCTLB);
-#endif
-
- writel(0x5101046A, dramcont + UMC_INITCTLA);
-
- if (size == 1)
- writel(0x27028B0A, dramcont + UMC_INITCTLB);
- else if (size == 2)
- writel(0x38028B0A, dramcont + UMC_INITCTLB);
-
- writel(0x00FF00FF, dramcont + UMC_INITCTLC);
- writel(0x00000b51, dramcont + UMC_DRMMR0);
- writel(0x00000006, dramcont + UMC_DRMMR1);
- writel(0x00000290, dramcont + UMC_DRMMR2);
-
-#ifdef CONFIG_DDR_STANDARD
- writel(0x00000000, dramcont + UMC_DRMMR3);
-#else
- writel(0x00000800, dramcont + UMC_DRMMR3);
-#endif
-
- if (size == 1)
- writel(0x00240512, dramcont + UMC_SPCCTLA);
- else if (size == 2)
- writel(0x00350512, dramcont + UMC_SPCCTLA);
-
- writel(0x00ff0006, dramcont + UMC_SPCCTLB);
- writel(0x000a00ac, dramcont + UMC_RDATACTL_D0);
- writel(0x04060806, dramcont + UMC_WDATACTL_D0);
- writel(0x04a02000, dramcont + UMC_DATASET);
- writel(0x00000000, ca_base + 0x2300);
- writel(0x00400020, dramcont + UMC_DCCGCTL);
- writel(0x00000003, dramcont + 0x7000);
- writel(0x0000004f, dramcont + 0x8000);
- writel(0x000000c3, dramcont + 0x8004);
- writel(0x00000077, dramcont + 0x8008);
- writel(0x0000003b, dramcont + UMC_DICGCTLA);
- writel(0x020a0808, dramcont + UMC_DICGCTLB);
- writel(0x00000004, dramcont + UMC_FLOWCTLG);
- writel(0x80000201, ca_base + 0xc20);
- writel(0x0801e01e, dramcont + UMC_FLOWCTLA);
- writel(0x00200000, dramcont + UMC_FLOWCTLB);
- writel(0x00004444, dramcont + UMC_FLOWCTLC);
- writel(0x200a0a00, dramcont + UMC_SPCSETB);
- writel(0x00000000, dramcont + UMC_SPCSETD);
- writel(0x00000520, dramcont + UMC_DFICUPDCTLA);
-}
-
-static int umc_init_sub(int freq, int size_ch0, int size_ch1)
-{
- void __iomem *ssif_base = (void __iomem *)UMC_SSIF_BASE;
- void __iomem *ca_base0 = (void __iomem *)UMC_CA_BASE(0);
- void __iomem *ca_base1 = (void __iomem *)UMC_CA_BASE(1);
- void __iomem *dramcont0 = (void __iomem *)UMC_DRAMCONT_BASE(0);
- void __iomem *dramcont1 = (void __iomem *)UMC_DRAMCONT_BASE(1);
- void __iomem *phy0_0 = (void __iomem *)DDRPHY_BASE(0, 0);
- void __iomem *phy1_0 = (void __iomem *)DDRPHY_BASE(1, 0);
-
- umc_dram_init_start(dramcont0);
- umc_dram_init_start(dramcont1);
- umc_dram_init_poll(dramcont0);
- umc_dram_init_poll(dramcont1);
-
- writel(0x00000101, dramcont0 + UMC_DIOCTLA);
-
- ph1_sld8_ddrphy_init(phy0_0, freq, size_ch0);
-
- ddrphy_prepare_training(phy0_0, 0);
- ddrphy_training(phy0_0);
-
- writel(0x00000101, dramcont1 + UMC_DIOCTLA);
-
- ph1_sld8_ddrphy_init(phy1_0, freq, size_ch1);
-
- ddrphy_prepare_training(phy1_0, 1);
- ddrphy_training(phy1_0);
-
- umc_dramcont_init(dramcont0, ca_base0, size_ch0, freq);
- umc_dramcont_init(dramcont1, ca_base1, size_ch1, freq);
-
- umc_start_ssif(ssif_base);
-
- return 0;
-}
-
-int ph1_sld8_umc_init(const struct uniphier_board_data *bd)
-{
- if ((bd->dram_ch0_size == SZ_128M || bd->dram_ch0_size == SZ_256M) &&
- (bd->dram_ch1_size == SZ_128M || bd->dram_ch1_size == SZ_256M) &&
- bd->dram_freq == 1333 &&
- bd->dram_ch0_width == 16 && bd->dram_ch1_width == 16) {
- return umc_init_sub(bd->dram_freq,
- bd->dram_ch0_size / SZ_128M,
- bd->dram_ch1_size / SZ_128M);
- } else {
- pr_err("Unsupported DDR configuration\n");
- return -EINVAL;
- }
-}
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