diff options
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-stm32f4/stm32_defs.h | 15 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-stm32f4/stm32_periph.h | 27 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/dc.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/pwm.h | 30 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra20/display.h | 108 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-zynqmp/hardware.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/spl.h | 1 |
7 files changed, 45 insertions, 143 deletions
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_defs.h b/arch/arm/include/asm/arch-stm32f4/stm32_defs.h new file mode 100644 index 0000000000..29b98aecf4 --- /dev/null +++ b/arch/arm/include/asm/arch-stm32f4/stm32_defs.h @@ -0,0 +1,15 @@ +/* + * (C) Copyright 2016 + * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __STM32_DEFS_H__ +#define __STM32_DEFS_H__ +#include <asm/arch/stm32_periph.h> + +int clock_setup(enum periph_clock); + +#endif + diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_periph.h b/arch/arm/include/asm/arch-stm32f4/stm32_periph.h new file mode 100644 index 0000000000..a1af25cb58 --- /dev/null +++ b/arch/arm/include/asm/arch-stm32f4/stm32_periph.h @@ -0,0 +1,27 @@ +/* + * (C) Copyright 2016 + * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARM_ARCH_PERIPH_H +#define __ASM_ARM_ARCH_PERIPH_H + +/* + * Peripherals required for pinmux configuration. List will + * grow with support for more devices getting added. + * Numbering based on interrupt table. + * + */ +enum periph_id { + UART1_GPIOA_9_10 = 0, + UART2_GPIOD_5_6, +}; + +enum periph_clock { + USART1_CLOCK_CFG = 0, + USART2_CLOCK_CFG, +}; + +#endif /* __ASM_ARM_ARCH_PERIPH_H */ diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h index 3a87f0b956..3a7ee5e77b 100644 --- a/arch/arm/include/asm/arch-tegra/dc.h +++ b/arch/arm/include/asm/arch-tegra/dc.h @@ -566,9 +566,4 @@ enum { #define DC_N_WINDOWS 5 #define DC_REG_SAVE_SPACE (DC_N_WINDOWS + 5) -struct display_timing; - -int display_init(void *lcdbase, int fb_bits_per_pixel, - struct display_timing *timing); - #endif /* __ASM_ARCH_TEGRA_DC_H */ diff --git a/arch/arm/include/asm/arch-tegra/pwm.h b/arch/arm/include/asm/arch-tegra/pwm.h index 92dced448a..5a2d9f3a9c 100644 --- a/arch/arm/include/asm/arch-tegra/pwm.h +++ b/arch/arm/include/asm/arch-tegra/pwm.h @@ -27,34 +27,4 @@ struct pwm_ctlr { #define PWM_DIVIDER_SHIFT 0 #define PWM_DIVIDER_MASK (0x1FFF << PWM_DIVIDER_SHIFT) -/** - * Program the PWM with the given parameters. - * - * @param channel PWM channel to update - * @param rate Clock rate to use for PWM, or 0 to leave alone - * @param pulse_width high pulse width: 0=always low, 1=1/256 pulse high, - * n = n/256 pulse high - * @param freq_divider frequency divider value (1 to use rate as is) - */ -void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider); - -/** - * Request a pwm channel as referenced by a device tree node. - * - * This channel can then be passed to pwm_enable(). - * - * @param blob Device tree blob - * @param node Node containing reference to pwm - * @param prop_name Property name of pwm reference - * @return channel number, if ok, else -1 - */ -int pwm_request(const void *blob, int node, const char *prop_name); - -/** - * Set up the pwm controller, by looking it up in the fdt. - * - * @return 0 if ok, -1 if the device tree node was not found or invalid. - */ -int pwm_init(const void *blob); - #endif /* __ASM_ARCH_TEGRA_PWM_H */ diff --git a/arch/arm/include/asm/arch-tegra20/display.h b/arch/arm/include/asm/arch-tegra20/display.h index 018c9f9f76..ee5a3f6c91 100644 --- a/arch/arm/include/asm/arch-tegra20/display.h +++ b/arch/arm/include/asm/arch-tegra20/display.h @@ -9,8 +9,6 @@ #define __ASM_ARCH_TEGRA_DISPLAY_H #include <asm/arch-tegra/dc.h> -#include <fdtdec.h> -#include <asm/gpio.h> /* This holds information about a window which can be displayed */ struct disp_ctl_win { @@ -28,110 +26,4 @@ struct disp_ctl_win { unsigned out_h; /* Height of output window in pixels */ }; -#define FDT_LCD_TIMINGS 4 - -enum { - FDT_LCD_TIMING_REF_TO_SYNC, - FDT_LCD_TIMING_SYNC_WIDTH, - FDT_LCD_TIMING_BACK_PORCH, - FDT_LCD_TIMING_FRONT_PORCH, - - FDT_LCD_TIMING_COUNT, -}; - -enum lcd_cache_t { - FDT_LCD_CACHE_OFF = 0, - FDT_LCD_CACHE_WRITE_THROUGH = 1 << 0, - FDT_LCD_CACHE_WRITE_BACK = 1 << 1, - FDT_LCD_CACHE_FLUSH = 1 << 2, - FDT_LCD_CACHE_WRITE_BACK_FLUSH = FDT_LCD_CACHE_WRITE_BACK | - FDT_LCD_CACHE_FLUSH, -}; - -/* Information about the display controller */ -struct fdt_disp_config { - int valid; /* config is valid */ - int width; /* width in pixels */ - int height; /* height in pixels */ - int bpp; /* number of bits per pixel */ - - /* - * log2 of number of bpp, in general, unless it bpp is 24 in which - * case this field holds 24 also! This is a U-Boot thing. - */ - int log2_bpp; - struct disp_ctlr *disp; /* Display controller to use */ - fdt_addr_t frame_buffer; /* Address of frame buffer */ - unsigned pixel_clock; /* Pixel clock in Hz */ - uint horiz_timing[FDT_LCD_TIMING_COUNT]; /* Horizontal timing */ - uint vert_timing[FDT_LCD_TIMING_COUNT]; /* Vertical timing */ - int panel_node; /* node offset of panel information */ -}; - -/* Information about the LCD panel */ -struct fdt_panel_config { - int pwm_channel; /* PWM channel to use for backlight */ - enum lcd_cache_t cache_type; - - struct gpio_desc backlight_en; /* GPIO for backlight enable */ - struct gpio_desc lvds_shutdown; /* GPIO for lvds shutdown */ - struct gpio_desc backlight_vdd; /* GPIO for backlight vdd */ - struct gpio_desc panel_vdd; /* GPIO for panel vdd */ - /* - * Panel required timings - * Timing 1: delay between panel_vdd-rise and data-rise - * Timing 2: delay between data-rise and backlight_vdd-rise - * Timing 3: delay between backlight_vdd and pwm-rise - * Timing 4: delay between pwm-rise and backlight_en-rise - */ - uint panel_timings[FDT_LCD_TIMINGS]; -}; - -/** - * Register a new display based on device tree configuration. - * - * The frame buffer can be positioned by U-Boot or overriden by the fdt. - * You should pass in the U-Boot address here, and check the contents of - * struct fdt_disp_config to see what was actually chosen. - * - * @param blob Device tree blob - * @param default_lcd_base Default address of LCD frame buffer - * @return 0 if ok, -1 on error (unsupported bits per pixel) - */ -int tegra_display_probe(const void *blob, void *default_lcd_base); - -/** - * Return the current display configuration - * - * @return pointer to display configuration, or NULL if there is no valid - * config - */ -struct fdt_disp_config *tegra_display_get_config(void); - -/** - * Perform the next stage of the LCD init if it is time to do so. - * - * LCD init can be time-consuming because of the number of delays we need - * while waiting for the backlight power supply, etc. This function can - * be called at various times during U-Boot operation to advance the - * initialization of the LCD to the next stage if sufficient time has - * passed since the last stage. It keeps track of what stage it is up to - * and the time that it is permitted to move to the next stage. - * - * The final call should have wait=1 to complete the init. - * - * @param blob fdt blob containing LCD information - * @param wait 1 to wait until all init is complete, and then return - * 0 to return immediately, potentially doing nothing if it is - * not yet time for the next init. - */ -int tegra_lcd_check_next_stage(const void *blob, int wait); - -/** - * Set up the maximum LCD size so we can size the frame buffer. - * - * @param blob fdt blob containing LCD information - */ -void tegra_lcd_early_init(const void *blob); - #endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/ diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 587938249e..e223988b7d 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -19,6 +19,8 @@ #define ZYNQ_I2C_BASEADDR0 0xFF020000 #define ZYNQ_I2C_BASEADDR1 0xFF030000 +#define ARASAN_NAND_BASEADDR 0xFF100000 + #define ZYNQMP_SATA_BASEADDR 0xFD0C0000 #define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000 diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index 5c5d33f0bd..19c38f4083 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -24,6 +24,7 @@ enum { BOOT_DEVICE_NOR, BOOT_DEVICE_UART, BOOT_DEVICE_SPI, + BOOT_DEVICE_USB, BOOT_DEVICE_SATA, BOOT_DEVICE_I2C, BOOT_DEVICE_BOARD, |
