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Diffstat (limited to 'arch/arm/include/asm/arch-omap5')
-rw-r--r--arch/arm/include/asm/arch-omap5/clock.h3
-rw-r--r--arch/arm/include/asm/arch-omap5/omap.h4
-rw-r--r--arch/arm/include/asm/arch-omap5/sata.h48
3 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 8869b50017..2dfe4efb4b 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -137,6 +137,9 @@
#define HSMMC_CLKCTRL_CLKSEL_MASK (1 << 24)
#define HSMMC_CLKCTRL_CLKSEL_DIV_MASK (1 << 25)
+/* CM_L3INIT_SATA_CLKCTRL */
+#define SATA_CLKCTRL_OPTFCLKEN_MASK (1 << 8)
+
/* CM_WKUP_GPTIMER1_CLKCTRL */
#define GPTIMER1_CLKCTRL_CLKSEL_MASK (1 << 24)
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 3c2306fe37..590235be09 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -64,6 +64,9 @@
/* QSPI */
#define QSPI_BASE 0x4B300000
+/* SATA */
+#define DWC_AHSATA_BASE 0x4A140000
+
/*
* Hardware Register Details
*/
@@ -239,6 +242,7 @@ struct ctrl_ioregs {
u32 ctrl_ddrio_1;
u32 ctrl_ddrio_2;
u32 ctrl_emif_sdram_config_ext;
+ u32 ctrl_emif_sdram_config_ext_final;
u32 ctrl_ddr_ctrl_ext_0;
};
diff --git a/arch/arm/include/asm/arch-omap5/sata.h b/arch/arm/include/asm/arch-omap5/sata.h
new file mode 100644
index 0000000000..2ca8947730
--- /dev/null
+++ b/arch/arm/include/asm/arch-omap5/sata.h
@@ -0,0 +1,48 @@
+/*
+ * SATA Wrapper Register map
+ *
+ * (C) Copyright 2013
+ * Texas Instruments, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _TI_SATA_H
+#define _TI_SATA_H
+
+/* SATA Wrapper module */
+#define TI_SATA_WRAPPER_BASE (OMAP54XX_L4_CORE_BASE + 0x141100)
+/* SATA PHY Module */
+#define TI_SATA_PLLCTRL_BASE (OMAP54XX_L4_CORE_BASE + 0x96800)
+
+/* SATA Wrapper register offsets */
+#define TI_SATA_SYSCONFIG 0x00
+#define TI_SATA_CDRLOCK 0x04
+
+/* Register Set */
+#define TI_SATA_SYSCONFIG_OVERRIDE0 (1 << 16)
+#define TI_SATA_SYSCONFIG_STANDBY_MASK (0x3 << 4)
+#define TI_SATA_SYSCONFIG_IDLE_MASK (0x3 << 2)
+
+/* Standby modes */
+#define TI_SATA_STANDBY_FORCE 0x0
+#define TI_SATA_STANDBY_NO (0x1 << 4)
+#define TI_SATA_STANDBY_SMART_WAKE (0x3 << 4)
+#define TI_SATA_STANDBY_SMART (0x2 << 4)
+
+/* Idle modes */
+#define TI_SATA_IDLE_FORCE 0x0
+#define TI_SATA_IDLE_NO (0x1 << 2)
+#define TI_SATA_IDLE_SMART_WAKE (0x3 << 2)
+#define TI_SATA_IDLE_SMART (0x2 << 2)
+
+#ifdef CONFIG_SCSI_AHCI_PLAT
+int omap_sata_init(void);
+#else
+static inline int omap_sata_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_SCSI_AHCI_PLAT */
+
+#endif /* _TI_SATA_H */
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