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-rw-r--r--arch/arm/dts/exynos4210-pinctrl-uboot.dtsi8
-rw-r--r--arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi18
-rw-r--r--arch/arm/dts/exynos5250-pinctrl-uboot.dtsi16
-rw-r--r--arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi12
-rw-r--r--arch/arm/dts/k2g.dtsi7
-rw-r--r--arch/arm/dts/rk3288.dtsi47
-rw-r--r--arch/arm/dts/s5pc110-pinctrl.dtsi4
7 files changed, 82 insertions, 30 deletions
diff --git a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
index 0ff41d0028..b76c77d719 100644
--- a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
@@ -9,21 +9,21 @@
/{
pinctrl_0: pinctrl@11400000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
compatible = "samsung,exynos4210-pinctrl";
};
pinctrl_1: pinctrl@11000000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
gpx0: gpx0 {
- reg = <0xc00>;
+ reg = <0xc00 0x20>;
};
};
pinctrl_2: pinctrl@03860000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
};
diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
index 8e5a6c6118..33ecc148a7 100644
--- a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
@@ -9,37 +9,37 @@
/{
pinctrl_0: pinctrl@11400000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
gpf0: gpf0 {
- reg = <0x180>;
+ reg = <0x180 0x20>;
};
gpj0: gpj0 {
- reg = <0x240>;
+ reg = <0x240 0x20>;
};
};
pinctrl_1: pinctrl@11000000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
gpk0: gpk0 {
- reg = <0x40>;
+ reg = <0x40 0x20>;
};
gpm0: gpm0 {
- reg = <0x260>;
+ reg = <0x260 0x20>;
};
gpx0: gpx0 {
- reg = <0xc00>;
+ reg = <0xc00 0x20>;
};
};
pinctrl_2: pinctrl@03860000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
pinctrl_3: pinctrl@106E0000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
};
diff --git a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
index 068c5f696f..b8c0526def 100644
--- a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
@@ -9,34 +9,34 @@
/{
pinctrl_0: pinctrl@11400000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
gpc4: gpc4 {
- reg = <0x2e0>;
+ reg = <0x2e0 0x20>;
};
gpx0: gpx0 {
- reg = <0xc00>;
+ reg = <0xc00 0x20>;
};
};
pinctrl_1: pinctrl@13400000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
pinctrl_2: pinctrl@10d10000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
gpv2: gpv2 {
- reg = <0x060>;
+ reg = <0x060 0x20>;
};
gpv4: gpv4 {
- reg = <0xc0>;
+ reg = <0xc0 0x20>;
};
};
pinctrl_3: pinctrl@03860000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
};
diff --git a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
index 635a1b0d3a..341194f5a7 100644
--- a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
@@ -14,29 +14,29 @@
*/
pinctrl@14010000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
pinctrl@13400000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
gpy7 {
};
gpx0 {
- reg = <0xc00>;
+ reg = <0xc00 0x0>;
};
};
pinctrl@13410000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
pinctrl@14000000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
pinctrl@03860000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
};
};
diff --git a/arch/arm/dts/k2g.dtsi b/arch/arm/dts/k2g.dtsi
index bbc2cf91b9..a3ed444d3c 100644
--- a/arch/arm/dts/k2g.dtsi
+++ b/arch/arm/dts/k2g.dtsi
@@ -81,5 +81,12 @@
};
#include "k2g-netcp.dtsi"
+
+ pmmc: pmmc@2900000 {
+ compatible = "ti,power-processor";
+ reg = <0x02900000 0x40000>;
+ ti,lpsc_module = <1>;
+ };
+
};
};
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index e51c75c150..3dab0fc83e 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/clock/rk3288-cru.h>
#include <dt-bindings/power-domain/rk3288.h>
#include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/video/rk3288.h>
#include "skeleton.dtsi"
/ {
@@ -683,6 +684,10 @@
reg = <1>;
remote-endpoint = <&hdmi_in_vopb>;
};
+ vopb_out_lvds: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&lvds_in_vopb>;
+ };
};
};
@@ -719,7 +724,10 @@
reg = <1>;
remote-endpoint = <&hdmi_in_vopl>;
};
-
+ vopl_out_lvds: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&lvds_in_vopl>;
+ };
};
};
@@ -786,6 +794,34 @@
};
};
+ lvds: lvds@ff96c000 {
+ compatible = "rockchip,rk3288-lvds";
+ reg = <0xff96c000 0x4000>;
+ clocks = <&cru PCLK_LVDS_PHY>;
+ clock-names = "pclk_lvds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcdc0_ctl>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lvds_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lvds_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_lvds>;
+ };
+ lvds_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_lvds>;
+ };
+ };
+ };
+ };
+
hdmi_audio: hdmi_audio {
compatible = "rockchip,rk3288-hdmi-audio";
i2s-controller = <&i2s>;
@@ -1109,6 +1145,15 @@
};
};
+ lcdc0 {
+ lcdc0_ctl: lcdc0-ctl {
+ rockchip,pins = <1 24 RK_FUNC_1 &pcfg_pull_none>,
+ <1 25 RK_FUNC_1 &pcfg_pull_none>,
+ <1 26 RK_FUNC_1 &pcfg_pull_none>,
+ <1 27 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none>;
diff --git a/arch/arm/dts/s5pc110-pinctrl.dtsi b/arch/arm/dts/s5pc110-pinctrl.dtsi
index 2e9d552daa..07e76c0985 100644
--- a/arch/arm/dts/s5pc110-pinctrl.dtsi
+++ b/arch/arm/dts/s5pc110-pinctrl.dtsi
@@ -9,7 +9,7 @@
/ {
pinctrl@e0200000 {
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
gpa0: gpa0 {
gpio-controller;
#gpio-cells = <2>;
@@ -251,7 +251,7 @@
};
gph0: gph0 {
- reg = <0xc00>;
+ reg = <0xc00 0x20>;
gpio-controller;
#gpio-cells = <2>;
};
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