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-rw-r--r--arch/arm/cpu/armv8/fsl-lsch3/README25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/README b/arch/arm/cpu/armv8/fsl-lsch3/README
index cc47466112..99fc39a61f 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/README
+++ b/arch/arm/cpu/armv8/fsl-lsch3/README
@@ -8,3 +8,28 @@ Freescale LayerScape with Chassis Generation 3
This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
for example LS2085A.
+
+Flash Layout
+============
+A typical layout of various images (including Linux and other firmware images)
+is shown below considering a 32MB NOR flash device:
+
+ -------------------------
+ | linux |
+ ------------------------- ----> 0x0120_0000
+ | Debug Server |
+ ------------------------- ----> 0x00C0_0000
+ | AIOP SW |
+ ------------------------- ----> 0x0070_0000
+ | MC FW |
+ ------------------------- ----> 0x006C_0000
+ | MC Data Path Layout |
+ ------------------------- ----> 0x0020_0000
+ | BootLoader |
+ ------------------------- ----> 0x0000_1000
+ | PBI |
+ ------------------------- ----> 0x0000_0080
+ | RCW |
+ ------------------------- ----> 0x0000_0000
+
+ 32-MB NOR flash layout
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