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-rw-r--r--CHANGELOG13
-rw-r--r--Makefile4
-rw-r--r--README10
-rw-r--r--board/esd/ash405/fpgadata.c4975
-rw-r--r--board/lubbock/lubbock.c8
-rw-r--r--board/tqm8xx/flash.c75
-rw-r--r--board/tqm8xx/u-boot.lds2
-rw-r--r--common/Makefile5
-rw-r--r--common/cmd_fat.c231
-rw-r--r--common/cmd_mem.c66
-rw-r--r--common/cmd_mmc.c40
-rw-r--r--common/command.c14
-rw-r--r--cpu/pxa/Makefile2
-rw-r--r--cpu/pxa/cpu.c19
-rw-r--r--cpu/pxa/mmc.c483
-rw-r--r--cpu/pxa/pxafb.c1089
-rw-r--r--fs/Makefile2
-rw-r--r--fs/fat/Makefile46
-rw-r--r--fs/fat/fat.c901
-rw-r--r--fs/fat/file.c208
-rw-r--r--include/asm-arm/arch-pxa/mmc.h200
-rw-r--r--include/asm-arm/errno.h138
-rw-r--r--include/asm-arm/global_data.h2
-rw-r--r--include/cmd_confdefs.h4
-rw-r--r--include/cmd_fat.h61
-rw-r--r--include/cmd_mmc.h41
-rw-r--r--include/common.h16
-rw-r--r--include/commproc.h24
-rw-r--r--include/configs/LANTEC.h1
-rw-r--r--include/configs/MPC8260ADS.h1
-rw-r--r--include/configs/MPC8266ADS.h1
-rw-r--r--include/configs/RBC823.h1
-rw-r--r--include/configs/TQM862L.h9
-rw-r--r--include/configs/TQM862M.h484
-rw-r--r--include/configs/ep8260.h1
-rw-r--r--include/configs/hymod.h1
-rw-r--r--include/configs/lubbock.h227
-rw-r--r--include/fat.h208
-rw-r--r--include/flash.h5
-rw-r--r--include/mmc.h33
-rw-r--r--include/net.h12
-rw-r--r--net/eth.c2
42 files changed, 7037 insertions, 2628 deletions
diff --git a/CHANGELOG b/CHANGELOG
index f9790683bf..0cecad3934 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,19 @@
Changes since U-Boot 0.3.1:
======================================================================
+* Fix CONFIG_NET_MULTI support in include/net.h
+
+* Patches by Kyle Harris, 13 Mar 2003:
+ - Add FAT partition support
+ - Add command support for FAT
+ - Add command support for MMC
+ ----
+ - Add Intel PXA support for video
+ - Add Intel PXA support for MMC
+ ----
+ - Enable MMC and FAT for lubbock board
+ - Other misc changes for lubbock board
+
* Patch by Robert Schwebel, April 02, 2003:
fix for SMSC91111 driver
diff --git a/Makefile b/Makefile
index 7606b0edb9..daddb2a17e 100644
--- a/Makefile
+++ b/Makefile
@@ -106,7 +106,7 @@ endif
LIBS = board/$(BOARDDIR)/lib$(BOARD).a
LIBS += cpu/$(CPU)/lib$(CPU).a
LIBS += lib_$(ARCH)/lib$(ARCH).a
-LIBS += fs/jffs2/libjffs2.a fs/fdos/libfdos.a
+LIBS += fs/jffs2/libjffs2.a fs/fdos/libfdos.a fs/fat/libfat.a
LIBS += net/libnet.a
LIBS += disk/libdisk.a
LIBS += rtc/librtc.a
@@ -377,7 +377,7 @@ TQM860L_80MHz_config \
TQM862L_config \
TQM862L_66MHz_config \
TQM862L_80MHz_config \
-TQM862L_100MHz_config: unconfig
+TQM862M_100MHz_config: unconfig
@ >include/config.h
@[ -z "$(findstring _66MHz,$@)" ] || \
{ echo "#define CONFIG_66MHz" >>include/config.h ; \
diff --git a/README b/README
index f660f46aac..135f02281d 100644
--- a/README
+++ b/README
@@ -565,6 +565,7 @@ The following options need to be configured:
CFG_CMD_ELF bootelf, bootvx
CFG_CMD_ENV saveenv
CFG_CMD_FDC * Floppy Disk Support
+ CFG_CMD_FAT FAT partition support
CFG_CMD_FDOS * Dos diskette Support
CFG_CMD_FLASH flinfo, erase, protect
CFG_CMD_FPGA FPGA device initialization support
@@ -578,6 +579,7 @@ The following options need to be configured:
CFG_CMD_LOADS loads
CFG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
loop, mtest
+ CFG_CMD_MMC MMC memory mapped support
CFG_CMD_MII MII utility commands
CFG_CMD_NET bootp, tftpboot, rarpboot
CFG_CMD_PCI * pciinfo
@@ -730,6 +732,14 @@ The following options need to be configured:
Supported are USB Keyboards and USB Floppy drives
(TEAC FD-05PUB).
+- MMC Support:
+ The MMC controller on the Intel PXA is supported. To
+ enable this define CONFIG_MMC. The MMC can be
+ accessed from the boot prompt by mapping the device
+ to physical memory similar to flash. Command line is
+ enabled with CFG_CMD_MMC. The MMC driver also works with
+ the FAT fs. This is enabled with CFG_CMD_FAT.
+
- Keyboard Support:
CONFIG_ISA_KEYBOARD
diff --git a/board/esd/ash405/fpgadata.c b/board/esd/ash405/fpgadata.c
index 68c395b366..b2cba4a143 100644
--- a/board/esd/ash405/fpgadata.c
+++ b/board/esd/ash405/fpgadata.c
@@ -1,2462 +1,2513 @@
- 0x1f,0x8b,0x08,0x08,0xb5,0x29,0xdb,0x3e,0x00,0x03,0x61,0x73,0x68,0x34,0x30,0x35,
- 0x5f,0x31,0x5f,0x30,0x30,0x2e,0x62,0x69,0x74,0x00,0xec,0xfd,0x7f,0x7c,0x54,0xf5,
- 0x9d,0x2f,0x8e,0xbf,0xce,0xfb,0x9c,0x84,0x93,0x39,0x33,0x99,0x93,0x49,0xb0,0x51,
- 0x10,0x4f,0x26,0x11,0x87,0x38,0x09,0xc3,0x04,0x63,0x1a,0xc3,0xe4,0x10,0xa2,0x1d,
- 0x03,0x95,0x14,0x6d,0x97,0xbb,0xeb,0xed,0x8e,0x96,0xed,0xb2,0x5d,0xea,0xa6,0xd6,
- 0xbb,0x9f,0xd4,0x75,0xed,0x3b,0x93,0x00,0x03,0x41,0x19,0x91,0xb6,0x58,0xa9,0x3b,
- 0x04,0xd4,0xa8,0xd8,0x0e,0x01,0x25,0x08,0xea,0x21,0x46,0x0d,0x3f,0x94,0x94,0x72,
- 0x5d,0x54,0xaa,0x83,0x4d,0x35,0x60,0x94,0x80,0xb4,0x4d,0x24,0xc2,0xe7,0xf5,0x3a,
- 0x93,0xcc,0x9c,0x89,0xbd,0x7b,0x77,0x3f,0xf7,0x7b,0xbf,0x8f,0xfb,0xfd,0x7e,0x36,
- 0xfb,0xc7,0xbe,0x7a,0xce,0x9b,0xe3,0x39,0xef,0x79,0xbf,0x5f,0xef,0xe7,0xeb,0xd7,
- 0xf3,0x05,0x39,0xce,0xe1,0xe4,0xff,0x01,0x08,0x77,0x80,0x7a,0xc7,0x0f,0x97,0xcf,
- 0xf5,0x5d,0xf7,0xd7,0x73,0xfe,0xda,0xe7,0x2b,0xbf,0xeb,0x3b,0xcb,0xe0,0x4e,0x50,
- 0xfc,0x3f,0xbc,0xce,0xf7,0x37,0xf7,0xfc,0x60,0xce,0xdc,0xb9,0xf0,0x1d,0xfc,0x5f,
- 0x3e,0x5f,0xc5,0x6c,0x5f,0xe5,0x6c,0x9f,0x1f,0x96,0x41,0xce,0x1c,0x7f,0xf5,0x5c,
- 0x5f,0xf5,0x75,0x7e,0xf8,0x1b,0x10,0x2a,0xb6,0x5d,0xc2,0xbf,0xa7,0x1f,0xf9,0xe6,
- 0x77,0x7d,0xc0,0x05,0x00,0x98,0xe2,0x13,0x42,0xf4,0xff,0x15,0x9f,0xa0,0x09,0xc0,
- 0x6b,0xcb,0x7c,0x60,0xd0,0xff,0x86,0xf1,0xfb,0x39,0x3e,0xd0,0xac,0xff,0x5b,0xf0,
- 0x81,0x0e,0x8d,0xa0,0xaf,0x03,0x97,0x0f,0xfe,0xe7,0x7f,0xba,0xc4,0x27,0xc4,0xff,
- 0xe0,0xf8,0x4b,0x07,0xf9,0xff,0x70,0x54,0xfa,0xaf,0xf6,0x5c,0x6c,0x42,0x64,0xff,
- 0x8e,0xe7,0x0b,0x3a,0xa4,0x9e,0xff,0xce,0xbf,0xeb,0xf9,0x7f,0x9c,0x78,0xfe,0x7f,
- 0x74,0x3c,0xb8,0xfe,0x1d,0xc3,0x01,0xa4,0xd4,0xfb,0xb8,0xc0,0x06,0x8c,0x43,0x0c,
- 0x3c,0xff,0x86,0x50,0xdb,0x3b,0xf1,0x0f,0x7b,0xb2,0x8e,0x75,0x86,0xf8,0xbc,0x5f,
- 0xdb,0x7b,0xc4,0x9a,0x81,0x4b,0xd1,0x0a,0xee,0x6c,0x12,0xdf,0x53,0xc7,0x78,0x05,
- 0xd8,0x87,0x8b,0x03,0xf0,0x26,0xdf,0x99,0xb0,0x8f,0x88,0xc3,0xd0,0x34,0x3e,0xde,
- 0x28,0xfc,0x08,0x22,0x50,0xde,0x27,0x87,0xc3,0xbf,0x68,0xbb,0xc1,0xed,0x1e,0x56,
- 0xce,0x31,0x2f,0x7f,0x21,0xec,0xd6,0x6c,0x5d,0xec,0x97,0xf2,0x33,0xdc,0x9d,0xb0,
- 0x75,0xb3,0x04,0x68,0xe3,0xe3,0xfb,0xa0,0x2d,0x8f,0x83,0xb7,0xcf,0x23,0x64,0x2f,
- 0xe2,0x3b,0x35,0x2d,0x9a,0xe3,0x0f,0xdb,0xb5,0x38,0x68,0x92,0xec,0x0b,0x7b,0xa1,
- 0x95,0x25,0x0c,0xd9,0xc7,0x0e,0x66,0x4d,0x8c,0x37,0xb2,0x3e,0xd4,0x22,0xbc,0xdc,
- 0x90,0x37,0xb1,0x21,0x61,0x27,0x74,0xf4,0x2c,0x8c,0x33,0x2f,0xbc,0x10,0x09,0xf7,
- 0xdb,0xe2,0x6c,0x3b,0x3c,0xd3,0xe6,0x36,0x50,0x18,0x91,0x26,0xde,0x67,0xfe,0xd4,
- 0x8f,0xa0,0x2f,0x56,0x73,0xc0,0xfe,0xb4,0xb8,0x22,0xe7,0x82,0xe4,0x9f,0xbb,0xd8,
- 0xa7,0x94,0xc3,0x08,0xf7,0x97,0xd8,0xe3,0x62,0x2e,0x1c,0x8c,0x75,0x19,0x28,0xf4,
- 0xd7,0x4f,0x8c,0x8f,0x09,0xbb,0xb2,0xc7,0x84,0xda,0x36,0x67,0x62,0xc1,0x3e,0xb8,
- 0x04,0xb5,0x86,0x73,0x58,0xfc,0x31,0x5c,0x84,0x79,0xb0,0xbe,0x49,0xbc,0x04,0x5f,
- 0x08,0xe6,0x95,0x41,0x08,0x8d,0x8f,0x3f,0xa6,0xae,0x84,0x41,0xa9,0xda,0xb0,0x97,
- 0x88,0x5e,0x38,0x04,0x7e,0x70,0xc6,0x5b,0xbd,0xda,0x60,0xd0,0x1f,0xb7,0x77,0x15,
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- 0xaf,0x24,0xff,0x86,0xd5,0x7f,0x82,0xcd,0x1b,0x8b,0x06,0xe4,0x83,0xec,0xdb,0xf2,
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- 0x0b,0xce,0xeb,0xaf,0x42,0x85,0x61,0xff,0x4d,0xe9,0x5c,0xf8,0x03,0x54,0xd0,0xf8,
- 0xd7,0x52,0xfa,0xa7,0xaa,0x70,0x8b,0xdc,0x6d,0xf3,0x4b,0x32,0xeb,0xd0,0x36,0x2d,
- 0xd5,0x3a,0xf2,0x16,0x72,0x96,0x60,0x11,0x70,0x83,0xad,0x95,0x69,0x6a,0x37,0x2b,
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- 0x25,0x7c,0x4f,0xa1,0x39,0x9f,0x1f,0xa6,0xd6,0x43,0x6c,0xea,0xc0,0xf1,0xb3,0x7d,
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+ 0x1a,0x63,0xd9,0xa5,0x3f,0xc2,0x85,0x50,0x69,0x40,0xcf,0xd9,0x36,0x80,0x28,0xf6,
+ 0x91,0xb1,0xac,0x56,0x7f,0xe0,0x7a,0xfd,0x4a,0xe5,0xde,0x2f,0x6e,0x5c,0x7b,0x75,
+ 0xe9,0x89,0x57,0x26,0xd0,0x0f,0xdf,0x7f,0x59,0xf9,0xe1,0xb5,0xc8,0x0f,0x13,0xfa,
+ 0xf8,0x47,0x22,0x3f,0x3c,0x8c,0x7e,0xb8,0xb1,0xae,0xfc,0xf0,0x61,0xe4,0x87,0x5d,
+ 0x3e,0xf6,0x6d,0xf3,0x24,0x6a,0xe1,0xdf,0x1a,0x1b,0xeb,0x23,0x6b,0x6d,0x51,0x04,
+ 0x63,0x7c,0x84,0x1f,0xca,0xff,0xfd,0x9f,0xab,0xd0,0xff,0xab,0x50,0x14,0xcf,0x3f,
+ 0xca,0x0f,0x87,0x43,0x3f,0xdc,0xbb,0x67,0x72,0x65,0x71,0x08,0xfb,0x9f,0xdb,0xd4,
+ 0xff,0x8b,0xef,0x3e,0x7a,0x0f,0x96,0x58,0x70,0x7e,0xc3,0xbf,0xa3,0xc9,0xef,0xbe,
+ 0x15,0x13,0x13,0x13,0x13,0x13,0x13,0x13,0x13,0x13,0x13,0x93,0xff,0xf7,0xc8,0xb5,
+ 0x03,0x33,0x6b,0x07,0x13,0x13,0x13,0x13,0x13,0x13,0x13,0x13,0x13,0x13,0x93,0x47,
+ 0x47,0xae,0x1d,0x7a,0xcc,0xda,0xc1,0xc4,0xc4,0xc4,0xc4,0xc4,0xc4,0xc4,0xc4,0xc4,
+ 0xc4,0xe4,0xd1,0x91,0x6b,0x07,0x5b,0xae,0x1d,0xfe,0xd7,0x43,0x31,0x31,0x31,0x31,
+ 0x31,0x31,0x31,0x31,0x31,0x31,0x31,0xf9,0x2f,0xc6,0xc3,0x47,0x2e,0x93,0xd3,0xff,
+ 0xf0,0x88,0xc0,0x4f,0xcd,0xc5,0x3d,0xc2,0xbf,0xf5,0xdf,0x13,0xda,0xaf,0xb5,0x3c,
+ 0xd2,0xa4,0xd1,0x36,0xbf,0x38,0xb1,0xb9,0xdf,0xbf,0x01,0x95,0xa7,0xef,0x04,0xf1,
+ 0x33,0x01,0x00,
diff --git a/board/lubbock/lubbock.c b/board/lubbock/lubbock.c
index 2487a4cbae..dcb5087030 100644
--- a/board/lubbock/lubbock.c
+++ b/board/lubbock/lubbock.c
@@ -50,6 +50,14 @@ int board_init (void)
return 0;
}
+int board_post_init(void)
+{
+ setenv("stdout", "serial");
+ setenv("stderr", "serial");
+ return 0;
+}
+
+
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/tqm8xx/flash.c b/board/tqm8xx/flash.c
index 98bea0e005..c791c30526 100644
--- a/board/tqm8xx/flash.c
+++ b/board/tqm8xx/flash.c
@@ -25,6 +25,7 @@
#include <common.h>
#include <mpc8xx.h>
+#include <environment.h>
#ifndef CFG_ENV_ADDR
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
@@ -103,17 +104,41 @@ unsigned long flash_init (void)
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
/* monitor protection ON by default */
+ debug ("Protect monitor: %08lx ... %08lx\n",
+ (ulong)CFG_MONITOR_BASE,
+ (ulong)CFG_MONITOR_BASE + monitor_flash_len - 1);
+
flash_protect(FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CFG_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[0]);
#endif
#ifdef CFG_ENV_IS_IN_FLASH
/* ENV protection ON by default */
+ debug ("Protect %senvironment: %08lx ... %08lx\n",
+# ifdef CFG_ENV_ADDR_REDUND
+ "primary ",
+# else
+ "",
+# endif
+ (ulong)CFG_ENV_ADDR,
+ (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
+
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
+ CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
+ &flash_info[0]);
+#endif
+
+#ifdef CFG_ENV_ADDR_REDUND
+ debug ("Protect redundand environment: %08lx ... %08lx\n",
+ (ulong)CFG_ENV_ADDR_REDUND,
+ (ulong)CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1);
+
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_ENV_ADDR_REDUND,
+ CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
&flash_info[0]);
#endif
@@ -181,6 +206,10 @@ void flash_print_info (flash_info_t *info)
}
switch (info->flash_id & FLASH_TYPEMASK) {
+#ifdef CONFIG_TQM8xxM /* mirror bit flash */
+ case FLASH_AMLV128U: printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
+ break;
+# else /* ! TQM8xxM */
case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
break;
case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
@@ -197,6 +226,7 @@ void flash_print_info (flash_info_t *info)
break;
case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
break;
+#endif /* TQM8xxM */
default: printf ("Unknown Chip Type\n");
break;
}
@@ -262,6 +292,25 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
switch (value) {
+#ifdef CONFIG_TQM8xxM /* mirror bit flash */
+ case AMD_ID_MIRROR:
+ switch(addr[14]) {
+ case AMD_ID_LV128U_2:
+ if (addr[15] != AMD_ID_LV128U_3) {
+ info->flash_id = FLASH_UNKNOWN;
+ }
+ else {
+ info->flash_id += FLASH_AMLV128U;
+ info->sector_count = 256;
+ info->size = 0x02000000;
+ }
+ break; /* => 32 MB */
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ break;
+ }
+ break;
+# else /* ! TQM8xxM */
case AMD_ID_LV400T:
info->flash_id += FLASH_AM400T;
info->sector_count = 11;
@@ -297,6 +346,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
info->sector_count = 35;
info->size = 0x00400000;
break; /* => 4 MB */
+
case AMD_ID_LV320T:
info->flash_id += FLASH_AM320T;
info->sector_count = 71;
@@ -308,12 +358,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
info->sector_count = 71;
info->size = 0x00800000;
break; /* => 8 MB */
- case AMD_ID_DL640:
-debug ("## oops - same ID used for AM29LV128ML/H mirror bit flash ???\n");
- info->flash_id += FLASH_AMDL640;
- info->sector_count = 142;
- info->size = 0x00800000;
- break;
+#endif /* TQM8xxM */
default:
info->flash_id = FLASH_UNKNOWN;
return (0); /* => no or unknown flash */
@@ -321,6 +366,19 @@ debug ("## oops - same ID used for AM29LV128ML/H mirror bit flash ???\n");
/* set up sector start address table */
switch (value) {
+#ifdef CONFIG_TQM8xxM /* mirror bit flash */
+ case AMD_ID_MIRROR:
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ /* only known types here - no default */
+ case FLASH_AMLV128U:
+ for (i = 0; i < info->sector_count; i++) {
+ info->start[i] = base;
+ base += 0x20000;
+ }
+ break;
+ }
+ break;
+# else /* ! TQM8xxM */
case AMD_ID_LV400B:
case AMD_ID_LV800B:
case AMD_ID_LV160B:
@@ -369,6 +427,7 @@ debug ("## oops - same ID used for AM29LV128ML/H mirror bit flash ???\n");
: 2 * ( 8 << 10);
}
break;
+#endif /* TQM8xxM */
default:
return (0);
break;
diff --git a/board/tqm8xx/u-boot.lds b/board/tqm8xx/u-boot.lds
index 17fea2e6c5..532da283a7 100644
--- a/board/tqm8xx/u-boot.lds
+++ b/board/tqm8xx/u-boot.lds
@@ -66,7 +66,7 @@ SECTIONS
lib_ppc/cache.o (.text)
lib_ppc/time.o (.text)
- . = env_offset;
+ . = DEFINED(env_offset) ? env_offset : .;
common/environment.o (.ppcenv)
*(.text)
diff --git a/common/Makefile b/common/Makefile
index 524e8e2134..d93dbb3f14 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -31,10 +31,11 @@ COBJS = main.o altera.o bedbug.o \
cmd_autoscript.o cmd_bedbug.o cmd_bmp.o cmd_boot.o \
cmd_bootm.o cmd_cache.o cmd_console.o cmd_date.o \
cmd_dcr.o cmd_diag.o cmd_doc.o cmd_nand.o cmd_dtt.o \
- cmd_eeprom.o cmd_elf.o cmd_fdc.o cmd_fdos.o cmd_flash.o \
+ cmd_eeprom.o cmd_elf.o \
+ cmd_fat.o cmd_fdc.o cmd_fdos.o cmd_flash.o \
cmd_fpga.o cmd_i2c.o cmd_ide.o cmd_immap.o \
cmd_jffs2.o cmd_log.o cmd_mem.o cmd_mii.o cmd_misc.o \
- cmd_net.o cmd_nvedit.o env_common.o \
+ cmd_mmc.o cmd_net.o cmd_nvedit.o env_common.o \
env_flash.o env_eeprom.o env_nvram.o env_nowhere.o \
cmd_pci.o cmd_pcmcia.o cmd_portio.o \
cmd_reginfo.o cmd_scsi.o cmd_vfd.o cmd_usb.o \
diff --git a/common/cmd_fat.c b/common/cmd_fat.c
new file mode 100644
index 0000000000..4db70e1c1f
--- /dev/null
+++ b/common/cmd_fat.c
@@ -0,0 +1,231 @@
+/*
+ * (C) Copyright 2002
+ * Richard Jones, rjones@nexus-tech.net
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Boot support
+ */
+#include <common.h>
+#include <command.h>
+#include <cmd_boot.h>
+#include <cmd_autoscript.h>
+#include <s_record.h>
+#include <net.h>
+#include <ata.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_FAT)
+
+#undef DEBUG
+
+#include <fat.h>
+
+extern block_dev_desc_t *ide_get_dev (int dev);
+
+int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ long size;
+ unsigned long offset;
+ unsigned long count;
+
+ if (argc < 3) {
+ printf ("usage:fatload <filename> <addr> [bytes]\n");
+ return (0);
+ }
+
+ offset = simple_strtoul (argv[2], NULL, 16);
+ if (argc == 4)
+ count = simple_strtoul (argv[3], NULL, 16);
+ else
+ count = 0;
+
+ size = file_fat_read (argv[1], (unsigned char *) offset, count);
+
+ printf ("%ld bytes read\n", size);
+
+ return size;
+}
+
+int do_fat_ls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ char *filename = "/";
+ int ret;
+
+ if (argc == 2)
+ ret = file_fat_ls (argv[1]);
+ else
+ ret = file_fat_ls (filename);
+
+ return (ret);
+}
+
+int do_fat_fsinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int ret;
+
+ ret = 0;
+
+ printf ("FAT info: %d\n", file_fat_detectfs ());
+
+ return (ret);
+}
+
+#ifdef NOT_IMPLEMENTED_YET
+/* find first device whose first partition is a DOS filesystem */
+int find_fat_partition (void)
+{
+ int i, j;
+ block_dev_desc_t *dev_desc;
+ unsigned char *part_table;
+ unsigned char buffer[ATA_BLOCKSIZE];
+
+ for (i = 0; i < CFG_IDE_MAXDEVICE; i++) {
+ dev_desc = ide_get_dev (i);
+ if (!dev_desc) {
+ debug ("couldn't get ide device!\n");
+ return (-1);
+ }
+ if (dev_desc->part_type == PART_TYPE_DOS) {
+ if (dev_desc->
+ block_read (dev_desc->dev, 0, 1, (ulong *) buffer) != 1) {
+ debug ("can't perform block_read!\n");
+ return (-1);
+ }
+ part_table = &buffer[0x1be]; /* start with partition #4 */
+ for (j = 0; j < 4; j++) {
+ if ((part_table[4] == 1 || /* 12-bit FAT */
+ part_table[4] == 4 || /* 16-bit FAT */
+ part_table[4] == 6) && /* > 32Meg part */
+ part_table[0] == 0x80) { /* bootable? */
+ curr_dev = i;
+ part_offset = part_table[11];
+ part_offset <<= 8;
+ part_offset |= part_table[10];
+ part_offset <<= 8;
+ part_offset |= part_table[9];
+ part_offset <<= 8;
+ part_offset |= part_table[8];
+ debug ("found partition start at %ld\n", part_offset);
+ return (0);
+ }
+ part_table += 16;
+ }
+ }
+ }
+
+ debug ("no valid devices found!\n");
+ return (-1);
+}
+
+int
+do_fat_dump (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+{
+ __u8 block[1024];
+ int ret;
+ int bknum;
+
+ ret = 0;
+
+ if (argc != 2) {
+ printf ("needs an argument!\n");
+ return (0);
+ }
+
+ bknum = simple_strtoul (argv[1], NULL, 10);
+
+ if (disk_read (0, bknum, block) != 0) {
+ printf ("Error: reading block\n");
+ return -1;
+ }
+ printf ("FAT dump: %d\n", bknum);
+ hexdump (512, block);
+
+ return (ret);
+}
+
+int disk_read (__u32 startblock, __u32 getsize, __u8 *bufptr)
+{
+ ulong tot;
+ block_dev_desc_t *dev_desc;
+
+ if (curr_dev < 0) {
+ if (find_fat_partition () != 0)
+ return (-1);
+ }
+
+ dev_desc = ide_get_dev (curr_dev);
+ if (!dev_desc) {
+ debug ("couldn't get ide device\n");
+ return (-1);
+ }
+
+ tot = dev_desc->block_read (0, startblock + part_offset,
+ getsize, (ulong *) bufptr);
+
+ /* should we do this here?
+ flush_cache ((ulong)buf, cnt*ide_dev_desc[device].blksz);
+ */
+
+ if (tot == getsize)
+ return (0);
+
+ debug ("unable to read from device!\n");
+
+ return (-1);
+}
+
+
+static int isprint (unsigned char ch)
+{
+ if (ch >= 32 && ch < 127)
+ return (1);
+
+ return (0);
+}
+
+
+void hexdump (int cnt, unsigned char *data)
+{
+ int i;
+ int run;
+ int offset;
+
+ offset = 0;
+ while (cnt) {
+ printf ("%04X : ", offset);
+ if (cnt >= 16)
+ run = 16;
+ else
+ run = cnt;
+ cnt -= run;
+ for (i = 0; i < run; i++)
+ printf ("%02X ", (unsigned int) data[i]);
+ printf (": ");
+ for (i = 0; i < run; i++)
+ printf ("%c", isprint (data[i]) ? data[i] : '.');
+ printf ("\n");
+ data = &data[16];
+ offset += run;
+ }
+}
+#endif /* NOT_IMPLEMENTED_YET */
+
+#endif /* CFG_CMD_FAT */
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index d77b04728a..bbfe958482 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -30,6 +30,9 @@
#include <common.h>
#include <command.h>
#include <cmd_mem.h>
+#if (CONFIG_COMMANDS & CFG_CMD_MMC)
+#include <mmc.h>
+#endif
#if (CONFIG_COMMANDS & (CFG_CMD_MEMORY | CFG_CMD_PCI | CFG_CMD_I2C\
| CMD_CMD_PORTIO))
@@ -323,6 +326,46 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
}
#endif
+#if (CONFIG_COMMANDS & CFG_CMD_MMC)
+ if (mmc2info(dest)) {
+ int rc;
+
+ printf ("Copy to MMC... ");
+ switch (rc = mmc_write ((uchar *)addr, dest, count*size)) {
+ case 0:
+ printf ("\n");
+ return 1;
+ case -1:
+ printf("failed\n");
+ return 1;
+ default:
+ printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc);
+ return 1;
+ }
+ puts ("done\n");
+ return 0;
+ }
+
+ if (mmc2info(addr)) {
+ int rc;
+
+ printf ("Copy from MMC... ");
+ switch (rc = mmc_read (addr, (uchar *)dest, count*size)) {
+ case 0:
+ printf ("\n");
+ return 1;
+ case -1:
+ printf("failed\n");
+ return 1;
+ default:
+ printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc);
+ return 1;
+ }
+ puts ("done\n");
+ return 0;
+ }
+#endif
+
while (count-- > 0) {
if (size == 4)
*((ulong *)dest) = *((ulong *)addr);
@@ -820,30 +863,29 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- ulong addr, length;
- ulong crc;
- ulong *ptr;
+ ulong addr, length;
+ ulong crc;
+ ulong *ptr;
if (argc < 3) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
- addr = simple_strtoul(argv[1], NULL, 16);
+ addr = simple_strtoul (argv[1], NULL, 16);
addr += base_address;
- length = simple_strtoul(argv[2], NULL, 16);
+ length = simple_strtoul (argv[2], NULL, 16);
- crc = crc32 (0, (const uchar *)addr, length);
+ crc = crc32 (0, (const uchar *) addr, length);
printf ("CRC32 for %08lx ... %08lx ==> %08lx\n",
- addr, addr + length -1, crc);
+ addr, addr + length - 1, crc);
- if (argc > 3)
- {
- ptr = (ulong *)simple_strtoul(argv[3], NULL, 16);
- *ptr = crc;
- }
+ if (argc > 3) {
+ ptr = (ulong *) simple_strtoul (argv[3], NULL, 16);
+ *ptr = crc;
+ }
return 0;
}
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
new file mode 100644
index 0000000000..45b506416f
--- /dev/null
+++ b/common/cmd_mmc.c
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2003
+ * Kyle Harris, kharris@nexus-tech.net
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_MMC)
+
+#include <mmc.h>
+
+int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ if (mmc_init (1) != 0) {
+ printf ("No MMC card found\n");
+ return 1;
+ }
+ return 0;
+}
+
+#endif /* CFG_CMD_MMC */
diff --git a/common/command.c b/common/command.c
index d52ddf1c8f..842e784d6a 100644
--- a/common/command.c
+++ b/common/command.c
@@ -74,6 +74,8 @@
#include <cmd_fdos.h>
#include <cmd_bmp.h>
#include <cmd_portio.h>
+#include <cmd_mmc.h>
+#include <cmd_fat.h>
#ifdef CONFIG_AMIGAONEG3SE
#include <cmd_menu.h>
@@ -131,13 +133,14 @@ do_echo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if (i > 1)
putc(' ');
- while ((c = *p++) != '\0')
+ while ((c = *p++) != '\0') {
if (c == '\\' && *p == 'c') {
putnl = 0;
p++;
- }
- else
+ } else {
putc(c);
+ }
+ }
}
if (putnl)
@@ -190,8 +193,7 @@ do_help (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if (cmdtp->usage)
puts (cmdtp->usage);
#endif /* CFG_LONGHELP */
- }
- else {
+ } else {
printf ("Unknown command '%s' - try 'help'"
" without arguments for list of all"
" known commands\n\n",
@@ -263,6 +265,7 @@ cmd_tbl_t cmd_tbl[] = {
CMD_TBL_DTT
CMD_TBL_ECHO
CMD_TBL_EEPROM
+ CMD_TBL_FAT
CMD_TBL_FCCINFO
CMD_TBL_FLERASE
CMD_TBL_FDC
@@ -302,6 +305,7 @@ cmd_tbl_t cmd_tbl[] = {
CMD_TBL_LOOP
CMD_TBL_JFFS2_LS
CMD_TBL_MCCINFO
+ CMD_TBL_MMC
CMD_TBL_MD
CMD_TBL_MEMCINFO
#ifdef CONFIG_AMIGAONEG3SE
diff --git a/cpu/pxa/Makefile b/cpu/pxa/Makefile
index 778a6646f8..1af53d6ad1 100644
--- a/cpu/pxa/Makefile
+++ b/cpu/pxa/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(CPU).a
START = start.o
-OBJS = serial.o interrupts.o cpu.o i2c.o
+OBJS = serial.o interrupts.o cpu.o i2c.o pxafb.o mmc.o
all: .depend $(START) $(LIB)
diff --git a/cpu/pxa/cpu.c b/cpu/pxa/cpu.c
index 6a3c24deda..cc9b3ff408 100644
--- a/cpu/pxa/cpu.c
+++ b/cpu/pxa/cpu.c
@@ -32,6 +32,7 @@
#include <common.h>
#include <command.h>
+#include <asm/arch/pxa-regs.h>
int cpu_init (void)
{
@@ -150,3 +151,21 @@ int dcache_status (void)
{
return 0; /* always off */
}
+
+void set_GPIO_mode(int gpio_mode)
+{
+ int gpio = gpio_mode & GPIO_MD_MASK_NR;
+ int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
+ int gafr;
+
+ if (gpio_mode & GPIO_MD_MASK_DIR)
+ {
+ GPDR(gpio) |= GPIO_bit(gpio);
+ }
+ else
+ {
+ GPDR(gpio) &= ~GPIO_bit(gpio);
+ }
+ gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
+ GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
+}
diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c
new file mode 100644
index 0000000000..783e90c644
--- /dev/null
+++ b/cpu/pxa/mmc.c
@@ -0,0 +1,483 @@
+/*
+ * (C) Copyright 2003
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <mmc.h>
+#include <asm/errno.h>
+#include <asm/arch/hardware.h>
+
+#ifdef CONFIG_MMC
+
+extern int
+fat_register_read(int(*block_read)(int device, ulong blknr, ulong blkcnt, uchar *buffer));
+
+/*
+ * FIXME needs to read cid and csd info to determine block size
+ * and other parameters
+ */
+static uchar mmc_buf[MMC_BLOCK_SIZE];
+static mmc_csd_t mmc_csd;
+static int mmc_ready = 0;
+
+
+static uchar *
+/****************************************************/
+mmc_cmd(ushort cmd, ushort argh, ushort argl, ushort cmdat)
+/****************************************************/
+{
+ static uchar resp[20];
+ ulong status;
+ int words, i;
+
+ debug("mmc_cmd %x %x %x %x\n", cmd, argh, argl, cmdat);
+ MMC_STRPCL = MMC_STRPCL_STOP_CLK;
+ MMC_I_MASK = ~MMC_I_MASK_CLK_IS_OFF;
+ while (!(MMC_I_REG & MMC_I_REG_CLK_IS_OFF));
+ MMC_CMD = cmd;
+ MMC_ARGH = argh;
+ MMC_ARGL = argl;
+ MMC_CMDAT = cmdat;
+ MMC_I_MASK = ~MMC_I_MASK_END_CMD_RES;
+ MMC_STRPCL = MMC_STRPCL_START_CLK;
+ while (!(MMC_I_REG & MMC_I_REG_END_CMD_RES));
+
+ status = MMC_STAT;
+ debug("MMC status %x\n", status);
+ if (status & MMC_STAT_TIME_OUT_RESPONSE)
+ {
+ return 0;
+ }
+
+ switch (cmdat & 0x3)
+ {
+ case MMC_CMDAT_R1:
+ case MMC_CMDAT_R3:
+ words = 3;
+ break;
+
+ case MMC_CMDAT_R2:
+ words = 8;
+ break;
+
+ default:
+ return 0;
+ }
+ for (i = words-1; i >= 0; i--)
+ {
+ ulong res_fifo = MMC_RES;
+ int offset = i << 1;
+
+ resp[offset] = ((uchar *)&res_fifo)[0];
+ resp[offset+1] = ((uchar *)&res_fifo)[1];
+ }
+#ifdef MMC_DEBUG
+ for (i=0; i<words*2; i += 2)
+ {
+ printf("MMC resp[%d] = %02x\n", i, resp[i]);
+ printf("MMC resp[%d] = %02x\n", i+1, resp[i+1]);
+ }
+#endif
+ return resp;
+}
+
+int
+/****************************************************/
+mmc_block_read(uchar *dst, ulong src, ulong len)
+/****************************************************/
+{
+ uchar *resp;
+ ushort argh, argl;
+ ulong status;
+
+ if (len == 0)
+ {
+ return 0;
+ }
+
+ debug("mmc_block_rd dst %lx src %lx len %d\n", (ulong)dst, src, len);
+
+ argh = len >> 16;
+ argl = len & 0xffff;
+
+ /* set block len */
+ resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1);
+
+ /* send read command */
+ argh = src >> 16;
+ argl = src & 0xffff;
+ MMC_STRPCL = MMC_STRPCL_STOP_CLK;
+ MMC_RDTO = 0xffff;
+ MMC_NOB = 1;
+ MMC_BLKLEN = len;
+ resp = mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl,
+ MMC_CMDAT_R1|MMC_CMDAT_READ|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN);
+
+
+ MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ;
+ while (len)
+ {
+ if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ)
+ {
+ *dst++ = MMC_RXFIFO;
+ len--;
+ }
+ status = MMC_STAT;
+ if (status & MMC_STAT_ERRORS)
+ {
+ printf("MMC_STAT error %lx\n", status);
+ return -1;
+ }
+ }
+ MMC_I_MASK = ~MMC_I_MASK_DATA_TRAN_DONE;
+ while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE));
+ status = MMC_STAT;
+ if (status & MMC_STAT_ERRORS)
+ {
+ printf("MMC_STAT error %lx\n", status);
+ return -1;
+ }
+ return 0;
+}
+
+int
+/****************************************************/
+mmc_block_write(ulong dst, uchar *src, int len)
+/****************************************************/
+{
+ uchar *resp;
+ ushort argh, argl;
+ ulong status;
+
+ if (len == 0)
+ {
+ return 0;
+ }
+
+ debug("mmc_block_wr dst %lx src %lx len %d\n", dst, (ulong)src, len);
+
+ argh = len >> 16;
+ argl = len & 0xffff;
+
+ /* set block len */
+ resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1);
+
+ /* send write command */
+ argh = dst >> 16;
+ argl = dst & 0xffff;
+ MMC_STRPCL = MMC_STRPCL_STOP_CLK;
+ MMC_NOB = 1;
+ MMC_BLKLEN = len;
+ resp = mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl,
+ MMC_CMDAT_R1|MMC_CMDAT_WRITE|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN);
+
+ MMC_I_MASK = ~MMC_I_MASK_TXFIFO_WR_REQ;
+ while (len)
+ {
+ if (MMC_I_REG & MMC_I_REG_TXFIFO_WR_REQ)
+ {
+ int i, bytes = min(32,len);
+
+ for (i=0; i<bytes; i++)
+ {
+ MMC_TXFIFO = *src++;
+ }
+ if (bytes < 32)
+ {
+ MMC_PRTBUF = MMC_PRTBUF_BUF_PART_FULL;
+ }
+ len -= bytes;
+ }
+ status = MMC_STAT;
+ if (status & MMC_STAT_ERRORS)
+ {
+ printf("MMC_STAT error %lx\n", status);
+ return -1;
+ }
+ }
+ MMC_I_MASK = ~MMC_I_MASK_DATA_TRAN_DONE;
+ while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE));
+ MMC_I_MASK = ~MMC_I_MASK_PRG_DONE;
+ while (!(MMC_I_REG & MMC_I_REG_PRG_DONE));
+ status = MMC_STAT;
+ if (status & MMC_STAT_ERRORS)
+ {
+ printf("MMC_STAT error %lx\n", status);
+ return -1;
+ }
+ return 0;
+}
+
+
+int
+/****************************************************/
+mmc_read(ulong src, uchar *dst, int size)
+/****************************************************/
+{
+ ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
+ ulong mmc_block_size, mmc_block_address;
+
+ if (size == 0)
+ {
+ return 0;
+ }
+
+ if (!mmc_ready)
+ {
+ printf("Please initial the MMC first\n");
+ return -1;
+ }
+
+ mmc_block_size = MMC_BLOCK_SIZE;
+ mmc_block_address = ~(mmc_block_size - 1);
+
+ src -= CFG_MMC_BASE;
+ end = src + size;
+ part_start = ~mmc_block_address & src;
+ part_end = ~mmc_block_address & end;
+ aligned_start = mmc_block_address & src;
+ aligned_end = mmc_block_address & end;
+
+ /* all block aligned accesses */
+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if (part_start)
+ {
+ part_len = mmc_block_size - part_start;
+ debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0)
+ {
+ return -1;
+ }
+ memcpy(dst, mmc_buf+part_start, part_len);
+ dst += part_len;
+ src += part_len;
+ }
+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ for (; src < aligned_end; src += mmc_block_size, dst += mmc_block_size)
+ {
+ debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if ((mmc_block_read((uchar *)(dst), src, mmc_block_size)) < 0)
+ {
+ return -1;
+ }
+ }
+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if (part_end && src < end)
+ {
+ debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0)
+ {
+ return -1;
+ }
+ memcpy(dst, mmc_buf, part_end);
+ }
+ return 0;
+}
+
+int
+/****************************************************/
+mmc_write(uchar *src, ulong dst, int size)
+/****************************************************/
+{
+ ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
+ ulong mmc_block_size, mmc_block_address;
+
+ if (size == 0)
+ {
+ return 0;
+ }
+
+ if (!mmc_ready)
+ {
+ printf("Please initial the MMC first\n");
+ return -1;
+ }
+
+ mmc_block_size = MMC_BLOCK_SIZE;
+ mmc_block_address = ~(mmc_block_size - 1);
+
+ dst -= CFG_MMC_BASE;
+ end = dst + size;
+ part_start = ~mmc_block_address & dst;
+ part_end = ~mmc_block_address & end;
+ aligned_start = mmc_block_address & dst;
+ aligned_end = mmc_block_address & end;
+
+ /* all block aligned accesses */
+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if (part_start)
+ {
+ part_len = mmc_block_size - part_start;
+ debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ (ulong)src, dst, end, part_start, part_end, aligned_start, aligned_end);
+ if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0)
+ {
+ return -1;
+ }
+ memcpy(mmc_buf+part_start, src, part_len);
+ if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < 0)
+ {
+ return -1;
+ }
+ dst += part_len;
+ src += part_len;
+ }
+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ for (; dst < aligned_end; src += mmc_block_size, dst += mmc_block_size)
+ {
+ debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if ((mmc_block_write(dst, (uchar *)src, mmc_block_size)) < 0)
+ {
+ return -1;
+ }
+ }
+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if (part_end && dst < end)
+ {
+ debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
+ if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0)
+ {
+ return -1;
+ }
+ memcpy(mmc_buf, src, part_end);
+ if ((mmc_block_write(aligned_end, mmc_buf, mmc_block_size)) < 0)
+ {
+ return -1;
+ }
+ }
+ return 0;
+}
+
+int
+/****************************************************/
+mmc_bread(int dev_num, ulong blknr, ulong blkcnt, uchar *dst)
+/****************************************************/
+{
+ int mmc_block_size = MMC_BLOCK_SIZE;
+ ulong src = blknr * mmc_block_size + CFG_MMC_BASE;
+
+ mmc_read(src, (uchar *)dst, blkcnt*mmc_block_size);
+ return blkcnt;
+}
+
+int
+/****************************************************/
+mmc_init(int verbose)
+/****************************************************/
+{
+ int retries, rc = -ENODEV;
+ uchar *resp;
+
+#ifdef CONFIG_LUBBOCK
+ set_GPIO_mode( GPIO6_MMCCLK_MD );
+ set_GPIO_mode( GPIO8_MMCCS0_MD );
+#endif
+ CKEN |= CKEN12_MMC; /* enable MMC unit clock */
+
+ mmc_csd.c_size = 0;
+
+ MMC_CLKRT = MMC_CLKRT_0_3125MHZ;
+ MMC_RESTO = MMC_RES_TO_MAX;
+ MMC_SPI = MMC_SPI_DISABLE;
+
+ /* reset */
+ retries = 10;
+ resp = mmc_cmd(0, 0, 0, 0);
+ resp = mmc_cmd(1, 0x00ff, 0xc000, MMC_CMDAT_INIT|MMC_CMDAT_BUSY|MMC_CMDAT_R3);
+ while (retries-- && resp && !(resp[4] & 0x80))
+ {
+ debug("resp %x %x\n", resp[0], resp[1]);
+ udelay(50);
+ resp = mmc_cmd(1, 0x00ff, 0xff00, MMC_CMDAT_BUSY|MMC_CMDAT_R3);
+ }
+
+ /* try to get card id */
+ resp = mmc_cmd(2, 0, 0, MMC_CMDAT_R2);
+ if (resp)
+ {
+ /* TODO configure mmc driver depending on card attributes */
+ mmc_cid_t *cid = (mmc_cid_t *)resp;
+ if (verbose)
+ {
+ printf("MMC found. Card desciption is:\n");
+ printf("Manufacturer ID = %02x%02x%02x\n",
+ cid->id[0], cid->id[1], cid->id[2]);
+ printf("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev);
+ cid->hwrev = cid->fwrev = 0; /* null terminate string */
+ printf("Product Name = %s\n",cid->name);
+ printf("Serial Number = %02x%02x%02x\n",
+ cid->sn[0], cid->sn[1], cid->sn[2]);
+ printf("Month = %d\n",cid->month);
+ printf("Year = %d\n",1997 + cid->year);
+ }
+
+ /* MMC exists, get CSD too */
+ resp = mmc_cmd(MMC_CMD_SET_RCA, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R1);
+ resp = mmc_cmd(MMC_CMD_SEND_CSD, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R2);
+ if (resp)
+ {
+ mmc_csd_t *csd = (mmc_csd_t *)resp;
+ memcpy(&mmc_csd, csd, sizeof(csd));
+ rc = 0;
+ mmc_ready = 1;
+ /* FIXME add verbose printout for csd */
+ }
+ }
+
+ MMC_CLKRT = 0; /* 20 MHz */
+ resp = mmc_cmd(7, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R1);
+
+ fat_register_read(mmc_bread);
+
+ return rc;
+}
+
+int
+mmc_ident(block_dev_desc_t *dev)
+{
+ return 0;
+}
+
+int
+mmc2info(ulong addr)
+{
+ /* FIXME hard codes to 32 MB device */
+ if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0x02000000)
+ {
+ return 1;
+ }
+ return 0;
+}
+
+#endif
diff --git a/cpu/pxa/pxafb.c b/cpu/pxa/pxafb.c
new file mode 100644
index 0000000000..f6a25754bd
--- /dev/null
+++ b/cpu/pxa/pxafb.c
@@ -0,0 +1,1089 @@
+/*
+ * (C) Copyright 2001-2002
+ * Wolfgang Denk, DENX Software Engineering -- wd@denx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************/
+/* ** HEADER FILES */
+/************************************************************************/
+
+#define DEBUG 1
+#include <config.h>
+#include <common.h>
+#include <version.h>
+#include <stdarg.h>
+#include <lcdvideo.h>
+#include <linux/types.h>
+#include <devices.h>
+#include <asm/arch/pxa-regs.h>
+
+#ifdef CONFIG_LCD
+
+/************************************************************************/
+/* ** CONFIG STUFF -- should be moved to board config file */
+/************************************************************************/
+#ifndef CONFIG_EDT32F10
+#define CONFIG_LCD_LOGO
+#define LCD_INFO /* Display Logo, (C) and system info */
+#endif
+
+#ifdef CONFIG_V37
+#undef CONFIG_LCD_LOGO
+#undef LCD_INFO
+#endif
+
+#undef CONFIG_LCD_LOGO
+
+#define LCD_TEST_PATTERN
+/* #define LCD_TEST_PATTERN */ /* color backgnd for frame/color adjust */
+/* #define CFG_INVERT_COLORS */ /* Not needed - adjust vl_dp instead */
+/************************************************************************/
+
+/************************************************************************/
+/* ** FONT AND LOGO DATA */
+/************************************************************************/
+
+#include <video_font.h> /* Get font data, width and height */
+
+#ifdef CONFIG_LCD_LOGO
+# include <bmp_nexus.h> /* Get logo data, width and height */
+#endif
+
+/************************************************************************/
+/************************************************************************/
+
+/*
+ * Information about displays we are using. This is for configuring
+ * the LCD controller and memory allocation. Someone has to know what
+ * is connected, as we can't autodetect anything.
+ */
+#define CFG_HIGH 0 /* Pins are active high */
+#define CFG_LOW 1 /* Pins are active low */
+
+/* PXA LCD DMA descriptor */
+struct pxafb_dma_descriptor {
+ u_long fdadr;
+ u_long fsadr;
+ u_long fidr;
+ u_long ldcmd;
+};
+
+/* PXA LCD info */
+struct pxafb_info {
+
+ /* Misc registers */
+ u_long reg_lccr3;
+ u_long reg_lccr2;
+ u_long reg_lccr1;
+ u_long reg_lccr0;
+ u_long fdadr0;
+ u_long fdadr1;
+
+ /* DMA descriptors */
+ struct pxafb_dma_descriptor * dmadesc_fblow;
+ struct pxafb_dma_descriptor * dmadesc_fbhigh;
+ struct pxafb_dma_descriptor * dmadesc_palette;
+
+ u_long screen; /* physical address of frame buffer */
+ u_long palette; /* physical address of palette memory */
+ u_int palette_size;
+};
+
+typedef struct vidinfo {
+ ushort vl_col; /* Number of columns (i.e. 640) */
+ ushort vl_row; /* Number of rows (i.e. 480) */
+ ushort vl_width; /* Width of display area in millimeters */
+ ushort vl_height; /* Height of display area in millimeters */
+
+ /* LCD configuration register.
+ */
+ u_char vl_clkp; /* Clock polarity */
+ u_char vl_oep; /* Output Enable polarity */
+ u_char vl_hsp; /* Horizontal Sync polarity */
+ u_char vl_vsp; /* Vertical Sync polarity */
+ u_char vl_dp; /* Data polarity */
+ u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
+ u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
+ u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
+ u_char vl_clor; /* Color, 0 = mono, 1 = color */
+ u_char vl_tft; /* 0 = passive, 1 = TFT */
+
+ /* Horizontal control register. Timing from data sheet.
+ */
+ ushort vl_hpw; /* Horz sync pulse width */
+ u_char vl_blw; /* Wait before of line */
+ u_char vl_elw; /* Wait end of line */
+
+ /* Vertical control register.
+ */
+ u_char vl_vpw; /* Vertical sync pulse width */
+ u_char vl_bfw; /* Wait before of frame */
+ u_char vl_efw; /* Wait end of frame */
+
+ u_char vl_lcdac; /* LCD AC timing */
+
+ /* PXA LCD controller params
+ */
+ struct pxafb_info pxa;
+
+} vidinfo_t;
+
+#define LCD_MONOCHROME 0
+#define LCD_COLOR2 1
+#define LCD_COLOR4 2
+#define LCD_COLOR8 3
+#define LCD_COLOR16 4
+
+/*----------------------------------------------------------------------*/
+#define CONFIG_PXA_VGA
+#ifdef CONFIG_PXA_VGA
+/*
+ * LCD outputs connected to a video DAC
+ */
+
+#define LCD_BPP LCD_COLOR8
+
+/* you have to set lccr0 and lccr3 (including pcd) */
+#define REG_LCCR0 0x003008f8
+#define REG_LCCR3 0x0300FF01
+
+/* 640x480x16 @ 61 Hz */
+static vidinfo_t panel_info = {
+ vl_col: 640,
+ vl_row: 480,
+ vl_width: 640,
+ vl_height: 480,
+ vl_clkp: CFG_HIGH,
+ vl_oep: CFG_HIGH,
+ vl_hsp: CFG_HIGH,
+ vl_vsp: CFG_HIGH,
+ vl_dp: CFG_HIGH,
+ vl_bpix: LCD_BPP,
+ vl_lbw: 0,
+ vl_splt: 0,
+ vl_clor: 0,
+ vl_lcdac: 0,
+ vl_tft: 1,
+ vl_hpw: 40,
+ vl_blw: 56,
+ vl_elw: 56,
+ vl_vpw: 20,
+ vl_bfw: 8,
+ vl_efw: 8,
+};
+#endif /* CONFIG_PXA_VIDEO */
+
+#ifdef CONFIG_SHARP_LM8V31
+
+#define LCD_BPP LCD_COLOR8
+#define LCD_INVERT_COLORS /* Needed for colors to be correct, but why? */
+
+/* you have to set lccr0 and lccr3 (including pcd) */
+#define REG_LCCR0 0x0030087C
+#define REG_LCCR3 0x0340FF08
+
+static vidinfo_t panel_info = {
+ vl_col: 640,
+ vl_row: 480,
+ vl_width: 157,
+ vl_height: 118,
+ vl_clkp: CFG_HIGH,
+ vl_oep: CFG_HIGH,
+ vl_hsp: CFG_HIGH,
+ vl_vsp: CFG_HIGH,
+ vl_dp: CFG_HIGH,
+ vl_bpix: LCD_BPP,
+ vl_lbw: 0,
+ vl_splt: 1,
+ vl_clor: 1,
+ vl_lcdac: 0,
+ vl_tft: 0,
+ vl_hpw: 1,
+ vl_blw: 3,
+ vl_elw: 3,
+ vl_vpw: 1,
+ vl_bfw: 0,
+ vl_efw: 0,
+};
+#endif /* CONFIG_SHARP_LM8V31 */
+
+/*----------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------*/
+
+#if defined(LCD_INFO_BELOW_LOGO)
+# define LCD_INFO_X 0
+# define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
+#elif defined(CONFIG_LCD_LOGO)
+# define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
+# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)
+#else
+# define LCD_INFO_X (VIDEO_FONT_WIDTH)
+# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)
+#endif
+
+#ifndef LCD_BPP
+#define LCD_BPP LCD_COLOR8
+#endif
+#ifndef LCD_DF
+#define LCD_DF 1
+#endif
+
+#define NBITS(bit_code) (1 << (bit_code))
+#define NCOLORS(bit_code) (1 << NBITS(bit_code))
+
+static int lcd_line_length;
+
+static int lcd_color_fg;
+static int lcd_color_bg;
+
+static char lcd_is_enabled = 0; /* Indicate that LCD is enabled */
+
+/*
+ * Frame buffer memory information
+ */
+static void *lcd_base; /* Start of framebuffer memory */
+static void *lcd_console_address; /* Start of console buffer */
+
+
+/************************************************************************/
+/* ** CONSOLE CONSTANTS */
+/************************************************************************/
+
+#if LCD_BPP == LCD_MONOCHROME
+
+/*
+ * Simple color definitions
+ */
+#define CONSOLE_COLOR_BLACK 0
+#define CONSOLE_COLOR_WHITE 1 /* Must remain last / highest */
+
+#elif LCD_BPP == LCD_COLOR8
+
+/*
+ * Simple color definitions
+ */
+#define CONSOLE_COLOR_BLACK 0
+#define CONSOLE_COLOR_RED 1
+#define CONSOLE_COLOR_GREEN 2
+#define CONSOLE_COLOR_YELLOW 3
+#define CONSOLE_COLOR_BLUE 4
+#define CONSOLE_COLOR_MAGENTA 5
+#define CONSOLE_COLOR_CYAN 6
+#define CONSOLE_COLOR_GREY 14
+#define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */
+
+#else /* 16 bit */
+
+#define CONSOLE_COLOR_BLACK 0x0000
+#define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */
+
+#endif
+
+#if defined(CONFIG_LCD_LOGO) && (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET)
+#error Default Color Map overlaps with Logo Color Map
+#endif
+
+/************************************************************************/
+
+#ifndef PAGE_SIZE
+#define PAGE_SIZE 4096
+#endif
+
+
+/************************************************************************/
+/* ** CONSOLE DEFINITIONS & FUNCTIONS */
+/************************************************************************/
+
+#if defined(CONFIG_LCD_LOGO) && !defined(LCD_INFO_BELOW_LOGO)
+#define CONSOLE_ROWS ((panel_info.vl_row-BMP_LOGO_HEIGHT) \
+ / VIDEO_FONT_HEIGHT)
+#else
+#define CONSOLE_ROWS (panel_info.vl_row / VIDEO_FONT_HEIGHT)
+#endif
+#define CONSOLE_COLS (panel_info.vl_col / VIDEO_FONT_WIDTH)
+#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * lcd_line_length)
+#define CONSOLE_ROW_FIRST (lcd_console_address)
+#define CONSOLE_ROW_SECOND (lcd_console_address + CONSOLE_ROW_SIZE)
+#define CONSOLE_ROW_LAST (lcd_console_address + CONSOLE_SIZE \
+ - CONSOLE_ROW_SIZE)
+#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS)
+#define CONSOLE_SCROLL_SIZE (CONSOLE_SIZE - CONSOLE_ROW_SIZE)
+
+#if LCD_BPP == LCD_MONOCHROME
+#define COLOR_MASK(c) ((c) | (c) << 1 | (c) << 2 | (c) << 3 | \
+ (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
+#elif LCD_BPP == LCD_COLOR8
+#define COLOR_MASK(c) (c)
+#elif LCD_BPP == LCD_COLOR16
+#define COLOR_MASK(c) (c)
+#else
+#error Unsupported LCD BPP.
+#endif
+
+static short console_col;
+static short console_row;
+
+/************************************************************************/
+
+ulong lcd_setmem (ulong addr);
+
+static void lcd_drawchars (ushort x, ushort y, uchar *str, int count);
+static inline void lcd_puts_xy (ushort x, ushort y, uchar *s);
+static inline void lcd_putc_xy (ushort x, ushort y, uchar c);
+
+static int lcd_init (void *lcdbase);
+static void lcd_ctrl_init (void *lcdbase);
+static void lcd_enable (void);
+static void *lcd_logo (void);
+#if LCD_BPP == LCD_COLOR8
+static void lcd_setcolreg (ushort regno,
+ ushort red, ushort green, ushort blue);
+#endif
+#if LCD_BPP == LCD_MONOCHROME
+static void lcd_initcolregs (void);
+#endif
+static void lcd_setfgcolor (int color);
+static void lcd_setbgcolor (int color);
+
+#ifdef NOT_USED_SO_FAR
+static int lcd_getbgcolor (void);
+static void lcd_disable (void);
+static void lcd_getcolreg (ushort regno,
+ ushort *red, ushort *green, ushort *blue);
+static int lcd_getfgcolor (void);
+#endif /* NOT_USED_SO_FAR */
+
+
+static int pxafb_init_mem(void *lcdbase, vidinfo_t *vid);
+static void pxafb_setup_gpio(vidinfo_t *vid);
+static void pxafb_enable_controller(vidinfo_t *vid);
+static int pxafb_init(vidinfo_t *vid);
+
+/************************************************************************/
+
+/*----------------------------------------------------------------------*/
+
+static void console_scrollup (void)
+{
+ /* Copy up rows ignoring the first one */
+ memcpy (CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND, CONSOLE_SCROLL_SIZE);
+
+ /* Clear the last one */
+ memset (CONSOLE_ROW_LAST, COLOR_MASK(lcd_color_bg), CONSOLE_ROW_SIZE);
+}
+
+/*----------------------------------------------------------------------*/
+
+static inline void console_back (void)
+{
+ if (--console_col < 0) {
+ console_col = CONSOLE_COLS-1 ;
+ if (--console_row < 0) {
+ console_row = 0;
+ }
+ }
+
+ lcd_putc_xy (console_col * VIDEO_FONT_WIDTH,
+ console_row * VIDEO_FONT_HEIGHT,
+ ' ');
+}
+
+/*----------------------------------------------------------------------*/
+
+static inline void console_newline (void)
+{
+ ++console_row;
+ console_col = 0;
+
+ /* Check if we need to scroll the terminal */
+ if (console_row >= CONSOLE_ROWS) {
+ /* Scroll everything up */
+ console_scrollup () ;
+ --console_row;
+ }
+}
+
+/*----------------------------------------------------------------------*/
+
+void lcd_putc (const char c)
+{
+ if (!lcd_is_enabled) {
+ serial_putc(c);
+ return;
+ }
+
+ switch (c) {
+ case '\r': console_col = 0;
+ return;
+
+ case '\n': console_newline();
+ return;
+
+ case '\t': /* Tab (8 chars alignment) */
+ console_col |= 8;
+ console_col &= ~7;
+
+ if (console_col >= CONSOLE_COLS) {
+ console_newline();
+ }
+ return;
+
+ case '\b': console_back();
+ return;
+
+ default: lcd_putc_xy (console_col * VIDEO_FONT_WIDTH,
+ console_row * VIDEO_FONT_HEIGHT,
+ c);
+ if (++console_col >= CONSOLE_COLS) {
+ console_newline();
+ }
+ return;
+ }
+ /* NOTREACHED */
+}
+
+/*----------------------------------------------------------------------*/
+
+void lcd_puts (const char *s)
+{
+ if (!lcd_is_enabled) {
+ serial_puts (s);
+ return;
+ }
+
+ while (*s) {
+ lcd_putc (*s++);
+ }
+}
+
+/************************************************************************/
+/* ** Low-Level Graphics Routines */
+/************************************************************************/
+
+static void lcd_drawchars (ushort x, ushort y, uchar *str, int count)
+{
+ uchar *dest;
+ ushort off, row;
+
+ dest = (uchar *)(lcd_base + y * lcd_line_length + x * (1 << LCD_BPP) / 8);
+ off = x * (1 << LCD_BPP) % 8;
+
+ for (row=0; row < VIDEO_FONT_HEIGHT; ++row, dest += lcd_line_length) {
+ uchar *s = str;
+ uchar *d = dest;
+ int i;
+
+#if LCD_BPP == LCD_MONOCHROME
+ uchar rest = *d & -(1 << (8-off));
+ uchar sym;
+#endif
+ for (i=0; i<count; ++i) {
+ uchar c, bits;
+
+ c = *s++;
+ bits = video_fontdata[c * VIDEO_FONT_HEIGHT + row];
+
+#if LCD_BPP == LCD_MONOCHROME
+ sym = (COLOR_MASK(lcd_color_fg) & bits) |
+ (COLOR_MASK(lcd_color_bg) & ~bits);
+
+ *d++ = rest | (sym >> off);
+ rest = sym << (8-off);
+#elif LCD_BPP == LCD_COLOR8
+ for (c=0; c<8; ++c) {
+ *d++ = (bits & 0x80) ?
+ lcd_color_fg : lcd_color_bg;
+ bits <<= 1;
+ }
+#elif LCD_BPP == LCD_COLOR16
+ for (c=0; c<16; ++c) {
+ *d++ = (bits & 0x80) ?
+ lcd_color_fg : lcd_color_bg;
+ bits <<= 1;
+ }
+#endif
+ }
+
+#if LCD_BPP == LCD_MONOCHROME
+ *d = rest | (*d & ((1 << (8-off)) - 1));
+#endif
+ }
+}
+
+/*----------------------------------------------------------------------*/
+
+static inline void lcd_puts_xy (ushort x, ushort y, uchar *s)
+{
+#if defined(CONFIG_LCD_LOGO) && !defined(LCD_INFO_BELOW_LOGO)
+ lcd_drawchars (x, y+BMP_LOGO_HEIGHT, s, strlen (s));
+#else
+ lcd_drawchars (x, y, s, strlen (s));
+#endif
+}
+
+/*----------------------------------------------------------------------*/
+
+static inline void lcd_putc_xy (ushort x, ushort y, uchar c)
+{
+#if defined(CONFIG_LCD_LOGO) && !defined(LCD_INFO_BELOW_LOGO)
+ lcd_drawchars (x, y+BMP_LOGO_HEIGHT, &c, 1);
+#else
+ lcd_drawchars (x, y, &c, 1);
+#endif
+}
+
+/************************************************************************/
+/** Small utility to check that you got the colours right */
+/************************************************************************/
+#ifdef LCD_TEST_PATTERN
+
+#define N_BLK_VERT 2
+#define N_BLK_HOR 3
+
+static int test_colors[N_BLK_HOR*N_BLK_VERT] = {
+ CONSOLE_COLOR_RED, CONSOLE_COLOR_GREEN, CONSOLE_COLOR_YELLOW,
+ CONSOLE_COLOR_BLUE, CONSOLE_COLOR_MAGENTA, CONSOLE_COLOR_CYAN,
+};
+
+static void test_pattern (void)
+{
+ ushort v_max = panel_info.vl_row;
+ ushort h_max = panel_info.vl_col;
+ ushort v_step = (v_max + N_BLK_VERT - 1) / N_BLK_VERT;
+ ushort h_step = (h_max + N_BLK_HOR - 1) / N_BLK_HOR;
+ ushort v, h;
+ uchar *pix = (uchar *)lcd_base;
+
+ printf ("[LCD] Test Pattern: %d x %d [%d x %d]\n",
+ h_max, v_max, h_step, v_step);
+
+ /* WARNING: Code silently assumes 8bit/pixel */
+ for (v=0; v<v_max; ++v) {
+ uchar iy = v / v_step;
+ for (h=0; h<h_max; ++h) {
+ uchar ix = N_BLK_HOR * iy + (h/h_step);
+ *pix++ = test_colors[ix];
+ }
+ }
+}
+#endif /* LCD_TEST_PATTERN */
+
+
+/************************************************************************/
+/* ** GENERIC Initialization Routines */
+/************************************************************************/
+
+int drv_lcd_init (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ device_t lcddev;
+ int rc;
+
+ lcd_base = (void *)(gd->fb_base);
+
+ lcd_line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8;
+
+ lcd_init (lcd_base); /* LCD initialization */
+
+ /* Device initialization */
+ memset (&lcddev, 0, sizeof (lcddev));
+
+ strcpy (lcddev.name, "lcd");
+ lcddev.ext = 0; /* No extensions */
+ lcddev.flags = DEV_FLAGS_OUTPUT; /* Output only */
+ lcddev.putc = lcd_putc; /* 'putc' function */
+ lcddev.puts = lcd_puts; /* 'puts' function */
+
+ rc = device_register (&lcddev);
+ return (rc == 0) ? 1 : rc;
+}
+
+/*----------------------------------------------------------------------*/
+
+static int lcd_init (void *lcdbase)
+{
+ /* Initialize the lcd controller */
+ debug ("[LCD] Initializing LCD frambuffer at %p\n", lcdbase);
+
+ lcd_ctrl_init (lcdbase);
+
+#if LCD_BPP == LCD_MONOCHROME
+ /* Setting the palette */
+ lcd_initcolregs();
+
+#elif LCD_BPP == LCD_COLOR8
+ /* Setting the palette */
+ lcd_setcolreg (CONSOLE_COLOR_BLACK, 0, 0, 0);
+ lcd_setcolreg (CONSOLE_COLOR_RED, 0xFF, 0, 0);
+ lcd_setcolreg (CONSOLE_COLOR_GREEN, 0, 0xFF, 0);
+ lcd_setcolreg (CONSOLE_COLOR_YELLOW, 0xFF, 0xFF, 0);
+ lcd_setcolreg (CONSOLE_COLOR_BLUE, 0, 0, 0xFF);
+ lcd_setcolreg (CONSOLE_COLOR_MAGENTA, 0xFF, 0, 0xFF);
+ lcd_setcolreg (CONSOLE_COLOR_CYAN, 0, 0xFF, 0xFF);
+ lcd_setcolreg (CONSOLE_COLOR_GREY, 0xAA, 0xAA, 0xAA);
+ lcd_setcolreg (CONSOLE_COLOR_WHITE, 0xFF, 0xFF, 0xFF);
+#endif
+
+#define CFG_WHITE_ON_BLACK
+#ifndef CFG_WHITE_ON_BLACK
+ lcd_setfgcolor (CONSOLE_COLOR_BLACK);
+ lcd_setbgcolor (CONSOLE_COLOR_WHITE);
+#else
+ lcd_setfgcolor (CONSOLE_COLOR_WHITE);
+ lcd_setbgcolor (CONSOLE_COLOR_BLACK);
+#endif /* CFG_WHITE_ON_BLACK */
+
+#ifdef LCD_TEST_PATTERN
+ test_pattern();
+#else
+ /* set framebuffer to background color */
+ memset ((char *)lcd_base,
+ COLOR_MASK(lcd_getbgcolor()),
+ lcd_line_length*panel_info.vl_row);
+#endif
+
+ lcd_enable ();
+
+ /* Paint the logo and retrieve LCD base address */
+ debug ("[LCD] Drawing the logo...\n");
+ lcd_console_address = lcd_logo ();
+
+ /* Initialize the console */
+ console_col = 0;
+#ifdef LCD_INFO_BELOW_LOGO
+ console_row = 7 + BMP_LOGO_HEIGHT / VIDEO_FONT_HEIGHT;
+#else
+ console_row = 1; /* leave 1 blank line below logo */
+#endif
+ lcd_is_enabled = 1;
+
+ return 0;
+}
+
+
+/************************************************************************/
+/* ** ROM capable initialization part - needed to reserve FB memory */
+/************************************************************************/
+
+/*
+ * This is called early in the system initialization to grab memory
+ * for the LCD controller.
+ * Returns new address for monitor, after reserving LCD buffer memory
+ *
+ * Note that this is running from ROM, so no write access to global data.
+ */
+ulong lcd_setmem (ulong addr)
+{
+ ulong size;
+ int line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8;
+
+ debug ("LCD panel info: %d x %d, %d bit/pix\n",
+ panel_info.vl_col, panel_info.vl_row, NBITS (panel_info.vl_bpix) );
+
+ /* extra page for dma descriptors and palette */
+ size = line_length * panel_info.vl_row + PAGE_SIZE;
+
+ /* Round up to nearest full page */
+ size = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
+
+ /* Allocate pages for the frame buffer. */
+ addr -= size;
+
+ debug ("Reserving %ldk for LCD Framebuffer at: %08lx\n", size>>10, addr);
+
+ return (addr);
+}
+
+
+/************************************************************************/
+/* ----------------- chipset specific functions ----------------------- */
+/************************************************************************/
+
+static void lcd_ctrl_init (void *lcdbase)
+{
+ pxafb_init_mem(lcdbase, &panel_info);
+ pxafb_init(&panel_info);
+ pxafb_setup_gpio(&panel_info);
+ pxafb_enable_controller(&panel_info);
+}
+
+/*----------------------------------------------------------------------*/
+
+#ifdef NOT_USED_SO_FAR
+static void
+lcd_getcolreg (ushort regno, ushort *red, ushort *green, ushort *blue)
+{
+}
+#endif /* NOT_USED_SO_FAR */
+
+/*----------------------------------------------------------------------*/
+
+#if LCD_BPP == LCD_COLOR8
+static void
+lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)
+{
+ struct pxafb_info *fbi = &panel_info.pxa;
+ unsigned short *palette = (unsigned short *)fbi->palette;
+ u_int val;
+
+ if (regno < fbi->palette_size) {
+ val = ((red << 8) & 0xf800);
+ val |= ((green << 4) & 0x07e0);
+ val |= (blue & 0x001f);
+
+#ifdef LCD_INVERT_COLORS
+ palette[regno] = ~val;
+#else
+ palette[regno] = ~val;
+#endif
+ }
+
+ debug ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %04X\n",
+ regno, &palette[regno],
+ red, green, blue,
+ palette[regno]);
+}
+#endif /* LCD_COLOR8 */
+
+/*----------------------------------------------------------------------*/
+
+#if LCD_BPP == LCD_MONOCHROME
+static
+void lcd_initcolregs (void)
+{
+ volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile cpm8xx_t *cp = &(immr->im_cpm);
+ ushort regno;
+
+ for (regno = 0; regno < 16; regno++) {
+ cp->lcd_cmap[regno * 2] = 0;
+ cp->lcd_cmap[(regno * 2) + 1] = regno & 0x0f;
+ }
+}
+#endif
+
+/*----------------------------------------------------------------------*/
+
+static void lcd_setfgcolor (int color)
+{
+ lcd_color_fg = color & 0x0F;
+}
+
+/*----------------------------------------------------------------------*/
+
+static void lcd_setbgcolor (int color)
+{
+ lcd_color_bg = color & 0x0F;
+}
+
+/*----------------------------------------------------------------------*/
+
+#ifdef NOT_USED_SO_FAR
+static int lcd_getfgcolor (void)
+{
+ return lcd_color_fg;
+}
+#endif /* NOT_USED_SO_FAR */
+
+/*----------------------------------------------------------------------*/
+
+#ifdef NOT_USED_SO_FAR
+static int lcd_getbgcolor (void)
+{
+ return lcd_color_bg;
+}
+#endif /* NOT_USED_SO_FAR */
+
+/*----------------------------------------------------------------------*/
+
+static void lcd_enable (void)
+{
+}
+
+/*----------------------------------------------------------------------*/
+
+#ifdef NOT_USED_SO_FAR
+static void lcd_disable (void)
+{
+}
+#endif /* NOT_USED_SO_FAR */
+
+
+/************************************************************************/
+/* ** Chipset depending Bitmap / Logo stuff... */
+/************************************************************************/
+
+#ifdef CONFIG_LCD_LOGO
+static void bitmap_plot (int x, int y)
+{
+ ushort *cmap;
+ ushort i;
+ uchar *bmap;
+ uchar *fb;
+ struct pxafb_info *fbi = &panel_info.pxa;
+
+ debug ("Logo: width %d height %d colors %d cmap %d\n",
+ BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS,
+ sizeof(bmp_logo_palette)/(sizeof(ushort))
+ );
+
+ /* Leave room for default color map */
+ cmap = (ushort *)fbi->palette;
+
+ /* Set color map */
+ for (i=0; i<(sizeof(bmp_logo_palette)/(sizeof(ushort))); ++i) {
+ ushort colreg = bmp_logo_palette[i];
+#ifdef CFG_INVERT_COLORS
+ colreg ^= 0xFFF;
+#endif
+ *cmap++ = colreg;
+ }
+
+ bmap = &bmp_logo_bitmap[0];
+ fb = (char *)(lcd_base + y * lcd_line_length + x);
+
+ for (i=0; i<BMP_LOGO_HEIGHT; ++i) {
+ memcpy (fb, bmap, BMP_LOGO_WIDTH);
+ bmap += BMP_LOGO_WIDTH;
+ fb += panel_info.vl_col;
+ }
+}
+#endif /* CONFIG_LCD_LOGO */
+
+/*----------------------------------------------------------------------*/
+
+static void *lcd_logo (void)
+{
+#ifdef CONFIG_LCD_LOGO
+ DECLARE_GLOBAL_DATA_PTR;
+ char info[80];
+ char temp[32];
+
+ bitmap_plot (0, 0);
+#endif /* CONFIG_LCD_LOGO */
+
+#if defined(CONFIG_LCD_LOGO) && !defined(LCD_INFO_BELOW_LOGO)
+ return ((void *)((ulong)lcd_base + BMP_LOGO_HEIGHT * lcd_line_length));
+#else
+ return ((void *)lcd_base);
+#endif /* CONFIG_LCD_LOGO */
+}
+
+/************************************************************************
+ PXA255 specific routines
+************************************************************************/
+
+static int pxafb_init_mem(void *lcdbase, vidinfo_t *vid)
+{
+ u_long palette_mem_size;
+ struct pxafb_info *fbi = &vid->pxa;
+ int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8;
+
+ fbi->screen = (u_long)lcdbase;
+
+ fbi->palette_size = NBITS(vid->vl_bpix) == 8 ? 256 : 16;
+ palette_mem_size = fbi->palette_size * sizeof(u16);
+ debug("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size);
+ /* locate palette and descs at end of page following fb */
+ fbi->palette = (u_long)lcdbase + fb_size + 2*PAGE_SIZE - palette_mem_size;
+
+ return 0;
+}
+
+static void pxafb_setup_gpio(vidinfo_t *vid)
+{
+ u_long lccr0;
+
+ /*
+ * setup is based on type of panel supported
+ */
+
+ lccr0 = vid->pxa.reg_lccr0;
+
+ /* 4 bit interface */
+ if ((lccr0 & LCCR0_CMS) && (lccr0 & LCCR0_SDS) && !(lccr0 & LCCR0_DPD))
+ {
+ debug("Setting GPIO for 4 bit data\n");
+ /* bits 58-61 */
+ GPDR1 |= (0xf << 26);
+ GAFR1_U = (GAFR1_U & ~(0xff << 20)) | (0xaa << 20);
+
+ /* bits 74-77 */
+ GPDR2 |= (0xf << 10);
+ GAFR2_L = (GAFR2_L & ~(0xff << 20)) | (0xaa << 20);
+ }
+
+ /* 8 bit interface */
+ else if (((lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_DPD))) ||
+ (!(lccr0 & LCCR0_CMS) && !(lccr0 & LCCR0_PAS) && !(lccr0 & LCCR0_SDS)))
+ {
+ debug("Setting GPIO for 8 bit data\n");
+ /* bits 58-65 */
+ GPDR1 |= (0x3f << 26);
+ GPDR2 |= (0x3);
+
+ GAFR1_U = (GAFR1_U & ~(0xfff << 20)) | (0xaaa << 20);
+ GAFR2_L = (GAFR2_L & ~0xf) | (0xa);
+
+ /* bits 74-77 */
+ GPDR2 |= (0xf << 10);
+ GAFR2_L = (GAFR2_L & ~(0xff << 20)) | (0xaa << 20);
+ }
+
+ /* 16 bit interface */
+ else if (!(lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_PAS)))
+ {
+ debug("Setting GPIO for 16 bit data\n");
+ /* bits 58-77 */
+ GPDR1 |= (0x3f << 26);
+ GPDR2 |= 0x00003fff;
+
+ GAFR1_U = (GAFR1_U & ~(0xfff << 20)) | (0xaaa << 20);
+ GAFR2_L = (GAFR2_L & 0xf0000000) | 0x0aaaaaaa;
+ }
+ else
+ {
+ printf("pxafb_setup_gpio: unable to determine bits per pixel\n");
+ }
+}
+
+static void pxafb_enable_controller(vidinfo_t *vid)
+{
+ debug("Enabling LCD controller\n");
+
+ /* Sequence from 11.7.10 */
+ LCCR3 = vid->pxa.reg_lccr3;
+ LCCR2 = vid->pxa.reg_lccr2;
+ LCCR1 = vid->pxa.reg_lccr1;
+ LCCR0 = vid->pxa.reg_lccr0 & ~LCCR0_ENB;
+ FDADR0 = vid->pxa.fdadr0;
+ FDADR1 = vid->pxa.fdadr1;
+ LCCR0 |= LCCR0_ENB;
+
+ CKEN |= CKEN16_LCD;
+
+ debug("FDADR0 = 0x%08x\n", (unsigned int)FDADR0);
+ debug("FDADR1 = 0x%08x\n", (unsigned int)FDADR1);
+ debug("LCCR0 = 0x%08x\n", (unsigned int)LCCR0);
+ debug("LCCR1 = 0x%08x\n", (unsigned int)LCCR1);
+ debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2);
+ debug("LCCR3 = 0x%08x\n", (unsigned int)LCCR3);
+}
+
+static int pxafb_init(vidinfo_t *vid)
+{
+ struct pxafb_info *fbi = &vid->pxa;
+
+ debug("Configuring PXA LCD\n");
+
+ fbi->reg_lccr0 = REG_LCCR0;
+ fbi->reg_lccr3 = REG_LCCR3;
+
+ debug("vid: vl_col=%d hslen=%d lm=%d rm=%d\n",
+ vid->vl_col, vid->vl_hpw,
+ vid->vl_blw, vid->vl_elw);
+ debug("vid: vl_row=%d vslen=%d um=%d bm=%d\n",
+ vid->vl_row, vid->vl_vpw,
+ vid->vl_bfw, vid->vl_efw);
+
+ fbi->reg_lccr1 =
+ LCCR1_DisWdth(vid->vl_col) +
+ LCCR1_HorSnchWdth(vid->vl_hpw) +
+ LCCR1_BegLnDel(vid->vl_blw) +
+ LCCR1_EndLnDel(vid->vl_elw);
+
+ fbi->reg_lccr2 =
+ LCCR2_DisHght(vid->vl_row) +
+ LCCR2_VrtSnchWdth(vid->vl_vpw) +
+ LCCR2_BegFrmDel(vid->vl_bfw) +
+ LCCR2_EndFrmDel(vid->vl_efw);
+
+ fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP);
+ fbi->reg_lccr3 |=
+ (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH)
+ | (vid->vl_vsp ? LCCR3_VrtSnchL : LCCR3_VrtSnchH);
+
+
+ /* setup dma descriptors */
+ fbi->dmadesc_fblow = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 3*16);
+ fbi->dmadesc_fbhigh = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 2*16);
+ fbi->dmadesc_palette = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 1*16);
+
+ #define BYTES_PER_PANEL ((fbi->reg_lccr0 & LCCR0_SDS) ? \
+ (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \
+ (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8))
+
+ /* populate descriptors */
+ fbi->dmadesc_fblow->fdadr = (u_long)fbi->dmadesc_fblow;
+ fbi->dmadesc_fblow->fsadr = fbi->screen + BYTES_PER_PANEL;
+ fbi->dmadesc_fblow->fidr = 0;
+ fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL;
+
+ fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */
+
+ fbi->dmadesc_fbhigh->fsadr = fbi->screen;
+ fbi->dmadesc_fbhigh->fidr = 0;
+ fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL;
+
+ fbi->dmadesc_palette->fsadr = fbi->palette;
+ fbi->dmadesc_palette->fidr = 0;
+ fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2) | LDCMD_PAL;
+
+ if( NBITS(vid->vl_bpix) < 12)
+ {
+ /* assume any mode with <12 bpp is palette driven */
+ fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh;
+ fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette;
+ /* flips back and forth between pal and fbhigh */
+ fbi->fdadr0 = (u_long)fbi->dmadesc_palette;
+ }
+ else
+ {
+ /* palette shouldn't be loaded in true-color mode */
+ fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_fbhigh;
+ fbi->fdadr0 = (u_long)fbi->dmadesc_fbhigh; /* no pal just fbhigh */
+ }
+
+ debug("fbi->dmadesc_fblow = 0x%lx\n", (u_long)fbi->dmadesc_fblow);
+ debug("fbi->dmadesc_fbhigh = 0x%lx\n", (u_long)fbi->dmadesc_fbhigh);
+ debug("fbi->dmadesc_palette = 0x%lx\n", (u_long)fbi->dmadesc_palette);
+
+ debug("fbi->dmadesc_fblow->fdadr = 0x%lx\n", fbi->dmadesc_fblow->fdadr);
+ debug("fbi->dmadesc_fbhigh->fdadr = 0x%lx\n", fbi->dmadesc_fbhigh->fdadr);
+ debug("fbi->dmadesc_palette->fdadr = 0x%lx\n", fbi->dmadesc_palette->fdadr);
+
+ debug("fbi->dmadesc_fblow->fsadr = 0x%lx\n", fbi->dmadesc_fblow->fsadr);
+ debug("fbi->dmadesc_fbhigh->fsadr = 0x%lx\n", fbi->dmadesc_fbhigh->fsadr);
+ debug("fbi->dmadesc_palette->fsadr = 0x%lx\n", fbi->dmadesc_palette->fsadr);
+
+ debug("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd);
+ debug("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd);
+ debug("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd);
+
+ return 0;
+}
+
+/************************************************************************/
+/************************************************************************/
+
+#endif /* CONFIG_LCD */
diff --git a/fs/Makefile b/fs/Makefile
index ad74942d08..27ee6fbdec 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -22,7 +22,7 @@
#
#
-SUBDIRS := jffs2 fdos
+SUBDIRS := jffs2 fdos fat
.depend all:
@for dir in $(SUBDIRS) ; do \
diff --git a/fs/fat/Makefile b/fs/fat/Makefile
new file mode 100644
index 0000000000..e4627577b7
--- /dev/null
+++ b/fs/fat/Makefile
@@ -0,0 +1,46 @@
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TOPDIR=../../
+
+include $(TOPDIR)/config.mk
+
+LIB = libfat.a
+
+AOBJS =
+COBJS = fat.o file.o
+
+OBJS = $(AOBJS) $(COBJS)
+
+all: $(LIB) $(AOBJS)
+
+$(LIB): .depend $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+
+#########################################################################
+
+.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
new file mode 100644
index 0000000000..9f0156719e
--- /dev/null
+++ b/fs/fat/fat.c
@@ -0,0 +1,901 @@
+/*
+ * fat.c
+ *
+ * R/O (V)FAT 12/16/32 filesystem implementation by Marcus Sundberg
+ *
+ * 2002-07-28 - rjones@nexus-tech.net - ported to ppcboot v1.1.6
+ * 2003-03-10 - kharris@nexus-tech.net - ported to uboot
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <fat.h>
+#include <asm/byteorder.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_FAT)
+
+/*
+ * Convert a string to lowercase.
+ */
+static void
+downcase(char *str)
+{
+ while (*str != '\0') {
+ TOLOWER(*str);
+ str++;
+ }
+}
+
+int (*dev_block_read)(int device, __u32 blknr, __u32 blkcnt, __u8 *buffer) = 0;
+
+int disk_read (__u32 startblock, __u32 getsize, __u8 * bufptr)
+{
+ /* FIXME we need to determine the start block of the
+ * partition where the DOS FS resides
+ */
+ startblock += 32;
+
+ if (dev_block_read) {
+ return dev_block_read (0, startblock, getsize, bufptr);
+ }
+ return -1;
+}
+
+
+int
+fat_register_read (int (*block_read)(int, __u32, __u32, __u8 *))
+{
+ dev_block_read = block_read;
+ return 0;
+}
+
+
+/*
+ * Get the first occurence of a directory delimiter ('/' or '\') in a string.
+ * Return index into string if found, -1 otherwise.
+ */
+static int
+dirdelim(char *str)
+{
+ char *start = str;
+
+ while (*str != '\0') {
+ if (ISDIRDELIM(*str)) return str - start;
+ str++;
+ }
+ return -1;
+}
+
+
+/*
+ * Match volume_info fs_type strings.
+ * Return 0 on match, -1 otherwise.
+ */
+static int
+compare_sign(char *str1, char *str2)
+{
+ char *end = str1+SIGNLEN;
+
+ while (str1 != end) {
+ if (*str1 != *str2) {
+ return -1;
+ }
+ str1++;
+ str2++;
+ }
+
+ return 0;
+}
+
+
+/*
+ * Extract zero terminated short name from a directory entry.
+ */
+static void get_name (dir_entry *dirent, char *s_name)
+{
+ char *ptr;
+
+ memcpy (s_name, dirent->name, 8);
+ s_name[8] = '\0';
+ ptr = s_name;
+ while (*ptr && *ptr != ' ')
+ ptr++;
+ if (dirent->ext[0] && dirent->ext[0] != ' ') {
+ *ptr = '.';
+ ptr++;
+ memcpy (ptr, dirent->ext, 3);
+ ptr[3] = '\0';
+ while (*ptr && *ptr != ' ')
+ ptr++;
+ }
+ *ptr = '\0';
+ if (*s_name == DELETED_FLAG)
+ *s_name = '\0';
+ else if (*s_name == aRING)
+ *s_name = '';
+ downcase (s_name);
+}
+
+/*
+ * Get the entry at index 'entry' in a FAT (12/16/32) table.
+ * On failure 0x00 is returned.
+ */
+static __u32
+get_fatent(fsdata *mydata, __u32 entry)
+{
+ __u32 bufnum;
+ __u32 offset;
+ __u32 ret = 0x00;
+
+ switch (mydata->fatsize) {
+ case 32:
+ bufnum = entry / FAT32BUFSIZE;
+ offset = entry - bufnum * FAT32BUFSIZE;
+ break;
+ case 16:
+ bufnum = entry / FAT16BUFSIZE;
+ offset = entry - bufnum * FAT16BUFSIZE;
+ break;
+ case 12:
+ bufnum = entry / FAT12BUFSIZE;
+ offset = entry - bufnum * FAT12BUFSIZE;
+ break;
+
+ default:
+ /* Unsupported FAT size */
+ return ret;
+ }
+
+ /* Read a new block of FAT entries into the cache. */
+ if (bufnum != mydata->fatbufnum) {
+ int getsize = FATBUFSIZE/FS_BLOCK_SIZE;
+ __u8 *bufptr = mydata->fatbuf;
+ __u32 fatlength = mydata->fatlength;
+ __u32 startblock = bufnum * FATBUFBLOCKS;
+
+ fatlength *= SECTOR_SIZE; /* We want it in bytes now */
+ startblock += mydata->fat_sect; /* Offset from start of disk */
+
+ if (getsize > fatlength) getsize = fatlength;
+ if (disk_read(startblock, getsize, bufptr) < 0) {
+ FAT_DPRINT("Error reading FAT blocks\n");
+ return ret;
+ }
+ mydata->fatbufnum = bufnum;
+ }
+
+ /* Get the actual entry from the table */
+ switch (mydata->fatsize) {
+ case 32:
+ ret = FAT2CPU32(((__u32*)mydata->fatbuf)[offset]);
+ break;
+ case 16:
+ ret = FAT2CPU16(((__u16*)mydata->fatbuf)[offset]);
+ break;
+ case 12: {
+ __u32 off16 = (offset*3)/4;
+ __u16 val1, val2;
+
+ switch (offset & 0x3) {
+ case 0:
+ ret = FAT2CPU16(((__u16*)mydata->fatbuf)[off16]);
+ ret &= 0xfff;
+ break;
+ case 1:
+ val1 = FAT2CPU16(((__u16*)mydata->fatbuf)[off16]);
+ val1 &= 0xf000;
+ val2 = FAT2CPU16(((__u16*)mydata->fatbuf)[off16+1]);
+ val2 &= 0x00ff;
+ ret = (val2 << 4) | (val1 >> 12);
+ break;
+ case 2:
+ val1 = FAT2CPU16(((__u16*)mydata->fatbuf)[off16]);
+ val1 &= 0xff00;
+ val2 = FAT2CPU16(((__u16*)mydata->fatbuf)[off16+1]);
+ val2 &= 0x000f;
+ ret = (val2 << 8) | (val1 >> 8);
+ break;
+ case 3:
+ ret = FAT2CPU16(((__u16*)mydata->fatbuf)[off16]);;
+ ret = (ret & 0xfff0) >> 4;
+ break;
+ default:
+ break;
+ }
+ }
+ break;
+ }
+ FAT_DPRINT("ret: %d, offset: %d\n", ret, offset);
+
+ return ret;
+}
+
+
+/*
+ * Read at most 'size' bytes from the specified cluster into 'buffer'.
+ * Return 0 on success, -1 otherwise.
+ */
+static int
+get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size)
+{
+ int idx = 0;
+ __u32 startsect;
+
+ if (clustnum > 0) {
+ startsect = mydata->data_begin + clustnum*mydata->clust_size;
+ } else {
+ startsect = mydata->rootdir_sect;
+ }
+
+ FAT_DPRINT("gc - clustnum: %d, startsect: %d\n", clustnum, startsect);
+ while (size > 0) {
+ if (size >= FS_BLOCK_SIZE) {
+ if (disk_read(startsect + idx, 1, buffer) < 0) {
+ FAT_DPRINT("Error reading data\n");
+ return -1;
+ }
+ } else {
+ __u8 tmpbuf[FS_BLOCK_SIZE];
+ if (disk_read(startsect + idx, 1, tmpbuf) < 0) {
+ FAT_DPRINT("Error reading data\n");
+ return -1;
+ }
+ memcpy(buffer, tmpbuf, size);
+
+ return 0;
+ }
+ buffer += FS_BLOCK_SIZE;
+ size -= FS_BLOCK_SIZE;
+ idx++;
+ }
+
+ return 0;
+}
+
+
+/*
+ * Read at most 'maxsize' bytes from the file associated with 'dentptr'
+ * into 'buffer'.
+ * Return the number of bytes read or -1 on fatal errors.
+ */
+static long
+get_contents(fsdata *mydata, dir_entry *dentptr, __u8 *buffer,
+ unsigned long maxsize)
+{
+ unsigned long filesize = FAT2CPU32(dentptr->size), gotsize = 0;
+ unsigned int bytesperclust = mydata->clust_size * SECTOR_SIZE;
+ __u32 curclust = START(dentptr);
+
+ FAT_DPRINT("Filesize: %ld bytes\n", filesize);
+
+ if (maxsize > 0 && filesize > maxsize) filesize = maxsize;
+
+ FAT_DPRINT("Reading: %ld bytes\n", filesize);
+
+ do {
+ int getsize = (filesize > bytesperclust) ? bytesperclust :
+ filesize;
+
+ if (get_cluster(mydata, curclust, buffer, getsize) != 0) {
+ FAT_ERROR("Error reading cluster\n");
+ return -1;
+ }
+ gotsize += getsize;
+ filesize -= getsize;
+ if (filesize <= 0) return gotsize;
+ buffer += getsize;
+
+ curclust = get_fatent(mydata, curclust);
+ if (curclust <= 0x0001 || curclust >= 0xfff0) {
+ FAT_DPRINT("curclust: 0x%x\n", curclust);
+ FAT_ERROR("Invalid FAT entry\n");
+ return gotsize;
+ }
+ } while (1);
+}
+
+
+#ifdef CONFIG_SUPPORT_VFAT
+/*
+ * Extract the file name information from 'slotptr' into 'l_name',
+ * starting at l_name[*idx].
+ * Return 1 if terminator (zero byte) is found, 0 otherwise.
+ */
+static int
+slot2str(dir_slot *slotptr, char *l_name, int *idx)
+{
+ int j;
+
+ for (j = 0; j <= 8; j += 2) {
+ l_name[*idx] = slotptr->name0_4[j];
+ if (l_name[*idx] == 0x00) return 1;
+ (*idx)++;
+ }
+ for (j = 0; j <= 10; j += 2) {
+ l_name[*idx] = slotptr->name5_10[j];
+ if (l_name[*idx] == 0x00) return 1;
+ (*idx)++;
+ }
+ for (j = 0; j <= 2; j += 2) {
+ l_name[*idx] = slotptr->name11_12[j];
+ if (l_name[*idx] == 0x00) return 1;
+ (*idx)++;
+ }
+
+ return 0;
+}
+
+
+/*
+ * Extract the full long filename starting at 'retdent' (which is really
+ * a slot) into 'l_name'. If successful also copy the real directory entry
+ * into 'retdent'
+ * Return 0 on success, -1 otherwise.
+ */
+static int
+get_vfatname(fsdata *mydata, int curclust, __u8 *cluster,
+ dir_entry *retdent, char *l_name)
+{
+ dir_entry *realdent;
+ dir_slot *slotptr = (dir_slot*) retdent;
+ __u8 *nextclust = cluster + mydata->clust_size * SECTOR_SIZE;
+ __u8 counter = slotptr->id & 0xf;
+ int idx = 0;
+
+ while ((__u8*)slotptr < nextclust) {
+ if (counter == 0) break;
+ if ((slotptr->id & 0x0f) != counter) return -1;
+ slotptr++;
+ counter--;
+ }
+
+ if ((__u8*)slotptr >= nextclust) {
+ __u8 block[MAX_CLUSTSIZE];
+ dir_slot *slotptr2;
+
+ slotptr--;
+ curclust = get_fatent(mydata, curclust);
+ if (curclust <= 0x0001 || curclust >= 0xfff0) {
+ FAT_DPRINT("curclust: 0x%x\n", curclust);
+ FAT_ERROR("Invalid FAT entry\n");
+ return -1;
+ }
+ if (get_cluster(mydata, curclust, block,
+ mydata->clust_size * SECTOR_SIZE) != 0) {
+ FAT_DPRINT("Error: reading directory block\n");
+ return -1;
+ }
+ slotptr2 = (dir_slot*) block;
+ while (slotptr2->id > 0x01) {
+ slotptr2++;
+ }
+ /* Save the real directory entry */
+ realdent = (dir_entry*)slotptr2 + 1;
+ while ((__u8*)slotptr2 >= block) {
+ slot2str(slotptr2, l_name, &idx);
+ slotptr2--;
+ }
+ } else {
+ /* Save the real directory entry */
+ realdent = (dir_entry*)slotptr;
+ }
+
+ do {
+ slotptr--;
+ if (slot2str(slotptr, l_name, &idx)) break;
+ } while (!(slotptr->id & 0x40));
+
+ l_name[idx] = '\0';
+ if (*l_name == DELETED_FLAG) *l_name = '\0';
+ else if (*l_name == aRING) *l_name = '';
+ downcase(l_name);
+
+ /* Return the real directory entry */
+ memcpy(retdent, realdent, sizeof(dir_entry));
+
+ return 0;
+}
+
+
+/* Calculate short name checksum */
+static __u8
+mkcksum(const char *str)
+{
+ int i;
+ __u8 ret = 0;
+
+ for (i = 0; i < 11; i++) {
+ ret = (((ret&1)<<7)|((ret&0xfe)>>1)) + str[i];
+ }
+
+ return ret;
+}
+#endif
+
+
+/*
+ * Get the directory entry associated with 'filename' from the directory
+ * starting at 'startsect'
+ */
+static dir_entry *get_dentfromdir (fsdata * mydata, int startsect,
+ char *filename, dir_entry * retdent,
+ int dols)
+{
+ __u16 prevcksum = 0xffff;
+ __u8 block[MAX_CLUSTSIZE];
+ __u32 curclust = START (retdent);
+ int files = 0, dirs = 0;
+
+ FAT_DPRINT ("get_dentfromdir: %s\n", filename);
+ while (1) {
+ dir_entry *dentptr;
+ int i;
+
+ if (get_cluster (mydata, curclust, block,
+ mydata->clust_size * SECTOR_SIZE) != 0) {
+ FAT_DPRINT ("Error: reading directory block\n");
+ return NULL;
+ }
+ dentptr = (dir_entry *) block;
+ for (i = 0; i < DIRENTSPERCLUST; i++) {
+ char s_name[14], l_name[256];
+
+ l_name[0] = '\0';
+ if ((dentptr->attr & ATTR_VOLUME)) {
+#ifdef CONFIG_SUPPORT_VFAT
+ if ((dentptr->attr & ATTR_VFAT) &&
+ (dentptr->name[0] & 0x40)) {
+ prevcksum = ((dir_slot *) dentptr)
+ ->alias_checksum;
+ get_vfatname (mydata, curclust, block,
+ dentptr, l_name);
+ if (dols) {
+ int isdir = (dentptr->attr & ATTR_DIR);
+ char dirc;
+ int doit = 0;
+
+ if (isdir) {
+ dirs++;
+ dirc = '/';
+ doit = 1;
+ } else {
+ dirc = ' ';
+ if (l_name[0] != 0) {
+ files++;
+ doit = 1;
+ }
+ }
+ if (doit) {
+ if (dirc == ' ') {
+ printf (" %8ld %s%c\n",
+ (long) FAT2CPU32 (dentptr->size),
+ l_name, dirc);
+ } else {
+ printf (" %s%c\n", l_name, dirc);
+ }
+ }
+ dentptr++;
+ continue;
+ }
+ FAT_DPRINT ("vfatname: |%s|\n", l_name);
+ } else
+#endif
+ {
+ /* Volume label or VFAT entry */
+ dentptr++;
+ continue;
+ }
+ }
+ if (dentptr->name[0] == 0) {
+ if (dols) {
+ printf ("\n%d file(s), %d dir(s)\n\n", files, dirs);
+ }
+ FAT_DPRINT ("Dentname == NULL - %d\n", i);
+ return NULL;
+ }
+#ifdef CONFIG_SUPPORT_VFAT
+ if (dols && mkcksum (dentptr->name) == prevcksum) {
+ dentptr++;
+ continue;
+ }
+#endif
+ get_name (dentptr, s_name);
+ if (dols) {
+ int isdir = (dentptr->attr & ATTR_DIR);
+ char dirc;
+ int doit = 0;
+
+ if (isdir) {
+ dirs++;
+ dirc = '/';
+ doit = 1;
+ } else {
+ dirc = ' ';
+ if (s_name[0] != 0) {
+ files++;
+ doit = 1;
+ }
+ }
+ if (doit) {
+ if (dirc == ' ') {
+ printf (" %8ld %s%c\n",
+ (long) FAT2CPU32 (dentptr->size), s_name,
+ dirc);
+ } else {
+ printf (" %s%c\n", s_name, dirc);
+ }
+ }
+ dentptr++;
+ continue;
+ }
+ if (strcmp (filename, s_name) && strcmp (filename, l_name)) {
+ FAT_DPRINT ("Mismatch: |%s|%s|\n", s_name, l_name);
+ dentptr++;
+ continue;
+ }
+ memcpy (retdent, dentptr, sizeof (dir_entry));
+
+ FAT_DPRINT ("DentName: %s", s_name);
+ FAT_DPRINT (", start: 0x%x", START (dentptr));
+ FAT_DPRINT (", size: 0x%x %s\n",
+ FAT2CPU32 (dentptr->size),
+ (dentptr->attr & ATTR_DIR) ? "(DIR)" : "");
+
+ return retdent;
+ }
+ curclust = get_fatent (mydata, curclust);
+ if (curclust <= 0x0001 || curclust >= 0xfff0) {
+ FAT_DPRINT ("curclust: 0x%x\n", curclust);
+ FAT_ERROR ("Invalid FAT entry\n");
+ return NULL;
+ }
+ }
+
+ return NULL;
+}
+
+
+/*
+ * Read boot sector and volume info from a FAT filesystem
+ */
+static int
+read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize)
+{
+ __u8 block[FS_BLOCK_SIZE];
+ volume_info *vistart;
+
+ if (disk_read(0, 1, block) < 0) {
+ FAT_DPRINT("Error: reading block\n");
+ return -1;
+ }
+
+ memcpy(bs, block, sizeof(boot_sector));
+ bs->reserved = FAT2CPU16(bs->reserved);
+ bs->fat_length = FAT2CPU16(bs->fat_length);
+ bs->secs_track = FAT2CPU16(bs->secs_track);
+ bs->heads = FAT2CPU16(bs->heads);
+#if 0 /* UNUSED */
+ bs->hidden = FAT2CPU32(bs->hidden);
+#endif
+ bs->total_sect = FAT2CPU32(bs->total_sect);
+
+ /* FAT32 entries */
+ if (bs->fat_length == 0) {
+ /* Assume FAT32 */
+ bs->fat32_length = FAT2CPU32(bs->fat32_length);
+ bs->flags = FAT2CPU16(bs->flags);
+ bs->root_cluster = FAT2CPU32(bs->root_cluster);
+ bs->info_sector = FAT2CPU16(bs->info_sector);
+ bs->backup_boot = FAT2CPU16(bs->backup_boot);
+ vistart = (volume_info*) (block + sizeof(boot_sector));
+ *fatsize = 32;
+ } else {
+ vistart = (volume_info*) &(bs->fat32_length);
+ *fatsize = 0;
+ }
+ memcpy(volinfo, vistart, sizeof(volume_info));
+
+ /* Terminate fs_type string. Writing past the end of vistart
+ is ok - it's just the buffer. */
+ vistart->fs_type[8] = '\0';
+
+ if (*fatsize == 32) {
+ if (compare_sign(FAT32_SIGN, vistart->fs_type) == 0) {
+ return 0;
+ }
+ } else {
+ if (compare_sign(FAT12_SIGN, vistart->fs_type) == 0) {
+ *fatsize = 12;
+ return 0;
+ }
+ if (compare_sign(FAT16_SIGN, vistart->fs_type) == 0) {
+ *fatsize = 16;
+ return 0;
+ }
+ }
+
+ FAT_DPRINT("Error: broken fs_type sign\n");
+ return -1;
+}
+
+
+static long
+do_fat_read (const char *filename, void *buffer, unsigned long maxsize,
+ int dols)
+{
+ __u8 block[FS_BLOCK_SIZE]; /* Block buffer */
+ char fnamecopy[2048];
+ boot_sector bs;
+ volume_info volinfo;
+ fsdata datablock;
+ fsdata *mydata = &datablock;
+ dir_entry *dentptr;
+ __u16 prevcksum = 0xffff;
+ char *subname = "";
+ int rootdir_size, cursect;
+ int idx, isdir = 0;
+ int files = 0, dirs = 0;
+ long ret = 0;
+ int firsttime;
+
+ if (read_bootsectandvi (&bs, &volinfo, &mydata->fatsize)) {
+ FAT_DPRINT ("Error: reading boot sector\n");
+ return -1;
+ }
+ if (mydata->fatsize == 32) {
+ mydata->fatlength = bs.fat32_length;
+ } else {
+ mydata->fatlength = bs.fat_length;
+ }
+ mydata->fat_sect = bs.reserved;
+ cursect = mydata->rootdir_sect
+ = mydata->fat_sect + mydata->fatlength * bs.fats;
+ mydata->clust_size = bs.cluster_size;
+ if (mydata->fatsize == 32) {
+ rootdir_size = mydata->clust_size;
+ mydata->data_begin = mydata->rootdir_sect /* + rootdir_size */
+ - (mydata->clust_size * 2);
+ } else {
+ rootdir_size = ((bs.dir_entries[1] * (int) 256 + bs.dir_entries[0])
+ * sizeof (dir_entry)) / SECTOR_SIZE;
+ mydata->data_begin = mydata->rootdir_sect + rootdir_size
+ - (mydata->clust_size * 2);
+ }
+ mydata->fatbufnum = -1;
+
+ FAT_DPRINT ("FAT%d, fatlength: %d\n", mydata->fatsize,
+ mydata->fatlength);
+ FAT_DPRINT ("Rootdir begins at sector: %d, offset: %x, size: %d\n"
+ "Data begins at: %d\n",
+ mydata->rootdir_sect, mydata->rootdir_sect * SECTOR_SIZE,
+ rootdir_size, mydata->data_begin);
+ FAT_DPRINT ("Cluster size: %d\n", mydata->clust_size);
+
+ /* "cwd" is always the root... */
+ while (ISDIRDELIM (*filename))
+ filename++;
+ /* Make a copy of the filename and convert it to lowercase */
+ strcpy (fnamecopy, filename);
+ downcase (fnamecopy);
+ if (*fnamecopy == '\0') {
+ if (!dols)
+ return -1;
+ dols = LS_ROOT;
+ } else if ((idx = dirdelim (fnamecopy)) >= 0) {
+ isdir = 1;
+ fnamecopy[idx] = '\0';
+ subname = fnamecopy + idx + 1;
+ /* Handle multiple delimiters */
+ while (ISDIRDELIM (*subname))
+ subname++;
+ } else if (dols) {
+ isdir = 1;
+ }
+
+ while (1) {
+ int i;
+
+ if (disk_read (cursect, 1, block) < 0) {
+ FAT_DPRINT ("Error: reading rootdir block\n");
+ return -1;
+ }
+ dentptr = (dir_entry *) block;
+ for (i = 0; i < DIRENTSPERBLOCK; i++) {
+ char s_name[14], l_name[256];
+
+ l_name[0] = '\0';
+ if ((dentptr->attr & ATTR_VOLUME)) {
+#ifdef CONFIG_SUPPORT_VFAT
+ if ((dentptr->attr & ATTR_VFAT) &&
+ (dentptr->name[0] & 0x40)) {
+ prevcksum = ((dir_slot *) dentptr)->alias_checksum;
+ get_vfatname (mydata, 0, block, dentptr, l_name);
+ if (dols == LS_ROOT) {
+ int isdir = (dentptr->attr & ATTR_DIR);
+ char dirc;
+ int doit = 0;
+
+ if (isdir) {
+ dirs++;
+ dirc = '/';
+ doit = 1;
+ } else {
+ dirc = ' ';
+ if (l_name[0] != 0) {
+ files++;
+ doit = 1;
+ }
+ }
+ if (doit) {
+ if (dirc == ' ') {
+ printf (" %8ld %s%c\n",
+ (long) FAT2CPU32 (dentptr->size),
+ l_name, dirc);
+ } else {
+ printf (" %s%c\n", l_name, dirc);
+ }
+ }
+ dentptr++;
+ continue;
+ }
+ FAT_DPRINT ("Rootvfatname: |%s|\n", l_name);
+ } else
+#endif
+ {
+ /* Volume label or VFAT entry */
+ dentptr++;
+ continue;
+ }
+ } else if (dentptr->name[0] == 0) {
+ FAT_DPRINT ("RootDentname == NULL - %d\n", i);
+ if (dols == LS_ROOT) {
+ printf ("\n%d file(s), %d dir(s)\n\n", files, dirs);
+ return 0;
+ }
+ return -1;
+ }
+#ifdef CONFIG_SUPPORT_VFAT
+ else if (dols == LS_ROOT
+ && mkcksum (dentptr->name) == prevcksum) {
+ dentptr++;
+ continue;
+ }
+#endif
+ get_name (dentptr, s_name);
+ if (dols == LS_ROOT) {
+ int isdir = (dentptr->attr & ATTR_DIR);
+ char dirc;
+ int doit = 0;
+
+ if (isdir) {
+ dirs++;
+ dirc = '/';
+ doit = 1;
+ } else {
+ dirc = ' ';
+ if (s_name[0] != 0) {
+ files++;
+ doit = 1;
+ }
+ }
+ if (doit) {
+ if (dirc == ' ') {
+ printf (" %8ld %s%c\n",
+ (long) FAT2CPU32 (dentptr->size), s_name,
+ dirc);
+ } else {
+ printf (" %s%c\n", s_name, dirc);
+ }
+ }
+ dentptr++;
+ continue;
+ }
+ if (strcmp (fnamecopy, s_name) && strcmp (fnamecopy, l_name)) {
+ FAT_DPRINT ("RootMismatch: |%s|%s|\n", s_name, l_name);
+ dentptr++;
+ continue;
+ }
+ if (isdir && !(dentptr->attr & ATTR_DIR))
+ return -1;
+
+ FAT_DPRINT ("RootName: %s", s_name);
+ FAT_DPRINT (", start: 0x%x", START (dentptr));
+ FAT_DPRINT (", size: 0x%x %s\n",
+ FAT2CPU32 (dentptr->size), isdir ? "(DIR)" : "");
+
+ goto rootdir_done; /* We got a match */
+ }
+ cursect++;
+ }
+ rootdir_done:
+
+ firsttime = 1;
+ while (isdir) {
+ int startsect = mydata->data_begin
+ + START (dentptr) * mydata->clust_size;
+ dir_entry dent;
+ char *nextname = NULL;
+
+ dent = *dentptr;
+ dentptr = &dent;
+
+ idx = dirdelim (subname);
+ if (idx >= 0) {
+ subname[idx] = '\0';
+ nextname = subname + idx + 1;
+ /* Handle multiple delimiters */
+ while (ISDIRDELIM (*nextname))
+ nextname++;
+ if (dols && *nextname == '\0')
+ firsttime = 0;
+ } else {
+ if (dols && firsttime) {
+ firsttime = 0;
+ } else {
+ isdir = 0;
+ }
+ }
+
+ if (get_dentfromdir (mydata, startsect, subname, dentptr,
+ isdir ? 0 : dols) == NULL) {
+ if (dols && !isdir)
+ return 0;
+ return -1;
+ }
+
+ if (idx >= 0) {
+ if (!(dentptr->attr & ATTR_DIR))
+ return -1;
+ subname = nextname;
+ }
+ }
+ ret = get_contents (mydata, dentptr, buffer, maxsize);
+ FAT_DPRINT ("Size: %d, got: %ld\n", FAT2CPU32 (dentptr->size), ret);
+
+ return ret;
+}
+
+
+int
+file_fat_detectfs(void)
+{
+ boot_sector bs;
+ volume_info volinfo;
+ int fatsize;
+
+ return read_bootsectandvi(&bs, &volinfo, &fatsize);
+}
+
+
+int
+file_fat_ls(const char *dir)
+{
+ return do_fat_read(dir, NULL, 0, LS_YES);
+}
+
+
+long
+file_fat_read(const char *filename, void *buffer, unsigned long maxsize)
+{
+ return do_fat_read(filename, buffer, maxsize, LS_NO);
+}
+
+#endif /* #if (CONFIG_COMMANDS & CFG_CMD_FAT) */
diff --git a/fs/fat/file.c b/fs/fat/file.c
new file mode 100644
index 0000000000..d375ba2eb0
--- /dev/null
+++ b/fs/fat/file.c
@@ -0,0 +1,208 @@
+/*
+ * file.c
+ *
+ * Mini "VFS" by Marcus Sundberg
+ *
+ * 2002-07-28 - rjones@nexus-tech.net - ported to ppcboot v1.1.6
+ * 2003-03-10 - kharris@nexus-tech.net - ported to uboot
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <malloc.h>
+#include <fat.h>
+#include <linux/stat.h>
+#include <linux/time.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_FAT)
+
+/* Supported filesystems */
+static const struct filesystem filesystems[] = {
+ { file_fat_detectfs, file_fat_ls, file_fat_read, "FAT" },
+};
+#define NUM_FILESYS (sizeof(filesystems)/sizeof(struct filesystem))
+
+/* The filesystem which was last detected */
+static int current_filesystem = FSTYPE_NONE;
+
+/* The current working directory */
+#define CWD_LEN 511
+char file_cwd[CWD_LEN+1] = "/";
+
+const char *
+file_getfsname(int idx)
+{
+ if (idx < 0 || idx >= NUM_FILESYS) return NULL;
+
+ return filesystems[idx].name;
+}
+
+
+static void
+pathcpy(char *dest, const char *src)
+{
+ char *origdest = dest;
+
+ do {
+ if (dest-file_cwd >= CWD_LEN) {
+ *dest = '\0';
+ return;
+ }
+ *(dest) = *(src);
+ if (*src == '\0') {
+ if (dest-- != origdest && ISDIRDELIM(*dest)) {
+ *dest = '\0';
+ }
+ return;
+ }
+ ++dest;
+ if (ISDIRDELIM(*src)) {
+ while (ISDIRDELIM(*src)) src++;
+ } else {
+ src++;
+ }
+ } while (1);
+}
+
+
+int
+file_cd(const char *path)
+{
+ if (ISDIRDELIM(*path)) {
+ while (ISDIRDELIM(*path)) path++;
+ strncpy(file_cwd+1, path, CWD_LEN-1);
+ } else {
+ const char *origpath = path;
+ char *tmpstr = file_cwd;
+ int back = 0;
+
+ while (*tmpstr != '\0') tmpstr++;
+ do {
+ tmpstr--;
+ } while (ISDIRDELIM(*tmpstr));
+
+ while (*path == '.') {
+ path++;
+ while (*path == '.') {
+ path++;
+ back++;
+ }
+ if (*path != '\0' && !ISDIRDELIM(*path)) {
+ path = origpath;
+ back = 0;
+ break;
+ }
+ while (ISDIRDELIM(*path)) path++;
+ origpath = path;
+ }
+
+ while (back--) {
+ /* Strip off path component */
+ while (!ISDIRDELIM(*tmpstr)) {
+ tmpstr--;
+ }
+ if (tmpstr == file_cwd) {
+ /* Incremented again right after the loop. */
+ tmpstr--;
+ break;
+ }
+ /* Skip delimiters */
+ while (ISDIRDELIM(*tmpstr)) tmpstr--;
+ }
+ tmpstr++;
+ if (*path == '\0') {
+ if (tmpstr == file_cwd) {
+ *tmpstr = '/';
+ tmpstr++;
+ }
+ *tmpstr = '\0';
+ return 0;
+ }
+ *tmpstr = '/';
+ pathcpy(tmpstr+1, path);
+ }
+
+ return 0;
+}
+
+
+int
+file_detectfs(void)
+{
+ int i;
+
+ current_filesystem = FSTYPE_NONE;
+
+ for (i = 0; i < NUM_FILESYS; i++) {
+ if (filesystems[i].detect() == 0) {
+ strcpy(file_cwd, "/");
+ current_filesystem = i;
+ break;
+ }
+ }
+
+ return current_filesystem;
+}
+
+
+int
+file_ls(const char *dir)
+{
+ char fullpath[1024];
+ const char *arg;
+
+ if (current_filesystem == FSTYPE_NONE) {
+ printf("Can't list files without a filesystem!\n");
+ return -1;
+ }
+
+ if (ISDIRDELIM(*dir)) {
+ arg = dir;
+ } else {
+ sprintf(fullpath, "%s/%s", file_cwd, dir);
+ arg = fullpath;
+ }
+ return filesystems[current_filesystem].ls(arg);
+}
+
+
+long
+file_read(const char *filename, void *buffer, unsigned long maxsize)
+{
+ char fullpath[1024];
+ const char *arg;
+
+ if (current_filesystem == FSTYPE_NONE) {
+ printf("Can't load file without a filesystem!\n");
+ return -1;
+ }
+
+ if (ISDIRDELIM(*filename)) {
+ arg = filename;
+ } else {
+ sprintf(fullpath, "%s/%s", file_cwd, filename);
+ arg = fullpath;
+ }
+
+ return filesystems[current_filesystem].read(arg, buffer, maxsize);
+}
+
+#endif /* #if (CONFIG_COMMANDS & CFG_CMD_FAT) */
diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h
new file mode 100644
index 0000000000..4d61adeaf6
--- /dev/null
+++ b/include/asm-arm/arch-pxa/mmc.h
@@ -0,0 +1,200 @@
+/*
+ * linux/drivers/mmc/mmc_pxa.h
+ *
+ * Author: Vladimir Shebordaev, Igor Oblakov
+ * Copyright: MontaVista Software Inc.
+ *
+ * $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __MMC_PXA_P_H__
+#define __MMC_PXA_P_H__
+
+/* PXA-250 MMC controller registers */
+
+/* MMC_STRPCL */
+#define MMC_STRPCL_STOP_CLK (0x0001UL)
+#define MMC_STRPCL_START_CLK (0x0002UL)
+
+/* MMC_STAT */
+#define MMC_STAT_END_CMD_RES (0x0001UL << 13)
+#define MMC_STAT_PRG_DONE (0x0001UL << 12)
+#define MMC_STAT_DATA_TRAN_DONE (0x0001UL << 11)
+#define MMC_STAT_CLK_EN (0x0001UL << 8)
+#define MMC_STAT_RECV_FIFO_FULL (0x0001UL << 7)
+#define MMC_STAT_XMIT_FIFO_EMPTY (0x0001UL << 6)
+#define MMC_STAT_RES_CRC_ERROR (0x0001UL << 5)
+#define MMC_STAT_SPI_READ_ERROR_TOKEN (0x0001UL << 4)
+#define MMC_STAT_CRC_READ_ERROR (0x0001UL << 3)
+#define MMC_STAT_CRC_WRITE_ERROR (0x0001UL << 2)
+#define MMC_STAT_TIME_OUT_RESPONSE (0x0001UL << 1)
+#define MMC_STAT_READ_TIME_OUT (0x0001UL)
+
+#define MMC_STAT_ERRORS (MMC_STAT_RES_CRC_ERROR|MMC_STAT_SPI_READ_ERROR_TOKEN\
+ |MMC_STAT_CRC_READ_ERROR|MMC_STAT_TIME_OUT_RESPONSE\
+ |MMC_STAT_READ_TIME_OUT|MMC_STAT_CRC_WRITE_ERROR)
+
+/* MMC_CLKRT */
+#define MMC_CLKRT_20MHZ (0x0000UL)
+#define MMC_CLKRT_10MHZ (0x0001UL)
+#define MMC_CLKRT_5MHZ (0x0002UL)
+#define MMC_CLKRT_2_5MHZ (0x0003UL)
+#define MMC_CLKRT_1_25MHZ (0x0004UL)
+#define MMC_CLKRT_0_625MHZ (0x0005UL)
+#define MMC_CLKRT_0_3125MHZ (0x0006UL)
+
+/* MMC_SPI */
+#define MMC_SPI_DISABLE (0x00UL)
+#define MMC_SPI_EN (0x01UL)
+#define MMC_SPI_CS_EN (0x01UL << 2)
+#define MMC_SPI_CS_ADDRESS (0x01UL << 3)
+#define MMC_SPI_CRC_ON (0x01UL << 1)
+
+/* MMC_CMDAT */
+#define MMC_CMDAT_MMC_DMA_EN (0x0001UL << 7)
+#define MMC_CMDAT_INIT (0x0001UL << 6)
+#define MMC_CMDAT_BUSY (0x0001UL << 5)
+#define MMC_CMDAT_STREAM (0x0001UL << 4)
+#define MMC_CMDAT_BLOCK (0x0000UL << 4)
+#define MMC_CMDAT_WRITE (0x0001UL << 3)
+#define MMC_CMDAT_READ (0x0000UL << 3)
+#define MMC_CMDAT_DATA_EN (0x0001UL << 2)
+#define MMC_CMDAT_R1 (0x0001UL)
+#define MMC_CMDAT_R2 (0x0002UL)
+#define MMC_CMDAT_R3 (0x0003UL)
+
+/* MMC_RESTO */
+#define MMC_RES_TO_MAX (0x007fUL) /* [6:0] */
+
+/* MMC_RDTO */
+#define MMC_READ_TO_MAX (0x0ffffUL) /* [15:0] */
+
+/* MMC_BLKLEN */
+#define MMC_BLK_LEN_MAX (0x03ffUL) /* [9:0] */
+
+/* MMC_PRTBUF */
+#define MMC_PRTBUF_BUF_PART_FULL (0x01UL)
+#define MMC_PRTBUF_BUF_FULL (0x00UL )
+
+/* MMC_I_MASK */
+#define MMC_I_MASK_TXFIFO_WR_REQ (0x01UL << 6)
+#define MMC_I_MASK_RXFIFO_RD_REQ (0x01UL << 5)
+#define MMC_I_MASK_CLK_IS_OFF (0x01UL << 4)
+#define MMC_I_MASK_STOP_CMD (0x01UL << 3)
+#define MMC_I_MASK_END_CMD_RES (0x01UL << 2)
+#define MMC_I_MASK_PRG_DONE (0x01UL << 1)
+#define MMC_I_MASK_DATA_TRAN_DONE (0x01UL)
+#define MMC_I_MASK_ALL (0x07fUL)
+
+
+/* MMC_I_REG */
+#define MMC_I_REG_TXFIFO_WR_REQ (0x01UL << 6)
+#define MMC_I_REG_RXFIFO_RD_REQ (0x01UL << 5)
+#define MMC_I_REG_CLK_IS_OFF (0x01UL << 4)
+#define MMC_I_REG_STOP_CMD (0x01UL << 3)
+#define MMC_I_REG_END_CMD_RES (0x01UL << 2)
+#define MMC_I_REG_PRG_DONE (0x01UL << 1)
+#define MMC_I_REG_DATA_TRAN_DONE (0x01UL)
+#define MMC_I_REG_ALL (0x007fUL)
+
+/* MMC_CMD */
+#define MMC_CMD_INDEX_MAX (0x006fUL) /* [5:0] */
+#define CMD(x) (x)
+
+#define MMC_DEFAULT_RCA 1
+
+#define MMC_BLOCK_SIZE 512
+#define MMC_CMD_RESET 0
+#define MMC_CMD_SEND_OP_COND 1
+#define MMC_CMD_ALL_SEND_CID 2
+#define MMC_CMD_SET_RCA 3
+#define MMC_CMD_SEND_CSD 9
+#define MMC_CMD_SEND_CID 10
+#define MMC_CMD_SEND_STATUS 13
+#define MMC_CMD_SET_BLOCKLEN 16
+#define MMC_CMD_READ_BLOCK 17
+#define MMC_CMD_RD_BLK_MULTI 18
+#define MMC_CMD_WRITE_BLOCK 24
+
+#define MMC_MAX_BLOCK_SIZE 512
+
+#define MMC_R1_IDLE_STATE 0x01
+#define MMC_R1_ERASE_STATE 0x02
+#define MMC_R1_ILLEGAL_CMD 0x04
+#define MMC_R1_COM_CRC_ERR 0x08
+#define MMC_R1_ERASE_SEQ_ERR 0x01
+#define MMC_R1_ADDR_ERR 0x02
+#define MMC_R1_PARAM_ERR 0x04
+
+#define MMC_R1B_WP_ERASE_SKIP 0x0002
+#define MMC_R1B_ERR 0x0004
+#define MMC_R1B_CC_ERR 0x0008
+#define MMC_R1B_CARD_ECC_ERR 0x0010
+#define MMC_R1B_WP_VIOLATION 0x0020
+#define MMC_R1B_ERASE_PARAM 0x0040
+#define MMC_R1B_OOR 0x0080
+#define MMC_R1B_IDLE_STATE 0x0100
+#define MMC_R1B_ERASE_RESET 0x0200
+#define MMC_R1B_ILLEGAL_CMD 0x0400
+#define MMC_R1B_COM_CRC_ERR 0x0800
+#define MMC_R1B_ERASE_SEQ_ERR 0x1000
+#define MMC_R1B_ADDR_ERR 0x2000
+#define MMC_R1B_PARAM_ERR 0x4000
+
+typedef struct mmc_cid
+{
+/* FIXME: BYTE_ORDER */
+ uchar year:4,
+ month:4;
+ uchar sn[3];
+ uchar fwrev:4,
+ hwrev:4;
+ uchar name[6];
+ uchar id[3];
+} mmc_cid_t;
+
+typedef struct mmc_csd
+{
+ uchar ecc:2,
+ file_format:2,
+ tmp_write_protect:1,
+ perm_write_protect:1,
+ copy:1,
+ file_format_grp:1;
+ uint64_t content_prot_app:1,
+ rsvd3:4,
+ write_bl_partial:1,
+ write_bl_len:4,
+ r2w_factor:3,
+ default_ecc:2,
+ wp_grp_enable:1,
+ wp_grp_size:5,
+ erase_grp_mult:5,
+ erase_grp_size:5,
+ c_size_mult1:3,
+ vdd_w_curr_max:3,
+ vdd_w_curr_min:3,
+ vdd_r_curr_max:3,
+ vdd_r_curr_min:3,
+ c_size:12,
+ rsvd2:2,
+ dsr_imp:1,
+ read_blk_misalign:1,
+ write_blk_misalign:1,
+ read_bl_partial:1;
+
+ ushort read_bl_len:4,
+ ccc:12;
+ uchar tran_speed;
+ uchar nsac;
+ uchar taac;
+ uchar rsvd1:2,
+ spec_vers:4,
+ csd_structure:2;
+} mmc_csd_t;
+
+
+#endif /* __MMC_PXA_P_H__ */
diff --git a/include/asm-arm/errno.h b/include/asm-arm/errno.h
new file mode 100644
index 0000000000..134a8fc99c
--- /dev/null
+++ b/include/asm-arm/errno.h
@@ -0,0 +1,138 @@
+#ifndef _ARM_ERRNO_H
+#define _ARM_ERRNO_H
+
+#define EPERM 1 /* Operation not permitted */
+#define ENOENT 2 /* No such file or directory */
+#define ESRCH 3 /* No such process */
+#define EINTR 4 /* Interrupted system call */
+#define EIO 5 /* I/O error */
+#define ENXIO 6 /* No such device or address */
+#define E2BIG 7 /* Arg list too long */
+#define ENOEXEC 8 /* Exec format error */
+#define EBADF 9 /* Bad file number */
+#define ECHILD 10 /* No child processes */
+#define EAGAIN 11 /* Try again */
+#define ENOMEM 12 /* Out of memory */
+#define EACCES 13 /* Permission denied */
+#define EFAULT 14 /* Bad address */
+#define ENOTBLK 15 /* Block device required */
+#define EBUSY 16 /* Device or resource busy */
+#define EEXIST 17 /* File exists */
+#define EXDEV 18 /* Cross-device link */
+#define ENODEV 19 /* No such device */
+#define ENOTDIR 20 /* Not a directory */
+#define EISDIR 21 /* Is a directory */
+#define EINVAL 22 /* Invalid argument */
+#define ENFILE 23 /* File table overflow */
+#define EMFILE 24 /* Too many open files */
+#define ENOTTY 25 /* Not a typewriter */
+#define ETXTBSY 26 /* Text file busy */
+#define EFBIG 27 /* File too large */
+#define ENOSPC 28 /* No space left on device */
+#define ESPIPE 29 /* Illegal seek */
+#define EROFS 30 /* Read-only file system */
+#define EMLINK 31 /* Too many links */
+#define EPIPE 32 /* Broken pipe */
+#define EDOM 33 /* Math argument out of domain of func */
+#define ERANGE 34 /* Math result not representable */
+#define EDEADLK 35 /* Resource deadlock would occur */
+#define ENAMETOOLONG 36 /* File name too long */
+#define ENOLCK 37 /* No record locks available */
+#define ENOSYS 38 /* Function not implemented */
+#define ENOTEMPTY 39 /* Directory not empty */
+#define ELOOP 40 /* Too many symbolic links encountered */
+#define EWOULDBLOCK EAGAIN /* Operation would block */
+#define ENOMSG 42 /* No message of desired type */
+#define EIDRM 43 /* Identifier removed */
+#define ECHRNG 44 /* Channel number out of range */
+#define EL2NSYNC 45 /* Level 2 not synchronized */
+#define EL3HLT 46 /* Level 3 halted */
+#define EL3RST 47 /* Level 3 reset */
+#define ELNRNG 48 /* Link number out of range */
+#define EUNATCH 49 /* Protocol driver not attached */
+#define ENOCSI 50 /* No CSI structure available */
+#define EL2HLT 51 /* Level 2 halted */
+#define EBADE 52 /* Invalid exchange */
+#define EBADR 53 /* Invalid request descriptor */
+#define EXFULL 54 /* Exchange full */
+#define ENOANO 55 /* No anode */
+#define EBADRQC 56 /* Invalid request code */
+#define EBADSLT 57 /* Invalid slot */
+#define EDEADLOCK 58 /* File locking deadlock error */
+#define EBFONT 59 /* Bad font file format */
+#define ENOSTR 60 /* Device not a stream */
+#define ENODATA 61 /* No data available */
+#define ETIME 62 /* Timer expired */
+#define ENOSR 63 /* Out of streams resources */
+#define ENONET 64 /* Machine is not on the network */
+#define ENOPKG 65 /* Package not installed */
+#define EREMOTE 66 /* Object is remote */
+#define ENOLINK 67 /* Link has been severed */
+#define EADV 68 /* Advertise error */
+#define ESRMNT 69 /* Srmount error */
+#define ECOMM 70 /* Communication error on send */
+#define EPROTO 71 /* Protocol error */
+#define EMULTIHOP 72 /* Multihop attempted */
+#define EDOTDOT 73 /* RFS specific error */
+#define EBADMSG 74 /* Not a data message */
+#define EOVERFLOW 75 /* Value too large for defined data type */
+#define ENOTUNIQ 76 /* Name not unique on network */
+#define EBADFD 77 /* File descriptor in bad state */
+#define EREMCHG 78 /* Remote address changed */
+#define ELIBACC 79 /* Can not access a needed shared library */
+#define ELIBBAD 80 /* Accessing a corrupted shared library */
+#define ELIBSCN 81 /* .lib section in a.out corrupted */
+#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
+#define ELIBEXEC 83 /* Cannot exec a shared library directly */
+#define EILSEQ 84 /* Illegal byte sequence */
+#define ERESTART 85 /* Interrupted system call should be restarted */
+#define ESTRPIPE 86 /* Streams pipe error */
+#define EUSERS 87 /* Too many users */
+#define ENOTSOCK 88 /* Socket operation on non-socket */
+#define EDESTADDRREQ 89 /* Destination address required */
+#define EMSGSIZE 90 /* Message too long */
+#define EPROTOTYPE 91 /* Protocol wrong type for socket */
+#define ENOPROTOOPT 92 /* Protocol not available */
+#define EPROTONOSUPPORT 93 /* Protocol not supported */
+#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
+#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
+#define EPFNOSUPPORT 96 /* Protocol family not supported */
+#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
+#define EADDRINUSE 98 /* Address already in use */
+#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
+#define ENETDOWN 100 /* Network is down */
+#define ENETUNREACH 101 /* Network is unreachable */
+#define ENETRESET 102 /* Network dropped connection because of reset */
+#define ECONNABORTED 103 /* Software caused connection abort */
+#define ECONNRESET 104 /* Connection reset by peer */
+#define ENOBUFS 105 /* No buffer space available */
+#define EISCONN 106 /* Transport endpoint is already connected */
+#define ENOTCONN 107 /* Transport endpoint is not connected */
+#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
+#define ETOOMANYREFS 109 /* Too many references: cannot splice */
+#define ETIMEDOUT 110 /* Connection timed out */
+#define ECONNREFUSED 111 /* Connection refused */
+#define EHOSTDOWN 112 /* Host is down */
+#define EHOSTUNREACH 113 /* No route to host */
+#define EALREADY 114 /* Operation already in progress */
+#define EINPROGRESS 115 /* Operation now in progress */
+#define ESTALE 116 /* Stale NFS file handle */
+#define EUCLEAN 117 /* Structure needs cleaning */
+#define ENOTNAM 118 /* Not a XENIX named type file */
+#define ENAVAIL 119 /* No XENIX semaphores available */
+#define EISNAM 120 /* Is a named type file */
+#define EREMOTEIO 121 /* Remote I/O error */
+#define EDQUOT 122 /* Quota exceeded */
+
+#define ENOMEDIUM 123 /* No medium found */
+#define EMEDIUMTYPE 124 /* Wrong medium type */
+
+/* Should never be seen by user programs */
+#define ERESTARTSYS 512
+#define ERESTARTNOINTR 513
+#define ERESTARTNOHAND 514 /* restart if no handler.. */
+#define ENOIOCTLCMD 515 /* No ioctl command */
+
+#define _LAST_ERRNO 515
+
+#endif
diff --git a/include/asm-arm/global_data.h b/include/asm-arm/global_data.h
index 892710df40..c804768d7a 100644
--- a/include/asm-arm/global_data.h
+++ b/include/asm-arm/global_data.h
@@ -41,8 +41,8 @@ typedef struct global_data {
unsigned long reloc_off; /* Relocation Offset */
unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid; /* Checksum of Environment valid? */
-#ifdef CONFIG_VFD
unsigned long fb_base; /* base address of frame buffer */
+#ifdef CONFIG_VFD
unsigned char vfd_type; /* display type */
#endif
#if 0
diff --git a/include/cmd_confdefs.h b/include/cmd_confdefs.h
index 7ab553d317..2d9b5a554d 100644
--- a/include/cmd_confdefs.h
+++ b/include/cmd_confdefs.h
@@ -82,6 +82,8 @@
#define CFG_CMD_BMP 0x0001000000000000 /* BMP support */
#define CFG_CMD_PORTIO 0x0002000000000000 /* Port I/O */
#define CFG_CMD_PING 0x0004000000000000 /* ping support */
+#define CFG_CMD_MMC 0x0008000000000000 /* MMC support */
+#define CFG_CMD_FAT 0x0010000000000000 /* FAT support */
#define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFF /* ALL commands */
@@ -102,6 +104,7 @@
CFG_CMD_EEPROM | \
CFG_CMD_ELF | \
CFG_CMD_FDC | \
+ CFG_CMD_FAT | \
CFG_CMD_FDOS | \
CFG_CMD_HWFLOW | \
CFG_CMD_I2C | \
@@ -111,6 +114,7 @@
CFG_CMD_JFFS2 | \
CFG_CMD_KGDB | \
CFG_CMD_MII | \
+ CFG_CMD_MMC | \
CFG_CMD_NAND | \
CFG_CMD_PCI | \
CFG_CMD_PCMCIA | \
diff --git a/include/cmd_fat.h b/include/cmd_fat.h
new file mode 100644
index 0000000000..12245bd411
--- /dev/null
+++ b/include/cmd_fat.h
@@ -0,0 +1,61 @@
+/*
+ * (C) Copyright 2002
+ * Richard Jones, rjones@nexus-tech.net
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * FAT support
+ */
+#ifndef _CMD_FAT_H
+#define _CMD_FAT_H
+
+#if (CONFIG_COMMANDS & CFG_CMD_FAT)
+
+int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_fat_fsinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_fat_ls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_fat_dump (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+#define CMD_TBL_FAT MK_CMD_TBL_ENTRY( \
+ "fatload", 5, 4, 0, do_fat_fsload, \
+ "fatload - load binary file from a dos filesystem\n", \
+ "[ off ] [ filename ]\n" \
+ " - load binary file from dos filesystem\n" \
+ " with offset 'off'\n" \
+), \
+ MK_CMD_TBL_ENTRY( \
+ "fatinfo", 5, 1, 1, do_fat_fsinfo, \
+ "fatinfo - print information about filesystem\n", \
+ "\n" \
+ " - print information about filesystem\n" \
+), \
+ MK_CMD_TBL_ENTRY( \
+ "fatls", 2, 2, 1, do_fat_ls, \
+ "fatls - list files in a directory (default /)\n", \
+ "[ directory ]\n" \
+ " - list files in a directory.\n" \
+),
+
+#else
+#define CMD_TBL_FAT
+#endif /* CFG_CMD_FAT */
+
+#endif /* _CMD_FAT_H */
diff --git a/include/cmd_mmc.h b/include/cmd_mmc.h
new file mode 100644
index 0000000000..ff5a176fed
--- /dev/null
+++ b/include/cmd_mmc.h
@@ -0,0 +1,41 @@
+/*
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _CMD_MMC_H_
+#define _CMD_MMC_H_
+
+#include <command.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_MMC)
+
+#define CMD_TBL_MMC MK_CMD_TBL_ENTRY( \
+ "mmcinit", 4, 1, 0, do_mmc, \
+ "mmcinit - init mmc card\n", \
+),
+#else
+
+#define CMD_TBL_MMC
+
+#endif
+
+int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+#endif /* _CMD_MMC_H_ */
diff --git a/include/common.h b/include/common.h
index 0a252c53fc..d312682cff 100644
--- a/include/common.h
+++ b/include/common.h
@@ -73,10 +73,21 @@ typedef void (interrupt_handler_t)(void *);
#include <asm/u-boot.h> /* boot information for Linux kernel */
#include <asm/global_data.h> /* global data used for startup functions */
-/* enable common handling for all TQM8xxL boards */
+/*
+ * enable common handling for all TQM8xxL/M boards:
+ * - CONFIG_TQM8xxM will be defined for all TQM8xxM boards
+ * - CONFIG_TQM8xxL will be defined for all TQM8xxL _and_ TQM8xxM boards
+ */
+#if defined(CONFIG_TQM823M) || defined(CONFIG_TQM850M) || \
+ defined(CONFIG_TQM855M) || defined(CONFIG_TQM860M) || \
+ defined(CONFIG_TQM862M)
+# ifndef CONFIG_TQM8xxM
+# define CONFIG_TQM8xxM
+# endif
+#endif
#if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L) || \
defined(CONFIG_TQM855L) || defined(CONFIG_TQM860L) || \
- defined(CONFIG_TQM862L)
+ defined(CONFIG_TQM862L) || defined(CONFIG_TQM8xxM)
# ifndef CONFIG_TQM8xxL
# define CONFIG_TQM8xxL
# endif
@@ -237,6 +248,7 @@ void load_sernum_ethaddr (void);
/* $(BOARD)/$(BOARD).c */
int board_pre_init (void);
+int board_post_init (void);
int board_postclk_init (void); /* after clocks/timebase, before env/serial */
void board_poweroff (void);
diff --git a/include/commproc.h b/include/commproc.h
index 2d9ab5cdb3..f0ee1792b2 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -1331,15 +1331,13 @@ typedef struct scc_enet {
#endif /* CONFIG_SXNI855T */
-/*** MVS1, TQM823L, TQM850L, ETX094, R360MPI ***********************/
+/*** MVS1, TQM823L/M, TQM850L/M, ETX094, R360MPI *******************/
#if (defined(CONFIG_MVS) && CONFIG_MVS < 2) || \
- defined(CONFIG_R360MPI) || \
- defined(CONFIG_RBC823) || \
- defined(CONFIG_TQM823L) || \
- defined(CONFIG_TQM850L) || \
- defined(CONFIG_ETX094) || \
- defined(CONFIG_RRVISION)|| \
+ defined(CONFIG_R360MPI) || defined(CONFIG_RBC823) || \
+ defined(CONFIG_TQM823L) || defined(CONFIG_TQM823M) || \
+ defined(CONFIG_TQM850L) || defined(CONFIG_TQM850M) || \
+ defined(CONFIG_ETX094) || defined(CONFIG_RRVISION)|| \
(defined(CONFIG_LANTEC) && CONFIG_LANTEC < 2)
/* Bits in parallel I/O port registers that have to be set/cleared
* to configure the pins for SCC2 use.
@@ -1365,13 +1363,13 @@ typedef struct scc_enet {
*/
#define SICR_ENET_MASK ((uint)0x0000ff00)
#define SICR_ENET_CLKRT ((uint)0x00002600)
-#endif /* CONFIG_MVS v1, CONFIG_TQM823L, CONFIG_TQM850L, etc. */
+#endif /* CONFIG_MVS v1, CONFIG_TQM823L/M, CONFIG_TQM850L/M, etc. */
-/*** TQM855L, TQM860L, TQM862L **************************************/
+/*** TQM855L/M, TQM860L/M, TQM862L/M ********************************/
-#if defined(CONFIG_TQM855L) || \
- defined(CONFIG_TQM860L) || \
- defined(CONFIG_TQM862L)
+#if defined(CONFIG_TQM855L) || defined(CONFIG_TQM855M) || \
+ defined(CONFIG_TQM860L) || defined(CONFIG_TQM860M) || \
+ defined(CONFIG_TQM862L) || defined(CONFIG_TQM862M)
# ifdef CONFIG_SCC1_ENET /* use SCC for 10Mbps Ethernet */
@@ -1419,7 +1417,7 @@ typedef struct scc_enet {
#define PD_MII_MASK ((ushort)0x1FFF) /* PD 3...15 */
# endif /* CONFIG_FEC_ENET */
-#endif /* CONFIG_TQM855L, TQM860L, TQM862L */
+#endif /* CONFIG_TQM855L/M, TQM860L/M, TQM862L/M */
/*** V37 **********************************************************/
diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h
index 81e2079113..56ecf0c8bf 100644
--- a/include/configs/LANTEC.h
+++ b/include/configs/LANTEC.h
@@ -99,6 +99,7 @@
& ~CFG_CMD_JFFS2 \
& ~CFG_CMD_KGDB \
& ~CFG_CMD_MII \
+ & ~CFG_CMD_MMC \
& ~CFG_CMD_NAND \
& ~CFG_CMD_PCI \
& ~CFG_CMD_PCMCIA \
diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h
index 1849bcc1ec..30b72076ea 100644
--- a/include/configs/MPC8260ADS.h
+++ b/include/configs/MPC8260ADS.h
@@ -129,6 +129,7 @@
CFG_CMD_KGDB | \
CFG_CMD_NAND | \
CFG_CMD_MII | \
+ CFG_CMD_MMC | \
CFG_CMD_PCI | \
CFG_CMD_PCMCIA | \
CFG_CMD_SCSI | \
diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h
index 414d515b7a..9e8d732e2b 100644
--- a/include/configs/MPC8266ADS.h
+++ b/include/configs/MPC8266ADS.h
@@ -161,6 +161,7 @@
CFG_CMD_IDE | \
CFG_CMD_JFFS2 | \
CFG_CMD_KGDB | \
+ CFG_CMD_MMC | \
CFG_CMD_NAND | \
CFG_CMD_PCMCIA | \
CFG_CMD_SCSI | \
diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h
index 08eed276c2..af6e98b1f0 100644
--- a/include/configs/RBC823.h
+++ b/include/configs/RBC823.h
@@ -113,6 +113,7 @@
~CFG_CMD_JFFS2 & \
~CFG_CMD_DTT & \
~CFG_CMD_MII & \
+ ~CFG_CMD_MMC & \
/*~CFG_CMD_NET &*/ \
/*~CFG_CMD_ELF &*/ \
/* ~CFG_CMD_EEPROM & */ \
diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h
index 1d0aea1fec..76e66cac1c 100644
--- a/include/configs/TQM862L.h
+++ b/include/configs/TQM862L.h
@@ -179,6 +179,7 @@
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
#define CFG_ENV_IS_IN_FLASH 1
+
#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
@@ -335,7 +336,7 @@
*/
#define FLASH_BASE0_PRELIM 0x40000000 /* FLASH bank #0 */
-#define FLASH_BASE1_PRELIM 0x60000000 /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0x60000000 /* FLASH bank #1 */
/* used to re-map FLASH both when starting from SRAM or FLASH:
* restrict access enough to keep SRAM working (if any)
@@ -349,10 +350,8 @@
*/
#if defined(CONFIG_100MHz)
/* 100 MHz CPU - 50 MHz bus:
- * 0x...926: 9 = OR_CSNT_SAM + OR_BI; 2 = OR_SCY_2_CLK; 6 = OR_TRLX + OR_EHTR
- * ACS = 00, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 1 */
-#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
- OR_SCY_2_CLK | OR_EHTR | OR_BI)
+ * ACS = 01, TRLX = 0, CSNT = 0, SCY = 7, EHTR = 0 */
+#define CFG_OR_TIMING_FLASH (OR_ACS_DIV4 | OR_SCY_7_CLK | OR_BI)
#elif defined(CONFIG_80MHz)
/* 80 MHz CPU - 40 MHz bus:
* ACS = 00, TRLX = 0, CSNT = 1, SCY = 3, EHTR = 1 */
diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h
new file mode 100644
index 0000000000..1da9a45cf2
--- /dev/null
+++ b/include/configs/TQM862M.h
@@ -0,0 +1,484 @@
+/*
+ * (C) Copyright 2000, 2001, 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC860 1
+#define CONFIG_MPC860T 1
+#define CONFIG_MPC862 1
+
+#define CONFIG_TQM862M 1 /* ...on a TQM8xxM module */
+
+#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
+#undef CONFIG_8xx_CONS_SMC2
+#undef CONFIG_8xx_CONS_NONE
+
+#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */
+
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
+
+#define CONFIG_BOARD_TYPES 1 /* support board types */
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$(serverip):$(rootpath)\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs $(bootargs) " \
+ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
+ ":$(hostname):$(netdev):off panic=1\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm $(kernel_addr)\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm $(kernel_addr) $(ramdisk_addr)\0" \
+ "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
+ "rootpath=/opt/eldk/ppc_8xx\0" \
+ "bootfile=/tftpboot/TQM862M/uImage\0" \
+ "kernel_addr=40080000\0" \
+ "ramdisk_addr=40180000\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+
+#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
+
+#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+
+#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_IDE | \
+ CFG_CMD_DATE )
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#if 0
+#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
+#endif
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+/*-----------------------------------------------------------------------
+ * Internal Memory Mapped Register
+ */
+#define CFG_IMMR 0xFFF00000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR CFG_IMMR
+#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_FLASH_BASE 0x40000000
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_ENV_IS_IN_FLASH 1
+
+#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
+#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
+#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*-----------------------------------------------------------------------
+ * Hardware Information Block
+ */
+#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
+#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
+#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
+#endif
+
+/*-----------------------------------------------------------------------
+ * SYPCR - System Protection Control 11-9
+ * SYPCR can only be written once after reset!
+ *-----------------------------------------------------------------------
+ * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
+ */
+#if defined(CONFIG_WATCHDOG)
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
+ SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
+#else
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
+#endif
+
+/*-----------------------------------------------------------------------
+ * SIUMCR - SIU Module Configuration 11-6
+ *-----------------------------------------------------------------------
+ * PCMCIA config., multi-function pin tri-state
+ */
+#ifndef CONFIG_CAN_DRIVER
+#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+#else /* we must activate GPL5 in the SIUMCR for CAN */
+#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+#endif /* CONFIG_CAN_DRIVER */
+
+/*-----------------------------------------------------------------------
+ * TBSCR - Time Base Status and Control 11-26
+ *-----------------------------------------------------------------------
+ * Clear Reference Interrupt Status, Timebase freezing enabled
+ */
+#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
+
+/*-----------------------------------------------------------------------
+ * RTCSC - Real-Time Clock Status and Control Register 11-27
+ *-----------------------------------------------------------------------
+ */
+#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
+
+/*-----------------------------------------------------------------------
+ * PISCR - Periodic Interrupt Status and Control 11-31
+ *-----------------------------------------------------------------------
+ * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
+ */
+#define CFG_PISCR (PISCR_PS | PISCR_PITF)
+
+/*-----------------------------------------------------------------------
+ * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30
+ *-----------------------------------------------------------------------
+ * Reset PLL lock status sticky bit, timer expired status bit and timer
+ * interrupt status bit
+ *
+ * If this is a 80 MHz or 100 MHz CPU,
+ * set PLL multiplication factor to 5 (5 * 16 = 80, 5 * 20 = 100)
+ */
+#if defined(CONFIG_80MHz) || defined(CONFIG_100MHz)
+#define CFG_PLPRCR \
+ ( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
+#else /* up to 50 MHz we use a 1:1 clock */
+#define CFG_PLPRCR (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
+#endif /* CONFIG_80MHz | CONFIG_100MHz */
+
+/*-----------------------------------------------------------------------
+ * SCCR - System Clock and reset Control Register 15-27
+ *-----------------------------------------------------------------------
+ * Set clock output, timebase and RTC source and divider,
+ * power management and some other internal clocks
+ */
+#define SCCR_MASK SCCR_EBDF11
+#if defined(CONFIG_80MHz) || defined(CONFIG_100MHz) /* use 16/20 MHz * 5 */
+#define CFG_SCCR (/* SCCR_TBS | */ \
+ SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
+ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
+ SCCR_DFALCD00)
+#else /* up to 50 MHz we use a 1:1 clock */
+#define CFG_SCCR (SCCR_TBS | \
+ SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
+ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
+ SCCR_DFALCD00)
+#endif /* CONFIG_80MHz | CONFIG_100MHz */
+
+/*-----------------------------------------------------------------------
+ * PCMCIA stuff
+ *-----------------------------------------------------------------------
+ *
+ */
+#define CFG_PCMCIA_MEM_ADDR (0xE0000000)
+#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_DMA_ADDR (0xE4000000)
+#define CFG_PCMCIA_DMA_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_ATTRB_ADDR (0xE8000000)
+#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_IO_ADDR (0xEC000000)
+#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
+ *-----------------------------------------------------------------------
+ */
+
+#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+#undef CONFIG_IDE_RESET /* reset for ide not supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (2 * CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET 0x0100
+
+/*-----------------------------------------------------------------------
+ *
+ *-----------------------------------------------------------------------
+ *
+ */
+#define CFG_DER 0
+
+/*
+ * Init Memory Controller:
+ *
+ * BR0/1 and OR0/1 (FLASH)
+ */
+
+#define FLASH_BASE0_PRELIM 0x40000000 /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0x60000000 /* FLASH bank #1 */
+
+/* used to re-map FLASH both when starting from SRAM or FLASH:
+ * restrict access enough to keep SRAM working (if any)
+ * but not too much to meddle with FLASH accesses
+ */
+#define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */
+#define CFG_PRELIM_OR_AM 0xE0000000 /* OR addr mask */
+
+/*
+ * FLASH timing:
+ */
+#if defined(CONFIG_100MHz)
+/* 100 MHz CPU - 50 MHz bus:
+ * ACS = 01, TRLX = 0, CSNT = 0, SCY = 7, EHTR = 0 */
+#define CFG_OR_TIMING_FLASH (OR_ACS_DIV4 | OR_SCY_7_CLK | OR_BI)
+#elif defined(CONFIG_80MHz)
+/* 80 MHz CPU - 40 MHz bus:
+ * ACS = 00, TRLX = 0, CSNT = 1, SCY = 3, EHTR = 1 */
+#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | 0 | OR_CSNT_SAM | \
+ OR_SCY_3_CLK | OR_EHTR | OR_BI)
+#elif defined(CONFIG_66MHz)
+/* 66 MHz CPU - 66 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 1 */
+#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
+ OR_SCY_3_CLK | OR_EHTR | OR_BI)
+#else /* 50 MHz */
+/* 50 MHz CPU - 50 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 2, EHTR = 1 */
+#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
+ OR_SCY_2_CLK | OR_EHTR | OR_BI)
+#endif /*CONFIG_??MHz */
+
+#define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
+
+#define CFG_OR1_REMAP CFG_OR0_REMAP
+#define CFG_OR1_PRELIM CFG_OR0_PRELIM
+#define CFG_BR1_PRELIM ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_V )
+
+/*
+ * BR2/3 and OR2/3 (SDRAM)
+ *
+ */
+#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */
+#define SDRAM_BASE3_PRELIM 0x20000000 /* SDRAM bank #1 */
+#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */
+
+/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
+#define CFG_OR_TIMING_SDRAM 0x00000A00
+
+#define CFG_OR2_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM )
+#define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+
+#ifndef CONFIG_CAN_DRIVER
+#define CFG_OR3_PRELIM CFG_OR2_PRELIM
+#define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+#else /* CAN uses CS3#, so we can have only one SDRAM bank anyway */
+#define CFG_CAN_BASE 0xC0000000 /* CAN mapped at 0xC0000000 */
+#define CFG_CAN_OR_AM 0xFFFF8000 /* 32 kB address mask */
+#define CFG_OR3_CAN (CFG_CAN_OR_AM | OR_G5LA | OR_BI)
+#define CFG_BR3_CAN ((CFG_CAN_BASE & BR_BA_MSK) | \
+ BR_PS_8 | BR_MS_UPMB | BR_V )
+#endif /* CONFIG_CAN_DRIVER */
+
+/*
+ * Memory Periodic Timer Prescaler
+ *
+ * The Divider for PTA (refresh timer) configuration is based on an
+ * example SDRAM configuration (64 MBit, one bank). The adjustment to
+ * the number of chip selects (NCS) and the actually needed refresh
+ * rate is done by setting MPTPR.
+ *
+ * PTA is calculated from
+ * PTA = (gclk * Trefresh) / ((2 ^ (2 * DFBRG)) * PTP * NCS)
+ *
+ * gclk CPU clock (not bus clock!)
+ * Trefresh Refresh cycle * 4 (four word bursts used)
+ *
+ * 4096 Rows from SDRAM example configuration
+ * 1000 factor s -> ms
+ * 32 PTP (pre-divider from MPTPR) from SDRAM example configuration
+ * 4 Number of refresh cycles per period
+ * 64 Refresh cycle in ms per number of rows
+ * --------------------------------------------
+ * Divider = 4096 * 32 * 1000 / (4 * 64) = 512000
+ *
+ * 50 MHz => 50.000.000 / Divider = 98
+ * 66 Mhz => 66.000.000 / Divider = 129
+ * 80 Mhz => 80.000.000 / Divider = 156
+ * 100 Mhz => 100.000.000 / Divider = 195
+ */
+#if defined(CONFIG_100MHz)
+#define CFG_MAMR_PTA 195
+#elif defined(CONFIG_80MHz)
+#define CFG_MAMR_PTA 156
+#elif defined(CONFIG_66MHz)
+#define CFG_MAMR_PTA 129
+#else /* 50 MHz */
+#define CFG_MAMR_PTA 98
+#endif /*CONFIG_??MHz */
+
+/*
+ * For 16 MBit, refresh rates could be 31.3 us
+ * (= 64 ms / 2K = 125 / quad bursts).
+ * For a simpler initialization, 15.6 us is used instead.
+ *
+ * #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks
+ * #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank
+ */
+#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */
+#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */
+
+/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */
+#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */
+#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */
+
+/*
+ * MAMR settings for SDRAM
+ */
+
+/* 8 column SDRAM */
+#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+ MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+/* 9 column SDRAM */
+#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CONFIG_NET_MULTI
+#define CONFIG_SCC1_ENET
+#define CONFIG_FEC_ENET
+#define CONFIG_ETHPRIME "SCC ETHERNET"
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h
index 21b9d763c9..b933be9d3d 100644
--- a/include/configs/ep8260.h
+++ b/include/configs/ep8260.h
@@ -283,6 +283,7 @@
~CFG_CMD_JFFS2 & \
~CFG_CMD_KGDB & \
~CFG_CMD_MII & \
+ ~CFG_CMD_MMC & \
~CFG_CMD_NAND & \
~CFG_CMD_PCI & \
~CFG_CMD_PCMCIA & \
diff --git a/include/configs/hymod.h b/include/configs/hymod.h
index df89715635..e3a0ee3aeb 100644
--- a/include/configs/hymod.h
+++ b/include/configs/hymod.h
@@ -148,6 +148,7 @@
CFG_CMD_JFFS2 | \
CFG_CMD_NAND | \
CFG_CMD_MII | \
+ CFG_CMD_MMC | \
CFG_CMD_PCMCIA | \
CFG_CMD_PCI | \
CFG_CMD_USB | \
diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h
index ba55af1bde..609ce339ae 100644
--- a/include/configs/lubbock.h
+++ b/include/configs/lubbock.h
@@ -18,7 +18,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -34,21 +34,24 @@
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL /* undef for developing */
/*
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_PXA250 1 /* This is an PXA250 CPU */
-#define CONFIG_LUBBOCK 1 /* on an LUBBOCK Board */
+#define CONFIG_PXA250 1 /* This is an PXA250 CPU */
+#define CONFIG_LUBBOCK 1 /* on an LUBBOCK Board */
+#define CONFIG_LCD 1
+#define CONFIG_MMC 1
+#define BOARD_POST_INIT 1
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/*
* Size of malloc() pool
*/
-#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
/*
* Hardware drivers
@@ -59,166 +62,176 @@
/*
* select serial console configuration
*/
-#define CONFIG_FFUART 1 /* we use FFUART on LUBBOCK */
+#define CONFIG_FFUART 1 /* we use FFUART on LUBBOCK */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
+#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MMC | CFG_CMD_FAT)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
-#define CONFIG_NETMASK 255.255.0.0
-#define CONFIG_IPADDR 192.168.0.21
-#define CONFIG_SERVERIP 192.168.0.250
-#define CONFIG_BOOTCOMMAND "bootm 40000"
-#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
-#define CONFIG_CMDLINE_TAG
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.0.0
+#define CONFIG_IPADDR 192.168.0.21
+#define CONFIG_SERVERIP 192.168.0.250
+#define CONFIG_BOOTCOMMAND "bootm 40000"
+#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
+#define CONFIG_CMDLINE_TAG
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
* Miscellaneous configurable options
*/
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_HUSH_PARSER 1
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#define CFG_LONGHELP /* undef to save memory */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT "$ " /* Monitor Command Prompt */
+#else
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#endif
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_DEVICE_NULLDEV 1
+
+#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */
-#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
-#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#define CFG_LOAD_ADDR 0xa8000000 /* default load address */
-#define CFG_LOAD_ADDR 0xa8000000 /* default load address */
+#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
+#define CFG_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */
-#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
-#define CFG_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
- /* valid baudrates */
-#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CFG_MMC_BASE 0xF0000000
/*
* Stack sizes
*
* The stack sizes are set up in start.S using the settings below
*/
-#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
#endif
/*
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
-#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
-#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
-#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
-#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
-#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
-#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
-
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
-#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */
-#define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */
-#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
-
-#define CFG_DRAM_BASE 0xa0000000
-#define CFG_DRAM_SIZE 0x04000000
-
-#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
+#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
+#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
+#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
+#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
+
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
+#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */
+#define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */
+#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
+
+#define CFG_DRAM_BASE 0xa0000000
+#define CFG_DRAM_SIZE 0x04000000
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
#define FPGA_REGS_BASE_PHYSICAL 0x08000000
/*
* GPIO settings
*/
-#define CFG_GPSR0_VAL 0x00008000
-#define CFG_GPSR1_VAL 0x00FC0382
-#define CFG_GPSR2_VAL 0x0001FFFF
-#define CFG_GPCR0_VAL 0x00000000
-#define CFG_GPCR1_VAL 0x00000000
-#define CFG_GPCR2_VAL 0x00000000
-#define CFG_GPDR0_VAL 0x0060A800
-#define CFG_GPDR1_VAL 0x00FF0382
-#define CFG_GPDR2_VAL 0x0001C000
-#define CFG_GAFR0_L_VAL 0x98400000
-#define CFG_GAFR0_U_VAL 0x00002950
-#define CFG_GAFR1_L_VAL 0x000A9558
-#define CFG_GAFR1_U_VAL 0x0005AAAA
-#define CFG_GAFR2_L_VAL 0xA0000000
-#define CFG_GAFR2_U_VAL 0x00000002
-
-#define CFG_PSSR_VAL 0x20
+#define CFG_GPSR0_VAL 0x00008000
+#define CFG_GPSR1_VAL 0x00FC0382
+#define CFG_GPSR2_VAL 0x0001FFFF
+#define CFG_GPCR0_VAL 0x00000000
+#define CFG_GPCR1_VAL 0x00000000
+#define CFG_GPCR2_VAL 0x00000000
+#define CFG_GPDR0_VAL 0x0060A800
+#define CFG_GPDR1_VAL 0x00FF0382
+#define CFG_GPDR2_VAL 0x0001C000
+#define CFG_GAFR0_L_VAL 0x98400000
+#define CFG_GAFR0_U_VAL 0x00002950
+#define CFG_GAFR1_L_VAL 0x000A9558
+#define CFG_GAFR1_U_VAL 0x0005AAAA
+#define CFG_GAFR2_L_VAL 0xA0000000
+#define CFG_GAFR2_U_VAL 0x00000002
+
+#define CFG_PSSR_VAL 0x20
/*
* Memory settings
*/
-#define CFG_MSC0_VAL 0x23F223F2
-#define CFG_MSC1_VAL 0x3FF1A441
-#define CFG_MSC2_VAL 0x7FF17FF1
-#define CFG_MDCNFG_VAL 0x00001AC9
-#define CFG_MDREFR_VAL 0x00018018
-#define CFG_MDMRS_VAL 0x00000000
+#define CFG_MSC0_VAL 0x23F223F2
+#define CFG_MSC1_VAL 0x3FF1A441
+#define CFG_MSC2_VAL 0x7FF97FF1
+#define CFG_MDCNFG_VAL 0x00001AC9
+#define CFG_MDREFR_VAL 0x00018018
+#define CFG_MDMRS_VAL 0x00000000
/*
* PCMCIA and CF Interfaces
*/
-#define CFG_MECR_VAL 0x00000000
-#define CFG_MCMEM0_VAL 0x00010504
-#define CFG_MCMEM1_VAL 0x00010504
-#define CFG_MCATT0_VAL 0x00010504
-#define CFG_MCATT1_VAL 0x00010504
-#define CFG_MCIO0_VAL 0x00004715
-#define CFG_MCIO1_VAL 0x00004715
+#define CFG_MECR_VAL 0x00000000
+#define CFG_MCMEM0_VAL 0x00010504
+#define CFG_MCMEM1_VAL 0x00010504
+#define CFG_MCATT0_VAL 0x00010504
+#define CFG_MCATT1_VAL 0x00010504
+#define CFG_MCIO0_VAL 0x00004715
+#define CFG_MCIO1_VAL 0x00004715
-#define _LED 0x08000010
-#define LED_BLANK (0x08000040)
+#define _LED 0x08000010
+#define LED_BLANK 0x08000040
/*
* FLASH and environment organization
*/
-#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
/* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
+#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
/* FIXME */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
-#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
+#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
/*
* FPGA Offsets
*/
-#define WHOAMI_OFFSET 0x00
-#define HEXLED_OFFSET 0x10
-#define BLANKLED_OFFSET 0x40
-#define DISCRETELED_OFFSET 0x40
-#define CNFG_SWITCHES_OFFSET 0x50
-#define USER_SWITCHES_OFFSET 0x60
-#define MISC_WR_OFFSET 0x80
-#define MISC_RD_OFFSET 0x90
-#define INT_MASK_OFFSET 0xC0
-#define INT_CLEAR_OFFSET 0xD0
-#define GP_OFFSET 0x100
-
-#endif /* __CONFIG_H */
+#define WHOAMI_OFFSET 0x00
+#define HEXLED_OFFSET 0x10
+#define BLANKLED_OFFSET 0x40
+#define DISCRETELED_OFFSET 0x40
+#define CNFG_SWITCHES_OFFSET 0x50
+#define USER_SWITCHES_OFFSET 0x60
+#define MISC_WR_OFFSET 0x80
+#define MISC_RD_OFFSET 0x90
+#define INT_MASK_OFFSET 0xC0
+#define INT_CLEAR_OFFSET 0xD0
+#define GP_OFFSET 0x100
+
+#endif /* __CONFIG_H */
diff --git a/include/fat.h b/include/fat.h
new file mode 100644
index 0000000000..b56219ced8
--- /dev/null
+++ b/include/fat.h
@@ -0,0 +1,208 @@
+/*
+ * R/O (V)FAT 12/16/32 filesystem implementation by Marcus Sundberg
+ *
+ * 2002-07-28 - rjones@nexus-tech.net - ported to ppcboot v1.1.6
+ * 2003-03-10 - kharris@nexus-tech.net - ported to u-boot
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef _FAT_H_
+#define _FAT_H_
+
+#define CONFIG_SUPPORT_VFAT
+
+#define SECTOR_SIZE FS_BLOCK_SIZE
+
+#define FS_BLOCK_SIZE 512
+
+#if FS_BLOCK_SIZE != SECTOR_SIZE
+#error FS_BLOCK_SIZE != SECTOR_SIZE - This code needs to be fixed!
+#endif
+
+#define MAX_CLUSTSIZE 65536
+#define DIRENTSPERBLOCK (FS_BLOCK_SIZE/sizeof(dir_entry))
+#define DIRENTSPERCLUST ((mydata->clust_size*SECTOR_SIZE)/sizeof(dir_entry))
+
+#define FATBUFBLOCKS 6
+#define FATBUFSIZE (FS_BLOCK_SIZE*FATBUFBLOCKS)
+#define FAT12BUFSIZE ((FATBUFSIZE*3)/2)
+#define FAT16BUFSIZE (FATBUFSIZE/2)
+#define FAT32BUFSIZE (FATBUFSIZE/4)
+
+
+/* Filesystem identifiers */
+#define FAT12_SIGN "FAT12 "
+#define FAT16_SIGN "FAT16 "
+#define FAT32_SIGN "FAT32 "
+#define SIGNLEN 8
+
+/* File attributes */
+#define ATTR_RO 1
+#define ATTR_HIDDEN 2
+#define ATTR_SYS 4
+#define ATTR_VOLUME 8
+#define ATTR_DIR 16
+#define ATTR_ARCH 32
+
+#define ATTR_VFAT (ATTR_RO | ATTR_HIDDEN | ATTR_SYS | ATTR_VOLUME)
+
+#define DELETED_FLAG ((char)0xe5) /* Marks deleted files when in name[0] */
+#define aRING 0x05 /* Used to represent '' in name[0] */
+
+
+/* Flags telling whether we should read a file or list a directory */
+#define LS_NO 0
+#define LS_YES 1
+#define LS_DIR 1
+#define LS_ROOT 2
+
+#ifdef DEBUG
+#define FAT_DPRINT(args...) printf(args)
+#else
+#define FAT_DPRINT(args...)
+#endif
+#define FAT_ERROR(arg) printf(arg)
+
+#define ISDIRDELIM(c) ((c) == '/' || (c) == '\\')
+
+#define FSTYPE_NONE (-1)
+
+#if defined(__linux__) && defined(__KERNEL__)
+#define FAT2CPU16 le16_to_cpu
+#define FAT2CPU32 le32_to_cpu
+#else
+#if 1
+#define FAT2CPU16(x) (x)
+#define FAT2CPU32(x) (x)
+#else
+#define FAT2CPU16(x) ((((x) & 0x00ff) << 8) | (((x) & 0xff00) >> 8))
+#define FAT2CPU32(x) ((((x) & 0x000000ff) << 24) | \
+ (((x) & 0x0000ff00) << 8) | \
+ (((x) & 0x00ff0000) >> 8) | \
+ (((x) & 0xff000000) >> 24))
+#endif
+#endif
+
+#define TOLOWER(c) if((c) >= 'A' && (c) <= 'Z'){(c)+=('a' - 'A');}
+#define START(dent) (FAT2CPU16((dent)->start) \
+ + (mydata->fatsize != 32 ? 0 : \
+ (FAT2CPU16((dent)->starthi) << 16)))
+
+
+typedef struct boot_sector {
+ __u8 ignored[3]; /* Bootstrap code */
+ char system_id[8]; /* Name of fs */
+ __u8 sector_size[2]; /* Bytes/sector */
+ __u8 cluster_size; /* Sectors/cluster */
+ __u16 reserved; /* Number of reserved sectors */
+ __u8 fats; /* Number of FATs */
+ __u8 dir_entries[2]; /* Number of root directory entries */
+ __u8 sectors[2]; /* Number of sectors */
+ __u8 media; /* Media code */
+ __u16 fat_length; /* Sectors/FAT */
+ __u16 secs_track; /* Sectors/track */
+ __u16 heads; /* Number of heads */
+ __u32 hidden; /* Number of hidden sectors */
+ __u32 total_sect; /* Number of sectors (if sectors == 0) */
+
+ /* FAT32 only */
+ __u32 fat32_length; /* Sectors/FAT */
+ __u16 flags; /* Bit 8: fat mirroring, low 4: active fat */
+ __u8 version[2]; /* Filesystem version */
+ __u32 root_cluster; /* First cluster in root directory */
+ __u16 info_sector; /* Filesystem info sector */
+ __u16 backup_boot; /* Backup boot sector */
+ __u16 reserved2[6]; /* Unused */
+} boot_sector;
+
+typedef struct volume_info
+{
+ __u8 drive_number; /* BIOS drive number */
+ __u8 reserved; /* Unused */
+ __u8 ext_boot_sign; /* 0x29 if fields below exist (DOS 3.3+) */
+ __u8 volume_id[4]; /* Volume ID number */
+ char volume_label[11]; /* Volume label */
+ char fs_type[8]; /* Typically FAT12, FAT16, or FAT32 */
+ /* Boot code comes next, all but 2 bytes to fill up sector */
+ /* Boot sign comes last, 2 bytes */
+} volume_info;
+
+typedef struct dir_entry {
+ char name[8],ext[3]; /* Name and extension */
+ __u8 attr; /* Attribute bits */
+ __u8 lcase; /* Case for base and extension */
+ __u8 ctime_ms; /* Creation time, milliseconds */
+ __u16 ctime; /* Creation time */
+ __u16 cdate; /* Creation date */
+ __u16 adate; /* Last access date */
+ __u16 starthi; /* High 16 bits of cluster in FAT32 */
+ __u16 time,date,start;/* Time, date and first cluster */
+ __u32 size; /* File size in bytes */
+} dir_entry;
+
+typedef struct dir_slot {
+ __u8 id; /* Sequence number for slot */
+ __u8 name0_4[10]; /* First 5 characters in name */
+ __u8 attr; /* Attribute byte */
+ __u8 reserved; /* Unused */
+ __u8 alias_checksum;/* Checksum for 8.3 alias */
+ __u8 name5_10[12]; /* 6 more characters in name */
+ __u16 start; /* Unused */
+ __u8 name11_12[4]; /* Last 2 characters in name */
+} dir_slot;
+
+/* Private filesystem parameters */
+typedef struct {
+ int fatsize; /* Size of FAT in bits */
+ __u16 fatlength; /* Length of FAT in sectors */
+ __u16 fat_sect; /* Starting sector of the FAT */
+ __u16 rootdir_sect; /* Start sector of root directory */
+ __u16 clust_size; /* Size of clusters in sectors */
+ __u16 data_begin; /* The sector of the first cluster */
+ __u8 fatbuf[FATBUFSIZE]; /* Current FAT buffer */
+ int fatbufnum; /* Used by get_fatent, init to -1 */
+} fsdata;
+
+typedef int (file_detectfs_func)(void);
+typedef int (file_ls_func)(const char *dir);
+typedef long (file_read_func)(const char *filename, void *buffer,
+ unsigned long maxsize);
+
+struct filesystem {
+ file_detectfs_func *detect;
+ file_ls_func *ls;
+ file_read_func *read;
+ const char name[12];
+};
+
+/* FAT tables */
+file_detectfs_func file_fat_detectfs;
+file_ls_func file_fat_ls;
+file_read_func file_fat_read;
+
+/* Currently this doesn't check if the dir exists or is valid... */
+int file_cd(const char *path);
+int file_fat_detectfs(void);
+int file_fat_ls(const char *dir);
+long file_fat_read(const char *filename, void *buffer, unsigned long maxsize);
+const char *file_getfsname(int idx);
+
+#endif /* _FAT_H_ */
diff --git a/include/flash.h b/include/flash.h
index 6410f2f6bf..882652d7e8 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -158,6 +158,10 @@ extern int flash_real_protect(flash_info_t *info, long sector, int prot);
#define AMD_ID_DL324B 0x225F225F /* 29DL324B ID (32 M, bottom boot sect) */
#define AMD_ID_DL640 0x227E227E /* 29DL640D ID (64 M, dual boot sectors)*/
+#define AMD_ID_MIRROR 0x227E227E /* 1st ID word for MirrorBit family */
+#define AMD_ID_LV128U_2 0x22122212 /* 2d ID word for AM29LV128M at 0x38 */
+#define AMD_ID_LV128U_3 0x22002200 /* 3d ID word for AM29LV128M at 0x3c */
+
#define AMD_ID_LV640U 0x22D722D7 /* 29LV640U ID (64 M, uniform sectors) */
#define ATM_ID_BV1614 0x000000C0 /* 49BV1614 ID */
@@ -302,6 +306,7 @@ extern int flash_real_protect(flash_info_t *info, long sector, int prot);
#define FLASH_28F320C3B 0x009F /* Intel 28F320C3B ( 32M = 2M x 16 ) */
#define FLASH_28F640C3T 0x00A0 /* Intel 28F640C3T ( 64M = 4M x 16 ) */
#define FLASH_28F640C3B 0x00A1 /* Intel 28F640C3B ( 64M = 4M x 16 ) */
+#define FLASH_AMLV128U 0x00A2 /* AMD 29LV128M ( 128M = 8M x 16 ) */
#define FLASH_UNKNOWN 0xFFFF /* unknown flash type */
diff --git a/include/mmc.h b/include/mmc.h
new file mode 100644
index 0000000000..a2716959e2
--- /dev/null
+++ b/include/mmc.h
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _MMC_H_
+#define _MMC_H_
+#include <asm/arch/mmc.h>
+
+int mmc_init(int verbose);
+int mmc_read(ulong src, uchar *dst, int size);
+int mmc_write(uchar *src, ulong dst, int size);
+int mmc2info(ulong addr);
+
+#endif /* _MMC_H_ */
diff --git a/include/net.h b/include/net.h
index 689a90f6ee..2a1d3365e4 100644
--- a/include/net.h
+++ b/include/net.h
@@ -12,12 +12,14 @@
#ifndef __NET_H__
#define __NET_H__
-#if !defined(CONFIG_NET_MULTI) && defined(CONFIG_8xx)
+#if defined(CONFIG_8xx)
#include <commproc.h>
-#if defined(FEC_ENET) || defined(SCC_ENET)
-#define CONFIG_NET_MULTI
-#endif
-#endif
+# if !defined(CONFIG_NET_MULTI)
+# if defined(FEC_ENET) || defined(SCC_ENET)
+# define CONFIG_NET_MULTI
+# endif
+# endif
+#endif /* CONFIG_8xx */
#if !defined(CONFIG_NET_MULTI) && defined(CONFIG_8260)
#include <config.h>
diff --git a/net/eth.c b/net/eth.c
index f9863c65e0..5f9c3a6cd9 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -99,7 +99,7 @@ int eth_initialize(bd_t *bis)
eth_devices = NULL;
eth_current = NULL;
-#if (defined(CONFIG_405GP) || defined(CONFIG_440)|| defined(CONFIG_405EP))
+#if defined(CONFIG_405GP) || defined(CONFIG_440) || defined(CONFIG_405EP)
ppc_4xx_eth_initialize(bis);
#endif
#ifdef CONFIG_INCA_IP_SWITCH
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