diff options
75 files changed, 2965 insertions, 3371 deletions
@@ -642,114 +642,6 @@ $(obj).boards.depend: boards.cfg lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/') ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/') -######################################################################### -## Coldfire -######################################################################### -M52277EVB_config \ -M52277EVB_spansion_config \ -M52277EVB_stmicro_config : unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/freescale/m52277evb - @case "$@" in \ - M52277EVB_config) FLASH=SPANSION;; \ - M52277EVB_spansion_config) FLASH=SPANSION;; \ - M52277EVB_stmicro_config) FLASH=STMICRO;; \ - esac; \ - if [ "$${FLASH}" = "SPANSION" ] ; then \ - echo "#define CONFIG_SYS_SPANSION_BOOT" >> $(obj)include/config.h ; \ - echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m52277evb/config.tmp ; \ - fi; \ - if [ "$${FLASH}" = "STMICRO" ] ; then \ - echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \ - echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \ - echo "CONFIG_SYS_TEXT_BASE = 0x43E00000" > $(obj)board/freescale/m52277evb/config.tmp ; \ - fi - @$(MKCONFIG) -n $@ -a M52277EVB m68k mcf5227x m52277evb freescale - -M5235EVB_config \ -M5235EVB_Flash16_config \ -M5235EVB_Flash32_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/freescale/m5235evb - @case "$@" in \ - M5235EVB_config) FLASH=16;; \ - M5235EVB_Flash16_config) FLASH=16;; \ - M5235EVB_Flash32_config) FLASH=32;; \ - esac; \ - if [ "$${FLASH}" != "16" ] ; then \ - echo "#define NORFLASH_PS32BIT 1" >> $(obj)include/config.h ; \ - echo "CONFIG_SYS_TEXT_BASE = 0xFFC00000" > $(obj)board/freescale/m5235evb/config.tmp ; \ - else \ - echo "CONFIG_SYS_TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \ - fi - @$(MKCONFIG) -n $@ -a M5235EVB m68k mcf523x m5235evb freescale - -EB+MCF-EV123_config : unconfig - @mkdir -p $(obj)board/BuS/EB+MCF-EV123 - @echo "CONFIG_SYS_TEXT_BASE = 0xFFE00000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk - @$(MKCONFIG) -n $@ EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS - -EB+MCF-EV123_internal_config : unconfig - @mkdir -p $(obj)board/BuS/EB+MCF-EV123 - @echo "CONFIG_SYS_TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk - @$(MKCONFIG) -n $@ EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS - -M54451EVB_config \ -M54451EVB_stmicro_config : unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/freescale/m54451evb - @case "$@" in \ - M54451EVB_config) FLASH=NOR;; \ - M54451EVB_stmicro_config) FLASH=STMICRO;; \ - esac; \ - if [ "$${FLASH}" = "NOR" ] ; then \ - echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \ - fi; \ - if [ "$${FLASH}" = "STMICRO" ] ; then \ - echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \ - echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \ - echo "CONFIG_SYS_TEXT_BASE = 0x47E00000" > $(obj)board/freescale/m54451evb/config.tmp ; \ - fi; \ - echo "#define CONFIG_SYS_INPUT_CLKSRC 24000000" >> $(obj)include/config.h ; - @$(MKCONFIG) -n $@ -a M54451EVB m68k mcf5445x m54451evb freescale - -M54455EVB_config \ -M54455EVB_atmel_config \ -M54455EVB_intel_config \ -M54455EVB_a33_config \ -M54455EVB_a66_config \ -M54455EVB_i33_config \ -M54455EVB_i66_config \ -M54455EVB_stm33_config : unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/freescale/m54455evb - @case "$@" in \ - M54455EVB_config) FLASH=ATMEL; FREQ=33333333;; \ - M54455EVB_atmel_config) FLASH=ATMEL; FREQ=33333333;; \ - M54455EVB_intel_config) FLASH=INTEL; FREQ=33333333;; \ - M54455EVB_a33_config) FLASH=ATMEL; FREQ=33333333;; \ - M54455EVB_a66_config) FLASH=ATMEL; FREQ=66666666;; \ - M54455EVB_i33_config) FLASH=INTEL; FREQ=33333333;; \ - M54455EVB_i66_config) FLASH=INTEL; FREQ=66666666;; \ - M54455EVB_stm33_config) FLASH=STMICRO; FREQ=33333333;; \ - esac; \ - if [ "$${FLASH}" = "INTEL" ] ; then \ - echo "#define CONFIG_SYS_INTEL_BOOT" >> $(obj)include/config.h ; \ - echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ - fi; \ - if [ "$${FLASH}" = "ATMEL" ] ; then \ - echo "#define CONFIG_SYS_ATMEL_BOOT" >> $(obj)include/config.h ; \ - echo "CONFIG_SYS_TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ - fi; \ - if [ "$${FLASH}" = "STMICRO" ] ; then \ - echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \ - echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \ - echo "CONFIG_SYS_TEXT_BASE = 0x4FE00000" > $(obj)board/freescale/m54455evb/config.tmp ; \ - fi; \ - echo "#define CONFIG_SYS_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \ - $(XECHO) "... with $${FREQ}Hz input clock" - @$(MKCONFIG) -n $@ -a M54455EVB m68k mcf5445x m54455evb freescale - #======================================================================== # ARM #======================================================================== diff --git a/arch/powerpc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c index f9d293b7ce..b423d2fe34 100644 --- a/arch/powerpc/cpu/mpc5xxx/i2c.c +++ b/arch/powerpc/cpu/mpc5xxx/i2c.c @@ -100,14 +100,11 @@ static int wait_for_bb(void) status = mpc_reg_in(®s->msr); while (timeout-- && (status & I2C_BB)) { -#if 1 - volatile int temp; mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); - temp = mpc_reg_in(®s->mdr); + (void)mpc_reg_in(®s->mdr); mpc_reg_out(®s->mcr, 0, I2C_STA); mpc_reg_out(®s->mcr, 0, 0); mpc_reg_out(®s->mcr, I2C_EN, 0); -#endif udelay(15); status = mpc_reg_in(®s->msr); } diff --git a/arch/powerpc/cpu/mpc5xxx/usb_ohci.c b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c index 2fc1180b78..d250c199f8 100644 --- a/arch/powerpc/cpu/mpc5xxx/usb_ohci.c +++ b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c @@ -748,10 +748,9 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf static void dl_transfer_length(td_t * td) { - __u32 tdINFO, tdBE, tdCBP; + __u32 tdBE, tdCBP; urb_priv_t *lurb_priv = &urb_priv; - tdINFO = ohci_cpu_to_le32 (td->hwINFO); tdBE = ohci_cpu_to_le32 (td->hwBE); tdCBP = ohci_cpu_to_le32 (td->hwCBP); diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c index bcda8a2b27..2053fea571 100644 --- a/arch/powerpc/cpu/mpc8220/fec.c +++ b/arch/powerpc/cpu/mpc8220/fec.c @@ -772,8 +772,8 @@ static int mpc8220_fec_recv (struct eth_device *dev) frame = (NBUF *) pRbd->dataPointer; frame_length = pRbd->dataLength - 4; -#if (0) - { + /* DEBUG code */ + if (_DEBUG) { int i; printf ("recv data hdr:"); @@ -781,7 +781,7 @@ static int mpc8220_fec_recv (struct eth_device *dev) printf ("%x ", *(frame->head + i)); printf ("\n"); } -#endif + /* * Fill the buffer and pass it to upper layers */ diff --git a/arch/powerpc/cpu/mpc8220/i2c.c b/arch/powerpc/cpu/mpc8220/i2c.c index 76ecdf11e2..2f35d20c87 100644 --- a/arch/powerpc/cpu/mpc8220/i2c.c +++ b/arch/powerpc/cpu/mpc8220/i2c.c @@ -105,15 +105,13 @@ static int wait_for_bb (void) status = mpc_reg_in (®s->sr); while (timeout-- && (status & I2C_BB)) { -#if 1 - volatile int temp; mpc_reg_out (®s->cr, I2C_STA, I2C_STA); - temp = mpc_reg_in (®s->dr); + (void)mpc_reg_in (®s->dr); mpc_reg_out (®s->cr, 0, I2C_STA); mpc_reg_out (®s->cr, 0, 0); mpc_reg_out (®s->cr, I2C_EN, 0); -#endif + udelay (1000); status = mpc_reg_in (®s->sr); } diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c index d2bdcc2d82..7382cbadc7 100644 --- a/arch/powerpc/cpu/mpc8260/i2c.c +++ b/arch/powerpc/cpu/mpc8260/i2c.c @@ -31,13 +31,10 @@ #include <asm/cpm_8260.h> #include <i2c.h> -/* define to enable debug messages */ -#undef DEBUG_I2C - DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_I2C_MULTI_BUS) -static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0; +static unsigned int i2c_bus_num __attribute__ ((section(".data"))) = 0; #endif /* CONFIG_I2C_MULTI_BUS */ /* uSec to wait between polls of the i2c */ @@ -51,52 +48,50 @@ static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0; */ #define TOUT_LOOP 5 -/*----------------------------------------------------------------------- +/* * Set default values */ #ifndef CONFIG_SYS_I2C_SPEED #define CONFIG_SYS_I2C_SPEED 50000 #endif -/*----------------------------------------------------------------------- - */ -typedef void (*i2c_ecb_t)(int, int, void *); /* error callback function */ +typedef void (*i2c_ecb_t) (int, int, void *); /* error callback function */ /* This structure keeps track of the bd and buffer space usage. */ typedef struct i2c_state { - int rx_idx; /* index to next free Rx BD */ - int tx_idx; /* index to next free Tx BD */ - void *rxbd; /* pointer to next free Rx BD */ - void *txbd; /* pointer to next free Tx BD */ - int tx_space; /* number of Tx bytes left */ - unsigned char *tx_buf; /* pointer to free Tx area */ - i2c_ecb_t err_cb; /* error callback function */ - void *cb_data; /* private data to be passed */ + int rx_idx; /* index to next free Rx BD */ + int tx_idx; /* index to next free Tx BD */ + void *rxbd; /* pointer to next free Rx BD */ + void *txbd; /* pointer to next free Tx BD */ + int tx_space; /* number of Tx bytes left */ + unsigned char *tx_buf; /* pointer to free Tx area */ + i2c_ecb_t err_cb; /* error callback function */ + void *cb_data; /* private data to be passed */ } i2c_state_t; /* flags for i2c_send() and i2c_receive() */ -#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */ -#define I2CF_START_COND 0x02 /* tx: generate start condition */ -#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */ +#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */ +#define I2CF_START_COND 0x02 /* tx: generate start condition */ +#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */ /* return codes */ -#define I2CERR_NO_BUFFERS 1 /* no more BDs or buffer space */ -#define I2CERR_MSG_TOO_LONG 2 /* tried to send/receive to much data */ -#define I2CERR_TIMEOUT 3 /* timeout in i2c_doio() */ -#define I2CERR_QUEUE_EMPTY 4 /* i2c_doio called without send/receive */ -#define I2CERR_IO_ERROR 5 /* had an error during comms */ +#define I2CERR_NO_BUFFERS 1 /* no more BDs or buffer space */ +#define I2CERR_MSG_TOO_LONG 2 /* tried to send/receive to much data */ +#define I2CERR_TIMEOUT 3 /* timeout in i2c_doio() */ +#define I2CERR_QUEUE_EMPTY 4 /* i2c_doio called without send/rcv */ +#define I2CERR_IO_ERROR 5 /* had an error during comms */ /* error callback flags */ -#define I2CECB_RX_ERR 0x10 /* this is a receive error */ -#define I2CECB_RX_OV 0x02 /* receive overrun error */ -#define I2CECB_RX_MASK 0x0f /* mask for error bits */ -#define I2CECB_TX_ERR 0x20 /* this is a transmit error */ -#define I2CECB_TX_CL 0x01 /* transmit collision error */ -#define I2CECB_TX_UN 0x02 /* transmit underflow error */ -#define I2CECB_TX_NAK 0x04 /* transmit no ack error */ -#define I2CECB_TX_MASK 0x0f /* mask for error bits */ -#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */ +#define I2CECB_RX_ERR 0x10 /* this is a receive error */ +#define I2CECB_RX_OV 0x02 /* receive overrun error */ +#define I2CECB_RX_MASK 0x0f /* mask for error bits */ +#define I2CECB_TX_ERR 0x20 /* this is a transmit error */ +#define I2CECB_TX_CL 0x01 /* transmit collision error */ +#define I2CECB_TX_UN 0x02 /* transmit underflow error */ +#define I2CECB_TX_NAK 0x04 /* transmit no ack error */ +#define I2CECB_TX_MASK 0x0f /* mask for error bits */ +#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */ #define ERROR_I2C_NONE 0 #define ERROR_I2C_LENGTH 1 @@ -111,13 +106,13 @@ typedef struct i2c_state { #define NUM_TX_BDS 4 #define MAX_TX_SPACE 256 -typedef struct I2C_BD -{ - unsigned short status; - unsigned short length; - unsigned char *addr; +typedef struct I2C_BD { + unsigned short status; + unsigned short length; + unsigned char *addr; } I2C_BD; -#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */ + +#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */ #define BD_I2C_TX_CL 0x0001 /* collision error */ #define BD_I2C_TX_UN 0x0002 /* underflow error */ @@ -126,12 +121,6 @@ typedef struct I2C_BD #define BD_I2C_RX_ERR BD_SC_OV -#ifdef DEBUG_I2C -#define PRINTD(x) printf x -#else -#define PRINTD(x) -#endif - /* * Returns the best value of I2BRG to meet desired clock speed of I2C with * input parameters (clock speed, filter, and predivider value). @@ -140,32 +129,32 @@ typedef struct I2C_BD */ static inline int i2c_roundrate(int hz, int speed, int filter, int modval, - int *brgval, int *totspeed) + int *brgval, int *totspeed) { - int moddiv = 1 << (5-(modval & 3)), brgdiv, div; + int moddiv = 1 << (5 - (modval & 3)), brgdiv, div; - PRINTD(("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n", - hz, speed, filter, modval)); + debug("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n", + hz, speed, filter, modval); - div = moddiv * speed; - brgdiv = (hz + div - 1) / div; + div = moddiv * speed; + brgdiv = (hz + div - 1) / div; - PRINTD(("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv)); + debug("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv); - *brgval = ((brgdiv + 1) / 2) - 3 - (2*filter); + *brgval = ((brgdiv + 1) / 2) - 3 - (2 * filter); - if ((*brgval < 0) || (*brgval > 255)) { - PRINTD(("\t\trejected brgval=%d\n", *brgval)); - return -1; - } + if ((*brgval < 0) || (*brgval > 255)) { + debug("\t\trejected brgval=%d\n", *brgval); + return -1; + } - brgdiv = 2 * (*brgval + 3 + (2 * filter)); - div = moddiv * brgdiv ; - *totspeed = hz / div; + brgdiv = 2 * (*brgval + 3 + (2 * filter)); + div = moddiv * brgdiv; + *totspeed = hz / div; - PRINTD(("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed)); + debug("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed); - return 0; + return 0; } /* @@ -173,84 +162,87 @@ i2c_roundrate(int hz, int speed, int filter, int modval, */ static int i2c_setrate(int hz, int speed) { - immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; - volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; - int brgval, - modval, /* 0-3 */ - bestspeed_diff = speed, - bestspeed_brgval=0, - bestspeed_modval=0, - bestspeed_filter=0, - totspeed, - filter = 0; /* Use this fixed value */ - - for (modval = 0; modval < 4; modval++) - { - if (i2c_roundrate (hz, speed, filter, modval, &brgval, &totspeed) == 0) - { - int diff = speed - totspeed ; - - if ((diff >= 0) && (diff < bestspeed_diff)) - { - bestspeed_diff = diff ; - bestspeed_modval = modval; - bestspeed_brgval = brgval; - bestspeed_filter = filter; + immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; + volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; + int brgval, + modval, /* 0-3 */ + bestspeed_diff = speed, + bestspeed_brgval = 0, + bestspeed_modval = 0, + bestspeed_filter = 0, + totspeed, + filter = 0; /* Use this fixed value */ + + for (modval = 0; modval < 4; modval++) { + if (i2c_roundrate(hz, speed, filter, modval, &brgval, &totspeed) + == 0) { + int diff = speed - totspeed; + + if ((diff >= 0) && (diff < bestspeed_diff)) { + bestspeed_diff = diff; + bestspeed_modval = modval; + bestspeed_brgval = brgval; + bestspeed_filter = filter; } } } - PRINTD(("[I2C] Best is:\n")); - PRINTD(("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n", - hz, speed, - bestspeed_filter, bestspeed_modval, bestspeed_brgval, - bestspeed_diff)); + debug("[I2C] Best is:\n"); + debug("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n", + hz, speed, bestspeed_filter, bestspeed_modval, bestspeed_brgval, + bestspeed_diff); - i2c->i2c_i2mod |= ((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3); - i2c->i2c_i2brg = bestspeed_brgval & 0xff; + i2c->i2c_i2mod |= ((bestspeed_modval & 3) << 1) | + (bestspeed_filter << 3); + i2c->i2c_i2brg = bestspeed_brgval & 0xff; - PRINTD(("[I2C] i2mod=%08x i2brg=%08x\n", i2c->i2c_i2mod, i2c->i2c_i2brg)); + debug("[I2C] i2mod=%08x i2brg=%08x\n", i2c->i2c_i2mod, + i2c->i2c_i2brg); - return 1 ; + return 1; } void i2c_init(int speed, int slaveadd) { - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile cpm8260_t *cp = (cpm8260_t *)&immap->im_cpm; - volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; + volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; volatile iic_t *iip; ulong rbase, tbase; volatile I2C_BD *rxbd, *txbd; uint dpaddr; #ifdef CONFIG_SYS_I2C_INIT_BOARD - /* call board specific i2c bus reset routine before accessing the */ - /* environment, which might be in a chip on that bus. For details */ - /* about this problem see doc/I2C_Edge_Conditions. */ + /* + * call board specific i2c bus reset routine before accessing the + * environment, which might be in a chip on that bus. For details + * about this problem see doc/I2C_Edge_Conditions. + */ i2c_init_board(); #endif - dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])); + dpaddr = *((unsigned short *) (&immap->im_dprambase[PROFF_I2C_BASE])); if (dpaddr == 0) { - /* need to allocate dual port ram */ - dpaddr = m8260_cpm_dpalloc(64 + - (NUM_RX_BDS * sizeof(I2C_BD)) + (NUM_TX_BDS * sizeof(I2C_BD)) + - MAX_TX_SPACE, 64); - *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])) = dpaddr; + /* need to allocate dual port ram */ + dpaddr = m8260_cpm_dpalloc(64 + + (NUM_RX_BDS * sizeof(I2C_BD)) + + (NUM_TX_BDS * sizeof(I2C_BD)) + + MAX_TX_SPACE, 64); + *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE])) = + dpaddr; } /* * initialise data in dual port ram: * - * dpaddr -> parameter ram (64 bytes) + * dpaddr -> parameter ram (64 bytes) * rbase -> rx BD (NUM_RX_BDS * sizeof(I2C_BD) bytes) * tbase -> tx BD (NUM_TX_BDS * sizeof(I2C_BD) bytes) * tx buffer (MAX_TX_SPACE bytes) */ iip = (iic_t *)&immap->im_dprambase[dpaddr]; - memset((void*)iip, 0, sizeof(iic_t)); + memset((void *)iip, 0, sizeof(iic_t)); rbase = dpaddr + 64; tbase = rbase + NUM_RX_BDS * sizeof(I2C_BD); @@ -266,8 +258,8 @@ void i2c_init(int speed, int slaveadd) * and current CPU rate (we assume sccr dfbgr field is 0; * divide BRGCLK by 1) */ - PRINTD(("[I2C] Setting rate...\n")); - i2c_setrate (gd->brg_clk, CONFIG_SYS_I2C_SPEED) ; + debug("[I2C] Setting rate...\n"); + i2c_setrate(gd->brg_clk, CONFIG_SYS_I2C_SPEED); /* Set I2C controller in master mode */ i2c->i2c_i2com = 0x01; @@ -275,13 +267,15 @@ void i2c_init(int speed, int slaveadd) /* Initialize Tx/Rx parameters */ iip->iic_rbase = rbase; iip->iic_tbase = tbase; - rxbd = (I2C_BD *)((unsigned char *)&immap->im_dprambase[iip->iic_rbase]); - txbd = (I2C_BD *)((unsigned char *)&immap->im_dprambase[iip->iic_tbase]); + rxbd = (I2C_BD *)((unsigned char *) &immap-> + im_dprambase[iip->iic_rbase]); + txbd = (I2C_BD *)((unsigned char *) &immap-> + im_dprambase[iip->iic_tbase]); - PRINTD(("[I2C] rbase = %04x\n", iip->iic_rbase)); - PRINTD(("[I2C] tbase = %04x\n", iip->iic_tbase)); - PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd)); - PRINTD(("[I2C] txbd = %08x\n", (int)txbd)); + debug("[I2C] rbase = %04x\n", iip->iic_rbase); + debug("[I2C] tbase = %04x\n", iip->iic_tbase); + debug("[I2C] rxbd = %08x\n", (int) rxbd); + debug("[I2C] txbd = %08x\n", (int) txbd); /* Set big endian byte order */ iip->iic_tfcr = 0x10; @@ -290,13 +284,12 @@ void i2c_init(int speed, int slaveadd) /* Set maximum receive size. */ iip->iic_mrblr = I2C_RXTX_LEN; - cp->cp_cpcr = mk_cr_cmd(CPM_CR_I2C_PAGE, - CPM_CR_I2C_SBLOCK, - 0x00, - CPM_CR_INIT_TRX) | CPM_CR_FLG; - do { - __asm__ __volatile__ ("eieio"); - } while (cp->cp_cpcr & CPM_CR_FLG); + cp->cp_cpcr = mk_cr_cmd(CPM_CR_I2C_PAGE, + CPM_CR_I2C_SBLOCK, + 0x00, CPM_CR_INIT_TRX) | CPM_CR_FLG; + do { + __asm__ __volatile__("eieio"); + } while (cp->cp_cpcr & CPM_CR_FLG); /* Clear events and interrupts */ i2c->i2c_i2cer = 0xff; @@ -306,147 +299,136 @@ void i2c_init(int speed, int slaveadd) static void i2c_newio(i2c_state_t *state) { - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile iic_t *iip; uint dpaddr; - PRINTD(("[I2C] i2c_newio\n")); + debug("[I2C] i2c_newio\n"); - dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])); + dpaddr = *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE])); iip = (iic_t *)&immap->im_dprambase[dpaddr]; state->rx_idx = 0; state->tx_idx = 0; - state->rxbd = (void*)&immap->im_dprambase[iip->iic_rbase]; - state->txbd = (void*)&immap->im_dprambase[iip->iic_tbase]; + state->rxbd = (void *)&immap->im_dprambase[iip->iic_rbase]; + state->txbd = (void *)&immap->im_dprambase[iip->iic_tbase]; state->tx_space = MAX_TX_SPACE; - state->tx_buf = (uchar*)state->txbd + NUM_TX_BDS * sizeof(I2C_BD); + state->tx_buf = (uchar *)state->txbd + NUM_TX_BDS * sizeof(I2C_BD); state->err_cb = NULL; state->cb_data = NULL; - PRINTD(("[I2C] rxbd = %08x\n", (int)state->rxbd)); - PRINTD(("[I2C] txbd = %08x\n", (int)state->txbd)); - PRINTD(("[I2C] tx_buf = %08x\n", (int)state->tx_buf)); + debug("[I2C] rxbd = %08x\n", (int)state->rxbd); + debug("[I2C] txbd = %08x\n", (int)state->txbd); + debug("[I2C] tx_buf = %08x\n", (int)state->tx_buf); /* clear the buffer memory */ - memset((char *)state->tx_buf, 0, MAX_TX_SPACE); + memset((char *) state->tx_buf, 0, MAX_TX_SPACE); } static int i2c_send(i2c_state_t *state, - unsigned char address, - unsigned char secondary_address, - unsigned int flags, - unsigned short size, - unsigned char *dataout) + unsigned char address, + unsigned char secondary_address, + unsigned int flags, unsigned short size, unsigned char *dataout) { volatile I2C_BD *txbd; - int i,j; + int i, j; - PRINTD(("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n", - address, secondary_address, flags, size)); + debug("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n", + address, secondary_address, flags, size); /* trying to send message larger than BD */ if (size > I2C_RXTX_LEN) - return I2CERR_MSG_TOO_LONG; + return I2CERR_MSG_TOO_LONG; /* no more free bds */ if (state->tx_idx >= NUM_TX_BDS || state->tx_space < (2 + size)) - return I2CERR_NO_BUFFERS; + return I2CERR_NO_BUFFERS; txbd = (I2C_BD *)state->txbd; txbd->addr = state->tx_buf; - PRINTD(("[I2C] txbd = %08x\n", (int)txbd)); - - if (flags & I2CF_START_COND) - { - PRINTD(("[I2C] Formatting addresses...\n")); - if (flags & I2CF_ENABLE_SECONDARY) - { - txbd->length = size + 2; /* Length of message plus dest addresses */ - txbd->addr[0] = address << 1; - txbd->addr[1] = secondary_address; - i = 2; - } - else - { - txbd->length = size + 1; /* Length of message plus dest address */ - txbd->addr[0] = address << 1; /* Write destination address to BD */ - i = 1; + debug("[I2C] txbd = %08x\n", (int) txbd); + + if (flags & I2CF_START_COND) { + debug("[I2C] Formatting addresses...\n"); + if (flags & I2CF_ENABLE_SECONDARY) { + /* Length of message plus dest addresses */ + txbd->length = size + 2; + txbd->addr[0] = address << 1; + txbd->addr[1] = secondary_address; + i = 2; + } else { + /* Length of message plus dest address */ + txbd->length = size + 1; + /* Write destination address to BD */ + txbd->addr[0] = address << 1; + i = 1; + } + } else { + txbd->length = size; /* Length of message */ + i = 0; } - } - else - { - txbd->length = size; /* Length of message */ - i = 0; - } /* set up txbd */ txbd->status = BD_SC_READY; if (flags & I2CF_START_COND) - txbd->status |= BD_I2C_TX_START; + txbd->status |= BD_I2C_TX_START; if (flags & I2CF_STOP_COND) - txbd->status |= BD_SC_LAST | BD_SC_WRAP; + txbd->status |= BD_SC_LAST | BD_SC_WRAP; /* Copy data to send into buffer */ - PRINTD(("[I2C] copy data...\n")); - for(j = 0; j < size; i++, j++) - txbd->addr[i] = dataout[j]; + debug("[I2C] copy data...\n"); + for (j = 0; j < size; i++, j++) + txbd->addr[i] = dataout[j]; - PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", - txbd->length, - txbd->status, - txbd->addr[0], - txbd->addr[1])); + debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", + txbd->length, txbd->status, txbd->addr[0], txbd->addr[1]); /* advance state */ state->tx_buf += txbd->length; state->tx_space -= txbd->length; state->tx_idx++; - state->txbd = (void*)(txbd + 1); + state->txbd = (void *) (txbd + 1); return 0; } static int i2c_receive(i2c_state_t *state, - unsigned char address, - unsigned char secondary_address, - unsigned int flags, - unsigned short size_to_expect, - unsigned char *datain) + unsigned char address, + unsigned char secondary_address, + unsigned int flags, + unsigned short size_to_expect, unsigned char *datain) { volatile I2C_BD *rxbd, *txbd; - PRINTD(("[I2C] i2c_receive %02d %02d %02d\n", address, secondary_address, flags)); + debug("[I2C] i2c_receive %02d %02d %02d\n", address, + secondary_address, flags); /* Expected to receive too much */ if (size_to_expect > I2C_RXTX_LEN) - return I2CERR_MSG_TOO_LONG; + return I2CERR_MSG_TOO_LONG; /* no more free bds */ if (state->tx_idx >= NUM_TX_BDS || state->rx_idx >= NUM_RX_BDS - || state->tx_space < 2) - return I2CERR_NO_BUFFERS; + || state->tx_space < 2) + return I2CERR_NO_BUFFERS; - rxbd = (I2C_BD *)state->rxbd; - txbd = (I2C_BD *)state->txbd; + rxbd = (I2C_BD *) state->rxbd; + txbd = (I2C_BD *) state->txbd; - PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd)); - PRINTD(("[I2C] txbd = %08x\n", (int)txbd)); + debug("[I2C] rxbd = %08x\n", (int) rxbd); + debug("[I2C] txbd = %08x\n", (int) txbd); txbd->addr = state->tx_buf; /* set up TXBD for destination address */ - if (flags & I2CF_ENABLE_SECONDARY) - { + if (flags & I2CF_ENABLE_SECONDARY) { txbd->length = 2; - txbd->addr[0] = address << 1; /* Write data */ - txbd->addr[1] = secondary_address; /* Internal address */ + txbd->addr[0] = address << 1; /* Write data */ + txbd->addr[1] = secondary_address; /* Internal address */ txbd->status = BD_SC_READY; - } - else - { + } else { txbd->length = 1 + size_to_expect; txbd->addr[0] = (address << 1) | 0x01; txbd->status = BD_SC_READY; @@ -459,30 +441,23 @@ int i2c_receive(i2c_state_t *state, rxbd->addr = datain; txbd->status |= BD_I2C_TX_START; - if (flags & I2CF_STOP_COND) - { + if (flags & I2CF_STOP_COND) { txbd->status |= BD_SC_LAST | BD_SC_WRAP; rxbd->status |= BD_SC_WRAP; } - PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", - txbd->length, - txbd->status, - txbd->addr[0], - txbd->addr[1])); - PRINTD(("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", - rxbd->length, - rxbd->status, - rxbd->addr[0], - rxbd->addr[1])); + debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", + txbd->length, txbd->status, txbd->addr[0], txbd->addr[1]); + debug("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", + rxbd->length, rxbd->status, rxbd->addr[0], rxbd->addr[1]); /* advance state */ state->tx_buf += txbd->length; state->tx_space -= txbd->length; state->tx_idx++; - state->txbd = (void*)(txbd + 1); + state->txbd = (void *) (txbd + 1); state->rx_idx++; - state->rxbd = (void*)(rxbd + 1); + state->rxbd = (void *) (rxbd + 1); return 0; } @@ -491,27 +466,27 @@ int i2c_receive(i2c_state_t *state, static int i2c_doio(i2c_state_t *state) { - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile iic_t *iip; - volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; + volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; volatile I2C_BD *txbd, *rxbd; - int n, i, b, rxcnt = 0, rxtimeo = 0, txcnt = 0, txtimeo = 0, rc = 0; + int n, i, b, rxcnt = 0, rxtimeo = 0, txcnt = 0, txtimeo = 0, rc = 0; uint dpaddr; - PRINTD(("[I2C] i2c_doio\n")); + debug("[I2C] i2c_doio\n"); if (state->tx_idx <= 0 && state->rx_idx <= 0) { - PRINTD(("[I2C] No I/O is queued\n")); + debug("[I2C] No I/O is queued\n"); return I2CERR_QUEUE_EMPTY; } - dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE])); + dpaddr = *((unsigned short *)(&immap->im_dprambase[PROFF_I2C_BASE])); iip = (iic_t *)&immap->im_dprambase[dpaddr]; iip->iic_rbptr = iip->iic_rbase; iip->iic_tbptr = iip->iic_tbase; /* Enable I2C */ - PRINTD(("[I2C] Enabling I2C...\n")); + debug("[I2C] Enabling I2C...\n"); i2c->i2c_i2mod |= 0x01; /* Begin transmission */ @@ -519,90 +494,100 @@ int i2c_doio(i2c_state_t *state) /* Loop until transmit & receive completed */ - if ((n = state->tx_idx) > 0) { + n = state->tx_idx; + + if (n > 0) { - txbd = ((I2C_BD*)state->txbd) - n; + txbd = ((I2C_BD *) state->txbd) - n; for (i = 0; i < n; i++) { txtimeo += TOUT_LOOP * txbd->length; txbd++; } - txbd--; /* wait until last in list is done */ + txbd--; /* wait until last in list is done */ - PRINTD(("[I2C] Transmitting...(txbd=0x%08lx)\n", (ulong)txbd)); + debug("[I2C] Transmitting...(txbd=0x%08lx)\n", + (ulong) txbd); udelay(START_DELAY_US); /* give it time to start */ - while((txbd->status & BD_SC_READY) && (++txcnt < txtimeo)) { + while ((txbd->status & BD_SC_READY) && (++txcnt < txtimeo)) { udelay(DELAY_US); if (ctrlc()) - return (-1); - __asm__ __volatile__ ("eieio"); + return -1; + __asm__ __volatile__("eieio"); } } - if (txcnt < txtimeo && (n = state->rx_idx) > 0) { + n = state->rx_idx; - rxbd = ((I2C_BD*)state->rxbd) - n; + if (txcnt < txtimeo && n > 0) { + + rxbd = ((I2C_BD *) state->rxbd) - n; for (i = 0; i < n; i++) { rxtimeo += TOUT_LOOP * rxbd->length; rxbd++; } - rxbd--; /* wait until last in list is done */ + rxbd--; /* wait until last in list is done */ - PRINTD(("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong)rxbd)); + debug("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong) rxbd); udelay(START_DELAY_US); /* give it time to start */ - while((rxbd->status & BD_SC_EMPTY) && (++rxcnt < rxtimeo)) { + while ((rxbd->status & BD_SC_EMPTY) && (++rxcnt < rxtimeo)) { udelay(DELAY_US); if (ctrlc()) - return (-1); - __asm__ __volatile__ ("eieio"); + return -1; + __asm__ __volatile__("eieio"); } } /* Turn off I2C */ i2c->i2c_i2mod &= ~0x01; - if ((n = state->tx_idx) > 0) { + n = state->tx_idx; + + if (n > 0) { for (i = 0; i < n; i++) { - txbd = ((I2C_BD*)state->txbd) - (n - i); - if ((b = txbd->status & BD_I2C_TX_ERR) != 0) { + txbd = ((I2C_BD *) state->txbd) - (n - i); + b = txbd->status & BD_I2C_TX_ERR; + if (b != 0) { if (state->err_cb != NULL) - (*state->err_cb)(I2CECB_TX_ERR|b, i, - state->cb_data); + (*state->err_cb) (I2CECB_TX_ERR | b, + i, state->cb_data); if (rc == 0) rc = I2CERR_IO_ERROR; } } } - if ((n = state->rx_idx) > 0) { + n = state->rx_idx; + + if (n > 0) { for (i = 0; i < n; i++) { - rxbd = ((I2C_BD*)state->rxbd) - (n - i); - if ((b = rxbd->status & BD_I2C_RX_ERR) != 0) { + rxbd = ((I2C_BD *) state->rxbd) - (n - i); + b = rxbd->status & BD_I2C_RX_ERR; + if (b != 0) { if (state->err_cb != NULL) - (*state->err_cb)(I2CECB_RX_ERR|b, i, - state->cb_data); + (*state->err_cb) (I2CECB_RX_ERR | b, + i, state->cb_data); if (rc == 0) rc = I2CERR_IO_ERROR; } } } - if ((txtimeo > 0 && txcnt >= txtimeo) || \ + if ((txtimeo > 0 && txcnt >= txtimeo) || (rxtimeo > 0 && rxcnt >= rxtimeo)) { if (state->err_cb != NULL) - (*state->err_cb)(I2CECB_TIMEOUT, -1, state->cb_data); + (*state->err_cb) (I2CECB_TIMEOUT, -1, state->cb_data); if (rc == 0) rc = I2CERR_TIMEOUT; } - return (rc); + return rc; } -static void -i2c_probe_callback(int flags, int xnum, void *data) +static void i2c_probe_callback(int flags, int xnum, void *data) { /* * the only acceptable errors are a transmit NAK or a receive @@ -610,14 +595,13 @@ i2c_probe_callback(int flags, int xnum, void *data) * means the device must have responded to the slave address * even though the transfer failed */ - if (flags == (I2CECB_TX_ERR|I2CECB_TX_NAK)) - *(int *)data |= 1; - if (flags == (I2CECB_RX_ERR|I2CECB_RX_OV)) - *(int *)data |= 2; + if (flags == (I2CECB_TX_ERR | I2CECB_TX_NAK)) + *(int *) data |= 1; + if (flags == (I2CECB_RX_ERR | I2CECB_RX_OV)) + *(int *) data |= 2; } -int -i2c_probe(uchar chip) +int i2c_probe(uchar chip) { i2c_state_t state; int rc, err_flag; @@ -629,31 +613,31 @@ i2c_probe(uchar chip) state.cb_data = (void *) &err_flag; err_flag = 0; - rc = i2c_receive(&state, chip, 0, I2CF_START_COND|I2CF_STOP_COND, 1, buf); + rc = i2c_receive(&state, chip, 0, I2CF_START_COND | I2CF_STOP_COND, 1, + buf); if (rc != 0) - return (rc); /* probe failed */ + return rc; /* probe failed */ rc = i2c_doio(&state); if (rc == 0) - return (0); /* device exists - read succeeded */ + return 0; /* device exists - read succeeded */ if (rc == I2CERR_TIMEOUT) - return (-1); /* device does not exist - timeout */ + return -1; /* device does not exist - timeout */ if (rc != I2CERR_IO_ERROR || err_flag == 0) - return (rc); /* probe failed */ + return rc; /* probe failed */ if (err_flag & 1) - return (-1); /* device does not exist - had transmit NAK */ + return -1; /* device does not exist - had transmit NAK */ - return (0); /* device exists - had receive overrun */ + return 0; /* device exists - had receive overrun */ } -int -i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) +int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) { i2c_state_t state; uchar xaddr[4]; @@ -661,27 +645,28 @@ i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) xaddr[0] = (addr >> 24) & 0xFF; xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; + xaddr[2] = (addr >> 8) & 0xFF; + xaddr[3] = addr & 0xFF; #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW - /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address - * and the extra bits end up in the "chip address" bit slots. - * This makes a 24WC08 (1Kbyte) chip look like four 256 byte - * chips. - * - * Note that we consider the length of the address field to still - * be one byte because the extra address bits are hidden in the - * chip address. - */ + /* + * EEPROM chips that implement "address overflow" are ones + * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address + * and the extra bits end up in the "chip address" bit slots. + * This makes a 24WC08 (1Kbyte) chip look like four 256 byte + * chips. + * + * Note that we consider the length of the address field to still + * be one byte because the extra address bits are hidden in the + * chip address. + */ chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif i2c_newio(&state); - rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]); + rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, + &xaddr[4 - alen]); if (rc != 0) { printf("i2c_read: i2c_send failed (%d)\n", rc); return 1; @@ -701,8 +686,7 @@ i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) return 0; } -int -i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) +int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) { i2c_state_t state; uchar xaddr[4]; @@ -710,27 +694,28 @@ i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) xaddr[0] = (addr >> 24) & 0xFF; xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; + xaddr[2] = (addr >> 8) & 0xFF; + xaddr[3] = addr & 0xFF; #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW - /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address - * and the extra bits end up in the "chip address" bit slots. - * This makes a 24WC08 (1Kbyte) chip look like four 256 byte - * chips. - * - * Note that we consider the length of the address field to still - * be one byte because the extra address bits are hidden in the - * chip address. - */ + /* + * EEPROM chips that implement "address overflow" are ones + * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address + * and the extra bits end up in the "chip address" bit slots. + * This makes a 24WC08 (1Kbyte) chip look like four 256 byte + * chips. + * + * Note that we consider the length of the address field to still + * be one byte because the extra address bits are hidden in the + * chip address. + */ chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif i2c_newio(&state); - rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]); + rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, + &xaddr[4 - alen]); if (rc != 0) { printf("i2c_write: first i2c_send failed (%d)\n", rc); return 1; @@ -765,7 +750,7 @@ int i2c_set_bus_num(unsigned int bus) if (bus < CONFIG_SYS_MAX_I2C_BUS) { i2c_bus_num = bus; } else { - int ret; + int ret; ret = i2x_mux_select_mux(bus); if (ret == 0) @@ -781,5 +766,5 @@ int i2c_set_bus_num(unsigned int bus) return 0; } -#endif /* CONFIG_I2C_MULTI_BUS */ -#endif /* CONFIG_HARD_I2C */ +#endif /* CONFIG_I2C_MULTI_BUS */ +#endif /* CONFIG_HARD_I2C */ diff --git a/arch/powerpc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c index 0e1c2b0659..bb50dee960 100644 --- a/arch/powerpc/cpu/mpc8260/speed.c +++ b/arch/powerpc/cpu/mpc8260/speed.c @@ -110,7 +110,7 @@ int get_clocks (void) volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; ulong clkin; ulong sccr, dfbrg; - ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf; + ulong scmr, corecnf, plldf, pllmf; corecnf_t *cp; #if !defined(CONFIG_8260_CLKIN) @@ -130,9 +130,6 @@ int get_clocks (void) corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT; cp = &corecnf_tab[corecnf]; - busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT; - cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT; - /* HiP7, HiP7 Rev01, HiP7 RevA */ if ((get_pvr () == PVR_8260_HIP7) || (get_pvr () == PVR_8260_HIP7R1) || @@ -144,12 +141,6 @@ int get_clocks (void) plldf = (scmr & SCMR_PLLDF) ? 1 : 0; gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1); } -#if 0 - if (gd->vco_out / (busdf + 1) != clkin) { - /* aaarrrggghhh!!! */ - return (1); - } -#endif gd->cpm_clk = gd->vco_out / 2; gd->bus_clk = clkin; diff --git a/arch/powerpc/cpu/mpc8260/spi.c b/arch/powerpc/cpu/mpc8260/spi.c index f5d2ac35a6..dc98ea73f2 100644 --- a/arch/powerpc/cpu/mpc8260/spi.c +++ b/arch/powerpc/cpu/mpc8260/spi.c @@ -276,11 +276,9 @@ void spi_init_r (void) { volatile spi_t *spi; volatile immap_t *immr; - volatile cpm8260_t *cp; volatile cbd_t *tbdf, *rbdf; immr = (immap_t *) CONFIG_SYS_IMMR; - cp = (cpm8260_t *) &immr->im_cpm; spi = (spi_t *)&immr->im_dprambase[PROFF_SPI]; @@ -358,7 +356,6 @@ ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len) ssize_t spi_xfer (size_t count) { volatile immap_t *immr; - volatile cpm8260_t *cp; volatile spi_t *spi; cbd_t *tbdf, *rbdf; int tm; @@ -366,7 +363,6 @@ ssize_t spi_xfer (size_t count) DPRINT (("*** spi_xfer entered ***\n")); immr = (immap_t *) CONFIG_SYS_IMMR; - cp = (cpm8260_t *) &immr->im_cpm; spi = (spi_t *)&immr->im_dprambase[PROFF_SPI]; diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c index 142cfa5b98..5cbf9a688e 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu.c +++ b/arch/powerpc/cpu/mpc8xx/cpu.c @@ -40,6 +40,7 @@ #include <commproc.h> #include <netdev.h> #include <asm/cache.h> +#include <linux/compiler.h> #if defined(CONFIG_OF_LIBFDT) #include <libfdt.h> @@ -185,7 +186,7 @@ static int check_CPU (long clock, uint pvr, uint immr) uint k, m; char buf[32]; char pre = 'X'; - char *mid = "xx"; + __maybe_unused char *mid = "xx"; char *suf; /* the highest 16 bits should be 0x0050 for a 8xx */ diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c index a2d2bd6d8d..f2a2c3a736 100644 --- a/arch/powerpc/cpu/mpc8xx/fec.c +++ b/arch/powerpc/cpu/mpc8xx/fec.c @@ -378,35 +378,39 @@ static void fec_pin_init(int fecidx) { bd_t *bd = gd->bd; volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; - volatile fec_t *fecp; - - /* - * only two FECs please - */ - if ((unsigned int)fecidx >= 2) - hang(); - - if (fecidx == 0) - fecp = &immr->im_cpm.cp_fec1; - else - fecp = &immr->im_cpm.cp_fec2; /* * Set MII speed to 2.5 MHz or slightly below. - * * According to the MPC860T (Rev. D) Fast ethernet controller user - * * manual (6.2.14), - * * the MII management interface clock must be less than or equal - * * to 2.5 MHz. - * * This MDC frequency is equal to system clock / (2 * MII_SPEED). - * * Then MII_SPEED = system_clock / 2 * 2,5 MHz. + * + * According to the MPC860T (Rev. D) Fast ethernet controller user + * manual (6.2.14), + * the MII management interface clock must be less than or equal + * to 2.5 MHz. + * This MDC frequency is equal to system clock / (2 * MII_SPEED). + * Then MII_SPEED = system_clock / 2 * 2,5 MHz. * * All MII configuration is done via FEC1 registers: */ immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1; #if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2) - /* our PHYs are the limit at 2.5 MHz */ - fecp->fec_mii_speed <<= 1; + { + volatile fec_t *fecp; + + /* + * only two FECs please + */ + if ((unsigned int)fecidx >= 2) + hang(); + + if (fecidx == 0) + fecp = &immr->im_cpm.cp_fec1; + else + fecp = &immr->im_cpm.cp_fec2; + + /* our PHYs are the limit at 2.5 MHz */ + fecp->fec_mii_speed <<= 1; + } #endif #if defined(CONFIG_MPC885_FAMILY) && defined(WANT_MII) @@ -1010,11 +1014,10 @@ int fec8xx_miiphy_read(const char *devname, unsigned char addr, int fec8xx_miiphy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value) { - short rdreg; /* register working value */ #ifdef MII_DEBUG printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr); #endif - rdreg = mii_send(mk_mii_write(addr, reg, value)); + (void)mii_send(mk_mii_write(addr, reg, value)); #ifdef MII_DEBUG printf ("0x%04x\n", value); diff --git a/arch/powerpc/cpu/mpc8xx/i2c.c b/arch/powerpc/cpu/mpc8xx/i2c.c index 1ca51fddef..3e5ea3a0a2 100644 --- a/arch/powerpc/cpu/mpc8xx/i2c.c +++ b/arch/powerpc/cpu/mpc8xx/i2c.c @@ -39,9 +39,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* define to enable debug messages */ -#undef DEBUG_I2C - /* tx/rx timeout (we need the i2c early, so we don't use get_timer()) */ #define TOUT_LOOP 1000000 @@ -50,13 +47,13 @@ DECLARE_GLOBAL_DATA_PTR; #define MAX_TX_SPACE 256 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ -typedef struct I2C_BD -{ - unsigned short status; - unsigned short length; - unsigned char *addr; +typedef struct I2C_BD { + unsigned short status; + unsigned short length; + unsigned char *addr; } I2C_BD; -#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */ + +#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */ #define BD_I2C_TX_CL 0x0001 /* collision error */ #define BD_I2C_TX_UN 0x0002 /* underflow error */ @@ -65,47 +62,41 @@ typedef struct I2C_BD #define BD_I2C_RX_ERR BD_SC_OV -typedef void (*i2c_ecb_t)(int, int); /* error callback function */ +typedef void (*i2c_ecb_t) (int, int); /* error callback function */ /* This structure keeps track of the bd and buffer space usage. */ typedef struct i2c_state { - int rx_idx; /* index to next free Rx BD */ - int tx_idx; /* index to next free Tx BD */ - void *rxbd; /* pointer to next free Rx BD */ - void *txbd; /* pointer to next free Tx BD */ - int tx_space; /* number of Tx bytes left */ - unsigned char *tx_buf; /* pointer to free Tx area */ - i2c_ecb_t err_cb; /* error callback function */ + int rx_idx; /* index to next free Rx BD */ + int tx_idx; /* index to next free Tx BD */ + void *rxbd; /* pointer to next free Rx BD */ + void *txbd; /* pointer to next free Tx BD */ + int tx_space; /* number of Tx bytes left */ + unsigned char *tx_buf; /* pointer to free Tx area */ + i2c_ecb_t err_cb; /* error callback function */ } i2c_state_t; /* flags for i2c_send() and i2c_receive() */ -#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */ -#define I2CF_START_COND 0x02 /* tx: generate start condition */ -#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */ +#define I2CF_ENABLE_SECONDARY 0x01 /* secondary_address is valid */ +#define I2CF_START_COND 0x02 /* tx: generate start condition */ +#define I2CF_STOP_COND 0x04 /* tx: generate stop condition */ /* return codes */ -#define I2CERR_NO_BUFFERS 0x01 /* no more BDs or buffer space */ -#define I2CERR_MSG_TOO_LONG 0x02 /* tried to send/receive to much data */ -#define I2CERR_TIMEOUT 0x03 /* timeout in i2c_doio() */ -#define I2CERR_QUEUE_EMPTY 0x04 /* i2c_doio called without send/receive */ +#define I2CERR_NO_BUFFERS 0x01 /* no more BDs or buffer space */ +#define I2CERR_MSG_TOO_LONG 0x02 /* tried to send/receive to much data */ +#define I2CERR_TIMEOUT 0x03 /* timeout in i2c_doio() */ +#define I2CERR_QUEUE_EMPTY 0x04 /* i2c_doio called without send/receive */ /* error callback flags */ -#define I2CECB_RX_ERR 0x10 /* this is a receive error */ -#define I2CECB_RX_ERR_OV 0x02 /* receive overrun error */ -#define I2CECB_RX_MASK 0x0f /* mask for error bits */ -#define I2CECB_TX_ERR 0x20 /* this is a transmit error */ -#define I2CECB_TX_CL 0x01 /* transmit collision error */ -#define I2CECB_TX_UN 0x02 /* transmit underflow error */ -#define I2CECB_TX_NAK 0x04 /* transmit no ack error */ -#define I2CECB_TX_MASK 0x0f /* mask for error bits */ -#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */ - -#ifdef DEBUG_I2C -#define PRINTD(x) printf x -#else -#define PRINTD(x) -#endif +#define I2CECB_RX_ERR 0x10 /* this is a receive error */ +#define I2CECB_RX_ERR_OV 0x02 /* receive overrun error */ +#define I2CECB_RX_MASK 0x0f /* mask for error bits */ +#define I2CECB_TX_ERR 0x20 /* this is a transmit error */ +#define I2CECB_TX_CL 0x01 /* transmit collision error */ +#define I2CECB_TX_UN 0x02 /* transmit underflow error */ +#define I2CECB_TX_NAK 0x04 /* transmit no ack error */ +#define I2CECB_TX_MASK 0x0f /* mask for error bits */ +#define I2CECB_TIMEOUT 0x40 /* this is a timeout error */ /* * Returns the best value of I2BRG to meet desired clock speed of I2C with @@ -115,53 +106,53 @@ typedef struct i2c_state { */ static inline int i2c_roundrate(int hz, int speed, int filter, int modval, - int *brgval, int *totspeed) + int *brgval, int *totspeed) { - int moddiv = 1 << (5-(modval & 3)), brgdiv, div; + int moddiv = 1 << (5 - (modval & 3)), brgdiv, div; - PRINTD(("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n", - hz, speed, filter, modval)); + debug("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n", + hz, speed, filter, modval); - div = moddiv * speed; - brgdiv = (hz + div - 1) / div; + div = moddiv * speed; + brgdiv = (hz + div - 1) / div; - PRINTD(("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv)); + debug("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv); - *brgval = ((brgdiv + 1) / 2) - 3 - (2*filter); + *brgval = ((brgdiv + 1) / 2) - 3 - (2 * filter); - if ((*brgval < 0) || (*brgval > 255)) { - PRINTD(("\t\trejected brgval=%d\n", *brgval)); - return -1; - } + if ((*brgval < 0) || (*brgval > 255)) { + debug("\t\trejected brgval=%d\n", *brgval); + return -1; + } - brgdiv = 2 * (*brgval + 3 + (2 * filter)); - div = moddiv * brgdiv ; - *totspeed = hz / div; + brgdiv = 2 * (*brgval + 3 + (2 * filter)); + div = moddiv * brgdiv; + *totspeed = hz / div; - PRINTD(("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed)); + debug("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed); - return 0; + return 0; } /* * Sets the I2C clock predivider and divider to meet required clock speed. */ -static int -i2c_setrate (int hz, int speed) +static int i2c_setrate(int hz, int speed) { - immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile i2c8xx_t *i2c = (i2c8xx_t *) & immap->im_i2c; - int brgval, - modval, /* 0-3 */ - bestspeed_diff = speed, - bestspeed_brgval = 0, - bestspeed_modval = 0, - bestspeed_filter = 0, - totspeed, - filter = 0; /* Use this fixed value */ + int brgval, + modval, /* 0-3 */ + bestspeed_diff = speed, + bestspeed_brgval = 0, + bestspeed_modval = 0, + bestspeed_filter = 0, + totspeed, + filter = 0; /* Use this fixed value */ for (modval = 0; modval < 4; modval++) { - if (i2c_roundrate(hz,speed,filter,modval,&brgval,&totspeed) == 0) { + if (i2c_roundrate + (hz, speed, filter, modval, &brgval, &totspeed) == 0) { int diff = speed - totspeed; if ((diff >= 0) && (diff < bestspeed_diff)) { @@ -173,30 +164,31 @@ i2c_setrate (int hz, int speed) } } - PRINTD (("[I2C] Best is:\n")); - PRINTD (("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n", + debug("[I2C] Best is:\n"); + debug("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n", hz, speed, bestspeed_filter, bestspeed_modval, bestspeed_brgval, - bestspeed_diff)); + bestspeed_diff); - i2c->i2c_i2mod |= ((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3); + i2c->i2c_i2mod |= + ((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3); i2c->i2c_i2brg = bestspeed_brgval & 0xff; - PRINTD (("[I2C] i2mod=%08x i2brg=%08x\n", i2c->i2c_i2mod, - i2c->i2c_i2brg)); + debug("[I2C] i2mod=%08x i2brg=%08x\n", + i2c->i2c_i2mod, + i2c->i2c_i2brg); return 1; } -void -i2c_init(int speed, int slaveaddr) +void i2c_init(int speed, int slaveaddr) { - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm; - volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c; + volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c; volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC]; ulong rbase, tbase; volatile I2C_BD *rxbd, *txbd; @@ -219,10 +211,10 @@ i2c_init(int speed, int slaveaddr) #ifdef CONFIG_SYS_ALLOC_DPRAM dpaddr = iip->iic_rbase; if (dpaddr == 0) { - /* need to allocate dual port ram */ - dpaddr = dpram_alloc_align( - (NUM_RX_BDS * sizeof(I2C_BD)) + (NUM_TX_BDS * sizeof(I2C_BD)) + - MAX_TX_SPACE, 8); + /* need to allocate dual port ram */ + dpaddr = dpram_alloc_align((NUM_RX_BDS * sizeof(I2C_BD)) + + (NUM_TX_BDS * sizeof(I2C_BD)) + + MAX_TX_SPACE, 8); } #else dpaddr = CPM_I2C_BASE; @@ -255,25 +247,25 @@ i2c_init(int speed, int slaveaddr) * and current CPU rate (we assume sccr dfbgr field is 0; * divide BRGCLK by 1) */ - PRINTD(("[I2C] Setting rate...\n")); - i2c_setrate (gd->cpu_clk, CONFIG_SYS_I2C_SPEED) ; + debug("[I2C] Setting rate...\n"); + i2c_setrate(gd->cpu_clk, CONFIG_SYS_I2C_SPEED); /* Set I2C controller in master mode */ i2c->i2c_i2com = 0x01; /* Set SDMA bus arbitration level to 5 (SDCR) */ - immap->im_siu_conf.sc_sdcr = 0x0001 ; + immap->im_siu_conf.sc_sdcr = 0x0001; /* Initialize Tx/Rx parameters */ iip->iic_rbase = rbase; iip->iic_tbase = tbase; - rxbd = (I2C_BD *)((unsigned char *)&cp->cp_dpmem[iip->iic_rbase]); - txbd = (I2C_BD *)((unsigned char *)&cp->cp_dpmem[iip->iic_tbase]); + rxbd = (I2C_BD *) ((unsigned char *) &cp->cp_dpmem[iip->iic_rbase]); + txbd = (I2C_BD *) ((unsigned char *) &cp->cp_dpmem[iip->iic_tbase]); - PRINTD(("[I2C] rbase = %04x\n", iip->iic_rbase)); - PRINTD(("[I2C] tbase = %04x\n", iip->iic_tbase)); - PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd)); - PRINTD(("[I2C] txbd = %08x\n", (int)txbd)); + debug("[I2C] rbase = %04x\n", iip->iic_rbase); + debug("[I2C] tbase = %04x\n", iip->iic_tbase); + debug("[I2C] rxbd = %08x\n", (int)rxbd); + debug("[I2C] txbd = %08x\n", (int)txbd); /* Set big endian byte order */ iip->iic_tfcr = 0x10; @@ -286,14 +278,14 @@ i2c_init(int speed, int slaveaddr) /* * Initialize required parameters if using microcode patch. */ - iip->iic_rbptr = iip->iic_rbase; - iip->iic_tbptr = iip->iic_tbase; + iip->iic_rbptr = iip->iic_rbase; + iip->iic_tbptr = iip->iic_tbase; iip->iic_rstate = 0; iip->iic_tstate = 0; #else cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_INIT_TRX) | CPM_CR_FLG; do { - __asm__ __volatile__ ("eieio"); + __asm__ __volatile__("eieio"); } while (cp->cp_cpcr & CPM_CR_FLG); #endif @@ -302,29 +294,28 @@ i2c_init(int speed, int slaveaddr) i2c->i2c_i2cmr = 0x00; } -static void -i2c_newio(i2c_state_t *state) +static void i2c_newio(i2c_state_t *state) { - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm; volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC]; - PRINTD(("[I2C] i2c_newio\n")); + debug("[I2C] i2c_newio\n"); #ifdef CONFIG_SYS_I2C_UCODE_PATCH iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase]; #endif state->rx_idx = 0; state->tx_idx = 0; - state->rxbd = (void*)&cp->cp_dpmem[iip->iic_rbase]; - state->txbd = (void*)&cp->cp_dpmem[iip->iic_tbase]; + state->rxbd = (void *)&cp->cp_dpmem[iip->iic_rbase]; + state->txbd = (void *)&cp->cp_dpmem[iip->iic_tbase]; state->tx_space = MAX_TX_SPACE; - state->tx_buf = (uchar*)state->txbd + NUM_TX_BDS * sizeof(I2C_BD); + state->tx_buf = (uchar *)state->txbd + NUM_TX_BDS * sizeof(I2C_BD); state->err_cb = NULL; - PRINTD(("[I2C] rxbd = %08x\n", (int)state->rxbd)); - PRINTD(("[I2C] txbd = %08x\n", (int)state->txbd)); - PRINTD(("[I2C] tx_buf = %08x\n", (int)state->tx_buf)); + debug("[I2C] rxbd = %08x\n", (int)state->rxbd); + debug("[I2C] txbd = %08x\n", (int)state->txbd); + debug("[I2C] tx_buf = %08x\n", (int)state->tx_buf); /* clear the buffer memory */ memset((char *)state->tx_buf, 0, MAX_TX_SPACE); @@ -334,69 +325,71 @@ static int i2c_send(i2c_state_t *state, unsigned char address, unsigned char secondary_address, - unsigned int flags, - unsigned short size, - unsigned char *dataout) + unsigned int flags, unsigned short size, unsigned char *dataout) { volatile I2C_BD *txbd; - int i,j; + int i, j; - PRINTD(("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n", - address, secondary_address, flags, size)); + debug("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n", + address, secondary_address, flags, size); /* trying to send message larger than BD */ if (size > I2C_RXTX_LEN) - return I2CERR_MSG_TOO_LONG; + return I2CERR_MSG_TOO_LONG; /* no more free bds */ if (state->tx_idx >= NUM_TX_BDS || state->tx_space < (2 + size)) - return I2CERR_NO_BUFFERS; + return I2CERR_NO_BUFFERS; - txbd = (I2C_BD *)state->txbd; + txbd = (I2C_BD *) state->txbd; txbd->addr = state->tx_buf; - PRINTD(("[I2C] txbd = %08x\n", (int)txbd)); + debug("[I2C] txbd = %08x\n", (int)txbd); if (flags & I2CF_START_COND) { - PRINTD(("[I2C] Formatting addresses...\n")); + debug("[I2C] Formatting addresses...\n"); if (flags & I2CF_ENABLE_SECONDARY) { - txbd->length = size + 2; /* Length of msg + dest addr */ + /* Length of msg + dest addr */ + txbd->length = size + 2; + txbd->addr[0] = address << 1; txbd->addr[1] = secondary_address; i = 2; } else { - txbd->length = size + 1; /* Length of msg + dest addr */ - txbd->addr[0] = address << 1; /* Write dest addr to BD */ + /* Length of msg + dest addr */ + txbd->length = size + 1; + /* Write dest addr to BD */ + txbd->addr[0] = address << 1; i = 1; } } else { - txbd->length = size; /* Length of message */ + txbd->length = size; /* Length of message */ i = 0; } /* set up txbd */ txbd->status = BD_SC_READY; if (flags & I2CF_START_COND) - txbd->status |= BD_I2C_TX_START; + txbd->status |= BD_I2C_TX_START; if (flags & I2CF_STOP_COND) - txbd->status |= BD_SC_LAST | BD_SC_WRAP; + txbd->status |= BD_SC_LAST | BD_SC_WRAP; /* Copy data to send into buffer */ - PRINTD(("[I2C] copy data...\n")); + debug("[I2C] copy data...\n"); for(j = 0; j < size; i++, j++) - txbd->addr[i] = dataout[j]; + txbd->addr[i] = dataout[j]; - PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", - txbd->length, - txbd->status, - txbd->addr[0], - txbd->addr[1])); + debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", + txbd->length, + txbd->status, + txbd->addr[0], + txbd->addr[1]); /* advance state */ state->tx_buf += txbd->length; state->tx_space -= txbd->length; state->tx_idx++; - state->txbd = (void*)(txbd + 1); + state->txbd = (void *) (txbd + 1); return 0; } @@ -406,35 +399,35 @@ i2c_receive(i2c_state_t *state, unsigned char address, unsigned char secondary_address, unsigned int flags, - unsigned short size_to_expect, - unsigned char *datain) + unsigned short size_to_expect, unsigned char *datain) { volatile I2C_BD *rxbd, *txbd; - PRINTD(("[I2C] i2c_receive %02d %02d %02d\n", address, secondary_address, flags)); + debug("[I2C] i2c_receive %02d %02d %02d\n", + address, secondary_address, flags); /* Expected to receive too much */ if (size_to_expect > I2C_RXTX_LEN) - return I2CERR_MSG_TOO_LONG; + return I2CERR_MSG_TOO_LONG; /* no more free bds */ if (state->tx_idx >= NUM_TX_BDS || state->rx_idx >= NUM_RX_BDS - || state->tx_space < 2) - return I2CERR_NO_BUFFERS; + || state->tx_space < 2) + return I2CERR_NO_BUFFERS; - rxbd = (I2C_BD *)state->rxbd; - txbd = (I2C_BD *)state->txbd; + rxbd = (I2C_BD *) state->rxbd; + txbd = (I2C_BD *) state->txbd; - PRINTD(("[I2C] rxbd = %08x\n", (int)rxbd)); - PRINTD(("[I2C] txbd = %08x\n", (int)txbd)); + debug("[I2C] rxbd = %08x\n", (int)rxbd); + debug("[I2C] txbd = %08x\n", (int)txbd); txbd->addr = state->tx_buf; /* set up TXBD for destination address */ if (flags & I2CF_ENABLE_SECONDARY) { txbd->length = 2; - txbd->addr[0] = address << 1; /* Write data */ - txbd->addr[1] = secondary_address; /* Internal address */ + txbd->addr[0] = address << 1; /* Write data */ + txbd->addr[1] = secondary_address; /* Internal address */ txbd->status = BD_SC_READY; } else { txbd->length = 1 + size_to_expect; @@ -454,24 +447,24 @@ i2c_receive(i2c_state_t *state, rxbd->status |= BD_SC_WRAP; } - PRINTD(("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", - txbd->length, - txbd->status, - txbd->addr[0], - txbd->addr[1])); - PRINTD(("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", - rxbd->length, - rxbd->status, - rxbd->addr[0], - rxbd->addr[1])); + debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", + txbd->length, + txbd->status, + txbd->addr[0], + txbd->addr[1]); + debug("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n", + rxbd->length, + rxbd->status, + rxbd->addr[0], + rxbd->addr[1]); /* advance state */ state->tx_buf += txbd->length; state->tx_space -= txbd->length; state->tx_idx++; - state->txbd = (void*)(txbd + 1); + state->txbd = (void *) (txbd + 1); state->rx_idx++; - state->rxbd = (void*)(rxbd + 1); + state->rxbd = (void *) (rxbd + 1); return 0; } @@ -479,21 +472,21 @@ i2c_receive(i2c_state_t *state, static int i2c_doio(i2c_state_t *state) { - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm; - volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c; + volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c; volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC]; volatile I2C_BD *txbd, *rxbd; volatile int j = 0; - PRINTD(("[I2C] i2c_doio\n")); + debug("[I2C] i2c_doio\n"); #ifdef CONFIG_SYS_I2C_UCODE_PATCH iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase]; #endif if (state->tx_idx <= 0 && state->rx_idx <= 0) { - PRINTD(("[I2C] No I/O is queued\n")); + debug("[I2C] No I/O is queued\n"); return I2CERR_QUEUE_EMPTY; } @@ -501,7 +494,7 @@ static int i2c_doio(i2c_state_t *state) iip->iic_tbptr = iip->iic_tbase; /* Enable I2C */ - PRINTD(("[I2C] Enabling I2C...\n")); + debug("[I2C] Enabling I2C...\n"); i2c->i2c_i2mod |= 0x01; /* Begin transmission */ @@ -511,23 +504,29 @@ static int i2c_doio(i2c_state_t *state) if (state->tx_idx > 0) { txbd = ((I2C_BD*)state->txbd) - 1; - PRINTD(("[I2C] Transmitting...(txbd=0x%08lx)\n", (ulong)txbd)); - while((txbd->status & BD_SC_READY) && (j++ < TOUT_LOOP)) { - if (ctrlc()) { + + debug("[I2C] Transmitting...(txbd=0x%08lx)\n", + (ulong)txbd); + + while ((txbd->status & BD_SC_READY) && (j++ < TOUT_LOOP)) { + if (ctrlc()) return (-1); - } - __asm__ __volatile__ ("eieio"); + + __asm__ __volatile__("eieio"); } } if ((state->rx_idx > 0) && (j < TOUT_LOOP)) { rxbd = ((I2C_BD*)state->rxbd) - 1; - PRINTD(("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong)rxbd)); - while((rxbd->status & BD_SC_EMPTY) && (j++ < TOUT_LOOP)) { - if (ctrlc()) { + + debug("[I2C] Receiving...(rxbd=0x%08lx)\n", + (ulong)rxbd); + + while ((rxbd->status & BD_SC_EMPTY) && (j++ < TOUT_LOOP)) { + if (ctrlc()) return (-1); - } - __asm__ __volatile__ ("eieio"); + + __asm__ __volatile__("eieio"); } } @@ -544,22 +543,24 @@ static int i2c_doio(i2c_state_t *state) if ((n = state->tx_idx) > 0) { for (i = 0; i < n; i++) { - txbd = ((I2C_BD*)state->txbd) - (n - i); + txbd = ((I2C_BD *) state->txbd) - (n - i); if ((b = txbd->status & BD_I2C_TX_ERR) != 0) - (*state->err_cb)(I2CECB_TX_ERR|b, i); + (*state->err_cb) (I2CECB_TX_ERR | b, + i); } } if ((n = state->rx_idx) > 0) { for (i = 0; i < n; i++) { - rxbd = ((I2C_BD*)state->rxbd) - (n - i); + rxbd = ((I2C_BD *) state->rxbd) - (n - i); if ((b = rxbd->status & BD_I2C_RX_ERR) != 0) - (*state->err_cb)(I2CECB_RX_ERR|b, i); + (*state->err_cb) (I2CECB_RX_ERR | b, + i); } } if (j >= TOUT_LOOP) - (*state->err_cb)(I2CECB_TIMEOUT, 0); + (*state->err_cb) (I2CECB_TIMEOUT, 0); } return (j >= TOUT_LOOP) ? I2CERR_TIMEOUT : 0; @@ -567,8 +568,7 @@ static int i2c_doio(i2c_state_t *state) static int had_tx_nak; -static void -i2c_test_callback(int flags, int xnum) +static void i2c_test_callback(int flags, int xnum) { if ((flags & I2CECB_TX_ERR) && (flags & I2CECB_TX_NAK)) had_tx_nak = 1; @@ -587,7 +587,8 @@ int i2c_probe(uchar chip) state.err_cb = i2c_test_callback; had_tx_nak = 0; - rc = i2c_receive(&state, chip, 0, I2CF_START_COND|I2CF_STOP_COND, 1, buf); + rc = i2c_receive(&state, chip, 0, I2CF_START_COND | I2CF_STOP_COND, 1, + buf); if (rc != 0) return (rc); @@ -612,8 +613,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) xaddr[0] = (addr >> 24) & 0xFF; xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; + xaddr[2] = (addr >> 8) & 0xFF; + xaddr[3] = addr & 0xFF; #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW /* @@ -626,12 +627,13 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) * be one byte because the extra address bits are hidden in the * chip address. */ - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); + chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif i2c_newio(&state); - rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]); + rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, + &xaddr[4 - alen]); if (rc != 0) { printf("i2c_read: i2c_send failed (%d)\n", rc); return 1; @@ -659,8 +661,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) xaddr[0] = (addr >> 24) & 0xFF; xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; + xaddr[2] = (addr >> 8) & 0xFF; + xaddr[3] = addr & 0xFF; #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW /* @@ -673,12 +675,13 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) * be one byte because the extra address bits are hidden in the * chip address. */ - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); + chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif i2c_newio(&state); - rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, &xaddr[4-alen]); + rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen, + &xaddr[4 - alen]); if (rc != 0) { printf("i2c_write: first i2c_send failed (%d)\n", rc); return 1; @@ -698,4 +701,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return 0; } -#endif /* CONFIG_HARD_I2C */ +#endif /* CONFIG_HARD_I2C */ diff --git a/arch/powerpc/cpu/mpc8xx/spi.c b/arch/powerpc/cpu/mpc8xx/spi.c index b2ac23e5ea..db34852d60 100644 --- a/arch/powerpc/cpu/mpc8xx/spi.c +++ b/arch/powerpc/cpu/mpc8xx/spi.c @@ -139,14 +139,10 @@ void spi_init_f (void) volatile spi_t *spi; volatile immap_t *immr; - volatile cpic8xx_t *cpi; volatile cpm8xx_t *cp; - volatile iop8xx_t *iop; volatile cbd_t *tbdf, *rbdf; immr = (immap_t *) CONFIG_SYS_IMMR; - cpi = (cpic8xx_t *)&immr->im_cpic; - iop = (iop8xx_t *) &immr->im_ioport; cp = (cpm8xx_t *) &immr->im_cpm; #ifdef CONFIG_SYS_SPI_UCODE_PATCH diff --git a/arch/powerpc/lib/bat_rw.c b/arch/powerpc/lib/bat_rw.c index c48c240151..113c293c03 100644 --- a/arch/powerpc/lib/bat_rw.c +++ b/arch/powerpc/lib/bat_rw.c @@ -26,6 +26,7 @@ #include <asm/processor.h> #include <asm/mmu.h> #include <asm/io.h> +#include <linux/compiler.h> #ifdef CONFIG_ADDR_MAP #include <addr_map.h> @@ -35,7 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) { - int batn = -1; + __maybe_unused int batn = -1; sync(); diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 3a1b3756e1..ff5888e4cc 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000-2010 + * (C) Copyright 2000-2011 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -88,7 +88,7 @@ #endif #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE -extern int update_flash_size (int flash_size); +extern int update_flash_size(int flash_size); #endif #if defined(CONFIG_SC3) @@ -96,7 +96,7 @@ extern void sc3_read_eeprom(void); #endif #if defined(CONFIG_CMD_DOC) -void doc_init (void); +void doc_init(void); #endif #if defined(CONFIG_HARD_I2C) || \ defined(CONFIG_SOFT_I2C) @@ -130,9 +130,8 @@ ulong monitor_flash_len; #include <bedbug/type.h> #endif -/************************************************************************ - * Utilities * - ************************************************************************ +/* + * Utilities */ /* @@ -147,16 +146,16 @@ ulong monitor_flash_len; * argument, and returns an integer return code, where 0 means * "continue" and != 0 means "fatal error, hang the system". */ -typedef int (init_fnc_t) (void); +typedef int (init_fnc_t)(void); -/************************************************************************ - * Init Utilities * - ************************************************************************ +/* + * Init Utilities + * * Some of this code should be moved into the core functions, * but let's get it working (again) first... */ -static int init_baudrate (void) +static int init_baudrate(void) { gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); return 0; @@ -168,7 +167,9 @@ void __board_add_ram_info(int use_default) { /* please define platform specific board_add_ram_info() */ } -void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info"))); + +void board_add_ram_info(int) + __attribute__ ((weak, alias("__board_add_ram_info"))); int __board_flash_wp_on(void) { @@ -179,80 +180,86 @@ int __board_flash_wp_on(void) */ return 0; } -int board_flash_wp_on(void) __attribute__((weak, alias("__board_flash_wp_on"))); + +int board_flash_wp_on(void) + __attribute__ ((weak, alias("__board_flash_wp_on"))); void __cpu_secondary_init_r(void) { } + void cpu_secondary_init_r(void) -__attribute__((weak, alias("__cpu_secondary_init_r"))); + __attribute__ ((weak, alias("__cpu_secondary_init_r"))); -static int init_func_ram (void) +static int init_func_ram(void) { #ifdef CONFIG_BOARD_TYPES int board_type = gd->board_type; #else int board_type = 0; /* use dummy arg */ #endif - puts ("DRAM: "); + puts("DRAM: "); - if ((gd->ram_size = initdram (board_type)) > 0) { - print_size (gd->ram_size, ""); + gd->ram_size = initdram(board_type); + + if (gd->ram_size > 0) { + print_size(gd->ram_size, ""); board_add_ram_info(0); putc('\n'); - return (0); + return 0; } - puts (failed); - return (1); + puts(failed); + return 1; } /***********************************************************************/ #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) -static int init_func_i2c (void) +static int init_func_i2c(void) { - puts ("I2C: "); - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - puts ("ready\n"); - return (0); + puts("I2C: "); + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + puts("ready\n"); + return 0; } #endif #if defined(CONFIG_HARD_SPI) -static int init_func_spi (void) +static int init_func_spi(void) { - puts ("SPI: "); - spi_init (); - puts ("ready\n"); - return (0); + puts("SPI: "); + spi_init(); + puts("ready\n"); + return 0; } #endif /***********************************************************************/ #if defined(CONFIG_WATCHDOG) -static int init_func_watchdog_init (void) +static int init_func_watchdog_init(void) { - puts (" Watchdog enabled\n"); - WATCHDOG_RESET (); - return (0); + puts(" Watchdog enabled\n"); + WATCHDOG_RESET(); + return 0; } -# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, -static int init_func_watchdog_reset (void) +#define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, + +static int init_func_watchdog_reset(void) { - WATCHDOG_RESET (); - return (0); + WATCHDOG_RESET(); + return 0; } -# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset, + +#define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset, #else -# define INIT_FUNC_WATCHDOG_INIT /* undef */ -# define INIT_FUNC_WATCHDOG_RESET /* undef */ +#define INIT_FUNC_WATCHDOG_INIT /* undef */ +#define INIT_FUNC_WATCHDOG_RESET /* undef */ #endif /* CONFIG_WATCHDOG */ -/************************************************************************ - * Initialization sequence * - ************************************************************************ +/* + * Initialization sequence */ init_fnc_t *init_sequence[] = { @@ -280,8 +287,10 @@ init_fnc_t *init_sequence[] = { #endif env_init, #if defined(CONFIG_8xx_CPUCLK_DEFAULT) - get_clocks_866, /* get CPU and bus clocks according to the environment variable */ - sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ + /* get CPU and bus clocks according to the environment variable */ + get_clocks_866, + /* adjust sdram refresh rate according to the new clock */ + sdram_adjust_866, init_timebase, #endif init_baudrate, @@ -317,14 +326,12 @@ init_fnc_t *init_sequence[] = { #ifdef CONFIG_POST post_init_f, #endif - INIT_FUNC_WATCHDOG_RESET - init_func_ram, + INIT_FUNC_WATCHDOG_RESET init_func_ram, #if defined(CONFIG_SYS_DRAM_TEST) testdram, #endif /* CONFIG_SYS_DRAM_TEST */ INIT_FUNC_WATCHDOG_RESET - - NULL, /* Terminate this list */ + NULL, /* Terminate this list */ }; ulong get_effective_memsize(void) @@ -334,12 +341,11 @@ ulong get_effective_memsize(void) #else /* limit stack to what we can reasonable map */ return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? - CONFIG_MAX_MEM_MAPPED : gd->ram_size); + CONFIG_MAX_MEM_MAPPED : gd->ram_size); #endif } -/************************************************************************ - * +/* * This is the first part of the initialization sequence that is * implemented in C, but still running from ROM. * @@ -350,8 +356,6 @@ ulong get_effective_memsize(void) * * Be aware of the restrictions: global data is read-only, BSS is not * initialized, and stack space is limited to a few kB. - * - ************************************************************************ */ #ifdef CONFIG_LOGBUFFER @@ -361,13 +365,14 @@ unsigned long logbuffer_base(void) } #endif -void board_init_f (ulong bootflag) +void board_init_f(ulong bootflag) { bd_t *bd; ulong len, addr, addr_sp; ulong *s; gd_t *id; init_fnc_t **init_fnc_ptr; + #ifdef CONFIG_PRAM ulong reg; #endif @@ -375,20 +380,18 @@ void board_init_f (ulong bootflag) /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); /* compiler optimization barrier needed for GCC >= 3.4 */ - __asm__ __volatile__("": : :"memory"); + __asm__ __volatile__("":::"memory"); #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ !defined(CONFIG_MPC86xx) /* Clear initial global data */ - memset ((void *) gd, 0, sizeof (gd_t)); + memset((void *) gd, 0, sizeof(gd_t)); #endif - for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { - if ((*init_fnc_ptr) () != 0) { - hang (); - } - } + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) + if ((*init_fnc_ptr) () != 0) + hang(); #ifdef CONFIG_POST post_bootmode_init(); @@ -432,7 +435,7 @@ void board_init_f (ulong bootflag) */ if (addr > determine_mp_bootpg()) { addr = determine_mp_bootpg(); - debug ("Reserving MP boot page to %08lx\n", addr); + debug("Reserving MP boot page to %08lx\n", addr); } #endif @@ -440,7 +443,8 @@ void board_init_f (ulong bootflag) #ifndef CONFIG_ALT_LB_ADDR /* reserve kernel log buffer */ addr -= (LOGBUFF_RESERVE); - debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); + debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, + addr); #endif #endif @@ -449,27 +453,27 @@ void board_init_f (ulong bootflag) * reserve protected RAM */ reg = getenv_ulong("pram", 10, CONFIG_PRAM); - addr -= (reg << 10); /* size is in kB */ + addr -= (reg << 10); /* size is in kB */ debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr); #endif /* CONFIG_PRAM */ /* round down to next 4 kB limit */ addr &= ~(4096 - 1); - debug ("Top of RAM usable for U-Boot at: %08lx\n", addr); + debug("Top of RAM usable for U-Boot at: %08lx\n", addr); #ifdef CONFIG_LCD #ifdef CONFIG_FB_ADDR gd->fb_base = CONFIG_FB_ADDR; #else /* reserve memory for LCD display (always full pages) */ - addr = lcd_setmem (addr); + addr = lcd_setmem(addr); gd->fb_base = addr; #endif /* CONFIG_FB_ADDR */ #endif /* CONFIG_LCD */ #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) /* reserve memory for video display (always full pages) */ - addr = video_setmem (addr); + addr = video_setmem(addr); gd->fb_base = addr; #endif /* CONFIG_VIDEO */ @@ -484,29 +488,29 @@ void board_init_f (ulong bootflag) addr &= ~(65536 - 1); #endif - debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); + debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); /* * reserve memory for malloc() arena */ addr_sp = addr - TOTAL_MALLOC_LEN; - debug ("Reserving %dk for malloc() at: %08lx\n", - TOTAL_MALLOC_LEN >> 10, addr_sp); + debug("Reserving %dk for malloc() at: %08lx\n", + TOTAL_MALLOC_LEN >> 10, addr_sp); /* * (permanently) allocate a Board Info struct * and a permanent copy of the "global" data */ - addr_sp -= sizeof (bd_t); + addr_sp -= sizeof(bd_t); bd = (bd_t *) addr_sp; memset(bd, 0, sizeof(bd_t)); gd->bd = bd; - debug ("Reserving %zu Bytes for Board Info at: %08lx\n", - sizeof (bd_t), addr_sp); - addr_sp -= sizeof (gd_t); + debug("Reserving %zu Bytes for Board Info at: %08lx\n", + sizeof(bd_t), addr_sp); + addr_sp -= sizeof(gd_t); id = (gd_t *) addr_sp; - debug ("Reserving %zu Bytes for Global Data at: %08lx\n", - sizeof (gd_t), addr_sp); + debug("Reserving %zu Bytes for Global Data at: %08lx\n", + sizeof(gd_t), addr_sp); /* * Finally, we set up a new (bigger) stack. @@ -516,22 +520,22 @@ void board_init_f (ulong bootflag) */ addr_sp -= 16; addr_sp &= ~0xF; - s = (ulong *)addr_sp; + s = (ulong *) addr_sp; *s-- = 0; *s-- = 0; - addr_sp = (ulong)s; - debug ("Stack Pointer at: %08lx\n", addr_sp); + addr_sp = (ulong) s; + debug("Stack Pointer at: %08lx\n", addr_sp); /* * Save local variables to board info struct */ - bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */ - bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */ + bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ + bd->bi_memsize = gd->ram_size; /* size in bytes */ #ifdef CONFIG_SYS_SRAM_BASE - bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM memory */ - bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM memory */ + bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ + bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ #endif #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ @@ -546,33 +550,34 @@ void board_init_f (ulong bootflag) #endif #if defined(CONFIG_MPC8220) bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ - bd->bi_inpfreq = gd->inp_clk; - bd->bi_pcifreq = gd->pci_clk; - bd->bi_vcofreq = gd->vco_clk; - bd->bi_pevfreq = gd->pev_clk; - bd->bi_flbfreq = gd->flb_clk; + bd->bi_inpfreq = gd->inp_clk; + bd->bi_pcifreq = gd->pci_clk; + bd->bi_vcofreq = gd->vco_clk; + bd->bi_pevfreq = gd->pev_clk; + bd->bi_flbfreq = gd->flb_clk; /* store bootparam to sram (backward compatible), here? */ { - u32 *sram = (u32 *)CONFIG_SYS_SRAM_BASE; + u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE; + *sram++ = gd->ram_size; *sram++ = gd->bus_clk; *sram++ = gd->inp_clk; *sram++ = gd->cpu_clk; *sram++ = gd->vco_clk; *sram++ = gd->flb_clk; - *sram++ = 0xb8c3ba11; /* boot signature */ + *sram++ = 0xb8c3ba11; /* boot signature */ } #endif - WATCHDOG_RESET (); + WATCHDOG_RESET(); bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ #if defined(CONFIG_CPM2) bd->bi_cpmfreq = gd->cpm_clk; bd->bi_brgfreq = gd->brg_clk; bd->bi_sccfreq = gd->scc_clk; - bd->bi_vco = gd->vco_out; + bd->bi_vco = gd->vco_out; #endif /* CONFIG_CPM2 */ #if defined(CONFIG_MPC512X) bd->bi_ipsfreq = gd->ips_clk; @@ -584,50 +589,46 @@ void board_init_f (ulong bootflag) bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ #ifdef CONFIG_SYS_EXTBDINFO - strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); - strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version)); + strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); + strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, + sizeof(bd->bi_r_version)); bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ bd->bi_plb_busfreq = gd->bus_clk; #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) - bd->bi_pci_busfreq = get_PCI_freq (); - bd->bi_opbfreq = get_OPB_freq (); + bd->bi_pci_busfreq = get_PCI_freq(); + bd->bi_opbfreq = get_OPB_freq(); #elif defined(CONFIG_XILINX_405) - bd->bi_pci_busfreq = get_PCI_freq (); + bd->bi_pci_busfreq = get_PCI_freq(); #endif #endif - debug ("New Stack Pointer is: %08lx\n", addr_sp); + debug("New Stack Pointer is: %08lx\n", addr_sp); - WATCHDOG_RESET (); + WATCHDOG_RESET(); - gd->relocaddr = addr; /* Record relocation address, useful for debug */ + gd->relocaddr = addr; /* Store relocation addr, useful for debug */ - memcpy (id, (void *)gd, sizeof (gd_t)); + memcpy(id, (void *) gd, sizeof(gd_t)); - relocate_code (addr_sp, id, addr); + relocate_code(addr_sp, id, addr); /* NOTREACHED - relocate_code() does not return */ } -/************************************************************************ - * +/* * This is the next part if the initialization sequence: we are now * running from RAM and have a "normal" C environment, i. e. global * data can be written, BSS has been cleared, the stack size in not * that critical any more, etc. - * - ************************************************************************ */ -void board_init_r (gd_t *id, ulong dest_addr) +void board_init_r(gd_t *id, ulong dest_addr) { bd_t *bd; ulong malloc_start; -#if defined(CONFIG_SYS_FLASH_CHECKSUM) || defined(CONFIG_CMD_NET) - char *s; -#endif + #ifndef CONFIG_SYS_NO_FLASH ulong flash_size; #endif @@ -663,38 +664,38 @@ void board_init_r (gd_t *id, ulong dest_addr) serial_initialize(); #endif - debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr); + debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr); - WATCHDOG_RESET (); + WATCHDOG_RESET(); /* * Setup trap handlers */ - trap_init (dest_addr); + trap_init(dest_addr); #ifdef CONFIG_ADDR_MAP init_addr_map(); #endif #if defined(CONFIG_BOARD_EARLY_INIT_R) - board_early_init_r (); + board_early_init_r(); #endif monitor_flash_len = (ulong)&__init_end - dest_addr; - WATCHDOG_RESET (); + WATCHDOG_RESET(); #ifdef CONFIG_LOGBUFFER - logbuff_init_ptrs (); + logbuff_init_ptrs(); #endif #ifdef CONFIG_POST - post_output_backlog (); + post_output_backlog(); #endif WATCHDOG_RESET(); #if defined(CONFIG_SYS_DELAYED_ICACHE) - icache_enable (); /* it's time to enable the instruction cache */ + icache_enable(); /* it's time to enable the instruction cache */ #endif #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) @@ -706,85 +707,89 @@ void board_init_r (gd_t *id, ulong dest_addr) * Do early PCI configuration _before_ the flash gets initialised, * because PCU ressources are crucial for flash access on some boards. */ - pci_init (); + pci_init(); #endif #if defined(CONFIG_WINBOND_83C553) /* * Initialise the ISA bridge */ - initialise_w83c553f (); + initialise_w83c553f(); #endif - asm ("sync ; isync"); + asm("sync ; isync"); - mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN); + mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN); #if !defined(CONFIG_SYS_NO_FLASH) - puts ("Flash: "); + puts("Flash: "); if (board_flash_wp_on()) { printf("Uninitialized - Write Protect On\n"); /* Since WP is on, we can't find real size. Set to 0 */ flash_size = 0; - } else if ((flash_size = flash_init ()) > 0) { -# ifdef CONFIG_SYS_FLASH_CHECKSUM + } else if ((flash_size = flash_init()) > 0) { +#ifdef CONFIG_SYS_FLASH_CHECKSUM char *s; - print_size (flash_size, ""); + print_size(flash_size, ""); /* * Compute and print flash CRC if flashchecksum is set to 'y' * * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX */ - s = getenv ("flashchecksum"); + s = getenv("flashchecksum"); if (s && (*s == 'y')) { - printf (" CRC: %08X", - crc32 (0, (const unsigned char *) CONFIG_SYS_FLASH_BASE, flash_size) - ); + printf(" CRC: %08X", + crc32(0, + (const unsigned char *) + CONFIG_SYS_FLASH_BASE, flash_size) + ); } - putc ('\n'); -# else /* !CONFIG_SYS_FLASH_CHECKSUM */ - print_size (flash_size, "\n"); -# endif /* CONFIG_SYS_FLASH_CHECKSUM */ + putc('\n'); +#else /* !CONFIG_SYS_FLASH_CHECKSUM */ + print_size(flash_size, "\n"); +#endif /* CONFIG_SYS_FLASH_CHECKSUM */ } else { - puts (failed); - hang (); + puts(failed); + hang(); } - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; /* update start of FLASH memory */ - bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */ + /* update start of FLASH memory */ + bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; + /* size of FLASH memory (final value) */ + bd->bi_flashsize = flash_size; #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE) /* Make a update of the Memctrl. */ - update_flash_size (flash_size); + update_flash_size(flash_size); #endif -# if defined(CONFIG_OXC) || defined(CONFIG_RMU) +#if defined(CONFIG_OXC) || defined(CONFIG_RMU) /* flash mapped at end of memory map */ bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size; -# elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE - bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */ -# endif +#elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE + bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */ +#endif #endif /* !CONFIG_SYS_NO_FLASH */ - WATCHDOG_RESET (); + WATCHDOG_RESET(); /* initialize higher level parts of CPU like time base and timers */ - cpu_init_r (); + cpu_init_r(); - WATCHDOG_RESET (); + WATCHDOG_RESET(); #ifdef CONFIG_SPI -# if !defined(CONFIG_ENV_IS_IN_EEPROM) - spi_init_f (); -# endif - spi_init_r (); +#if !defined(CONFIG_ENV_IS_IN_EEPROM) + spi_init_f(); +#endif + spi_init_r(); #endif #if defined(CONFIG_CMD_NAND) - WATCHDOG_RESET (); - puts ("NAND: "); + WATCHDOG_RESET(); + puts("NAND: "); nand_init(); /* go init the NAND */ #endif @@ -794,13 +799,13 @@ void board_init_r (gd_t *id, ulong dest_addr) * Thus It is required that operations like pin multiplexer * be put in board_init. */ - WATCHDOG_RESET (); - puts ("MMC: "); - mmc_initialize (bd); + WATCHDOG_RESET(); + puts("MMC: "); + mmc_initialize(bd); #endif /* relocate environment function pointers etc. */ - env_relocate (); + env_relocate(); /* * after non-volatile devices & environment is setup and cpu code have @@ -826,21 +831,22 @@ void board_init_r (gd_t *id, ulong dest_addr) * "i2cfast" into account */ { - char *s = getenv ("i2cfast"); + char *s = getenv("i2cfast"); + if (s && ((*s == 'y') || (*s == 'Y'))) { bd->bi_iic_fast[0] = 1; bd->bi_iic_fast[1] = 1; } } -#endif /* CONFIG_I2CFAST */ -#endif /* CONFIG_405GP, CONFIG_405EP */ -#endif /* CONFIG_SYS_EXTBDINFO */ +#endif /* CONFIG_I2CFAST */ +#endif /* CONFIG_405GP, CONFIG_405EP */ +#endif /* CONFIG_SYS_EXTBDINFO */ #if defined(CONFIG_SC3) sc3_read_eeprom(); #endif -#if defined (CONFIG_ID_EEPROM) || defined (CONFIG_SYS_I2C_MAC_OFFSET) +#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET) mac_read_from_eeprom(); #endif @@ -872,60 +878,60 @@ void board_init_r (gd_t *id, ulong dest_addr) #endif /* CONFIG_CMD_NET */ /* IP Address */ - bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); + bd->bi_ip_addr = getenv_IPaddr("ipaddr"); - WATCHDOG_RESET (); + WATCHDOG_RESET(); #if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT) /* * Do pci configuration */ - pci_init (); + pci_init(); #endif /** leave this here (after malloc(), environment and PCI are working) **/ /* Initialize stdio devices */ - stdio_init (); + stdio_init(); /* Initialize the jump table for applications */ - jumptable_init (); + jumptable_init(); #if defined(CONFIG_API) /* Initialize API */ - api_init (); + api_init(); #endif /* Initialize the console (after the relocation and devices init) */ - console_init_r (); + console_init_r(); #if defined(CONFIG_MISC_INIT_R) /* miscellaneous platform dependent initialisations */ - misc_init_r (); + misc_init_r(); #endif #ifdef CONFIG_HERMES if (bd->bi_ethspeed != 0xFFFF) - hermes_start_lxt980 ((int) bd->bi_ethspeed); + hermes_start_lxt980((int) bd->bi_ethspeed); #endif #if defined(CONFIG_CMD_KGDB) - WATCHDOG_RESET (); - puts ("KGDB: "); - kgdb_init (); + WATCHDOG_RESET(); + puts("KGDB: "); + kgdb_init(); #endif - debug ("U-Boot relocated to %08lx\n", dest_addr); + debug("U-Boot relocated to %08lx\n", dest_addr); /* * Enable Interrupts */ - interrupt_init (); + interrupt_init(); #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) - status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING); + status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING); #endif - udelay (20); + udelay(20); /* Initialize from environment */ load_addr = getenv_ulong("loadaddr", 16, load_addr); @@ -938,74 +944,74 @@ void board_init_r (gd_t *id, ulong dest_addr) } #endif - WATCHDOG_RESET (); + WATCHDOG_RESET(); #if defined(CONFIG_CMD_SCSI) - WATCHDOG_RESET (); - puts ("SCSI: "); - scsi_init (); + WATCHDOG_RESET(); + puts("SCSI: "); + scsi_init(); #endif #if defined(CONFIG_CMD_DOC) - WATCHDOG_RESET (); - puts ("DOC: "); - doc_init (); + WATCHDOG_RESET(); + puts("DOC: "); + doc_init(); #endif #ifdef CONFIG_BITBANGMII bb_miiphy_init(); #endif #if defined(CONFIG_CMD_NET) - WATCHDOG_RESET (); - puts ("Net: "); - eth_initialize (bd); + WATCHDOG_RESET(); + puts("Net: "); + eth_initialize(bd); #endif #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R) - WATCHDOG_RESET (); - debug ("Reset Ethernet PHY\n"); - reset_phy (); + WATCHDOG_RESET(); + debug("Reset Ethernet PHY\n"); + reset_phy(); #endif #ifdef CONFIG_POST - post_run (NULL, POST_RAM | post_bootmode_get(0)); + post_run(NULL, POST_RAM | post_bootmode_get(0)); #endif #if defined(CONFIG_CMD_PCMCIA) \ && !defined(CONFIG_CMD_IDE) - WATCHDOG_RESET (); - puts ("PCMCIA:"); - pcmcia_init (); + WATCHDOG_RESET(); + puts("PCMCIA:"); + pcmcia_init(); #endif #if defined(CONFIG_CMD_IDE) - WATCHDOG_RESET (); -# ifdef CONFIG_IDE_8xx_PCCARD - puts ("PCMCIA:"); -# else - puts ("IDE: "); + WATCHDOG_RESET(); +#ifdef CONFIG_IDE_8xx_PCCARD + puts("PCMCIA:"); +#else + puts("IDE: "); #endif #if defined(CONFIG_START_IDE) if (board_start_ide()) - ide_init (); + ide_init(); #else - ide_init (); + ide_init(); #endif #endif #ifdef CONFIG_LAST_STAGE_INIT - WATCHDOG_RESET (); + WATCHDOG_RESET(); /* * Some parts can be only initialized if all others (like * Interrupts) are up and running (i.e. the PC-style ISA * keyboard). */ - last_stage_init (); + last_stage_init(); #endif #if defined(CONFIG_CMD_BEDBUG) - WATCHDOG_RESET (); - bedbug_init (); + WATCHDOG_RESET(); + bedbug_init(); #endif #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER) @@ -1023,46 +1029,49 @@ void board_init_r (gd_t *id, ulong dest_addr) #ifdef CONFIG_LOGBUFFER #ifndef CONFIG_ALT_LB_ADDR /* Also take the logbuffer into account (pram is in kB) */ - pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024; + pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024; #endif #endif - sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram); - setenv ("mem", (char *)memsz); + sprintf((char *) memsz, "%ldk", + (bd->bi_memsize / 1024) - pram); + setenv("mem", (char *) memsz); } #endif #ifdef CONFIG_PS2KBD - puts ("PS/2: "); + puts("PS/2: "); kbd_init(); #endif #ifdef CONFIG_MODEM_SUPPORT - { - extern int do_mdm_init; - do_mdm_init = gd->do_mdm_init; - } + { + extern int do_mdm_init; + + do_mdm_init = gd->do_mdm_init; + } #endif /* Initialization complete - start the monitor */ /* main_loop() can return to retry autoboot, if so just run it again. */ for (;;) { - WATCHDOG_RESET (); - main_loop (); + WATCHDOG_RESET(); + main_loop(); } /* NOTREACHED - no way out of command loop except booting */ } -void hang (void) +void hang(void) { - puts ("### ERROR ### Please RESET the board ###\n"); + puts("### ERROR ### Please RESET the board ###\n"); show_boot_progress(-30); - for (;;); + for (;;) + ; } -#if 0 /* We could use plain global data, but the resulting code is bigger */ +#if 0 /* We could use plain global data, but the resulting code is bigger */ /* * Pointer to initial global data area * @@ -1070,7 +1079,8 @@ void hang (void) */ #undef XTRN_DECLARE_GLOBAL_DATA_PTR #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ -DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); -#endif /* 0 */ +DECLARE_GLOBAL_DATA_PTR = + (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); +#endif /* 0 */ /************************************************************************/ diff --git a/board/BuS/EB+MCF-EV123/config.mk b/board/BuS/EB+MCF-EV123/config.mk index 50185aead6..18fb84eb3b 100644 --- a/board/BuS/EB+MCF-EV123/config.mk +++ b/board/BuS/EB+MCF-EV123/config.mk @@ -22,7 +22,6 @@ # MA 02111-1307 USA # -sinclude $(OBJTREE)/board/$(BOARDDIR)/textbase.mk ifndef CONFIG_SYS_TEXT_BASE CONFIG_SYS_TEXT_BASE = 0xFE000000 endif diff --git a/board/BuS/EB+MCF-EV123/textbase.mk b/board/BuS/EB+MCF-EV123/textbase.mk deleted file mode 100644 index b97c034b21..0000000000 --- a/board/BuS/EB+MCF-EV123/textbase.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0xFFE00000 diff --git a/board/alaska/flash.c b/board/alaska/flash.c index aed3b6f59c..977822ac51 100644 --- a/board/alaska/flash.c +++ b/board/alaska/flash.c @@ -406,7 +406,7 @@ static unsigned char same_chip_banks (int bank1, int bank2) int flash_erase (flash_info_t * info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0, intel = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -444,7 +444,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) } start = get_timer (0); - last = start; /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -501,6 +500,9 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf (" done\n"); } } + if (flag) + enable_interrupts(); + return rcode; } @@ -666,7 +668,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) { FPWV *addr = (FPWV *) dest; ulong start; - int flag; + int flag, rc = 0; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -685,14 +687,18 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) /* wait while polling the status register */ while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) { if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (1); + rc = 1; + goto OUT; } } - *addr = (FPW) 0x00FF00FF; /* restore read mode */ +OUT: + *addr = (FPW)0x00FF00FF; /* restore read mode */ - return (0); + if (flag) + enable_interrupts(); + + return rc; } /*----------------------------------------------------------------------- @@ -706,7 +712,7 @@ static int write_data_block (flash_info_t * info, ulong src, ulong dest) FPWV *srcaddr = (FPWV *) src; FPWV *dstaddr = (FPWV *) dest; ulong start; - int flag, i; + int flag, i, rc = 0; /* Check if Flash is (sufficiently) erased */ for (i = 0; i < WR_BLOCK; i++) @@ -727,10 +733,10 @@ static int write_data_block (flash_info_t * info, ulong src, ulong dest) start = get_timer (0); /* wait while polling the status register */ - while ((*dstaddr & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *dstaddr = (FPW) 0x00FF00FF; /* restore read mode */ - return (1); + while ((*dstaddr & (FPW)0x00800080) != (FPW)0x00800080) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { + rc = 1; + goto OUT; } } @@ -752,9 +758,12 @@ static int write_data_block (flash_info_t * info, ulong src, ulong dest) } } - *dstaddr = (FPW) 0x00FF00FF; /* restore read mode */ +OUT: + *dstaddr = (FPW)0x00FF00FF; /* restore read mode */ + if (flag) + enable_interrupts(); - return (0); + return rc; } /*----------------------------------------------------------------------- diff --git a/board/c2mon/pcmcia.c b/board/c2mon/pcmcia.c index c833b20b7b..2267829039 100644 --- a/board/c2mon/pcmcia.c +++ b/board/c2mon/pcmcia.c @@ -199,7 +199,6 @@ int pcmcia_hardware_disable(int slot) int pcmcia_voltage_set(int slot, int vcc, int vpp) { volatile immap_t *immap; - volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; u_long reg; ushort sreg; @@ -210,12 +209,11 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10); immap = (immap_t *)CONFIG_SYS_IMMR; - cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); /* - * Disable PCMCIA buffers (isolate the interface) - * and assert RESET signal - */ + * Disable PCMCIA buffers (isolate the interface) + * and assert RESET signal + */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = PCMCIA_PGCRX(_slot_); reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ diff --git a/board/cogent/flash.c b/board/cogent/flash.c index e6c85b6d9a..ec3f94d2d5 100644 --- a/board/cogent/flash.c +++ b/board/cogent/flash.c @@ -23,6 +23,7 @@ #include <common.h> #include <board/cogent/flash.h> +#include <linux/compiler.h> flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ @@ -292,7 +293,7 @@ flash_init(void) { unsigned long total; int i; - flash_info_t *fip; + __maybe_unused flash_info_t *fip; /* Init: no FLASHes known */ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { diff --git a/board/eltec/mhpc/flash.c b/board/eltec/mhpc/flash.c index 2fbdb27718..88313287f9 100644 --- a/board/eltec/mhpc/flash.c +++ b/board/eltec/mhpc/flash.c @@ -311,7 +311,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp; FPW data; - int count, i, l, rc, port_width; + int i, l, rc, port_width; if (info->flash_id == FLASH_UNKNOWN) { return 4; @@ -330,9 +330,9 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) */ if ((l = addr - wp) != 0) { data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { + for (i=0, cp=wp; i<l; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } + for (; i<port_width && cnt>0; ++i) { data = (data << 8) | *src++; --cnt; @@ -351,7 +351,6 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) /* * handle word aligned part */ - count = 0; while (cnt >= port_width) { data = 0; for (i=0; i<port_width; ++i) { diff --git a/board/ep82xxm/ep82xxm.c b/board/ep82xxm/ep82xxm.c index c1d6e9100b..182cabca14 100644 --- a/board/ep82xxm/ep82xxm.c +++ b/board/ep82xxm/ep82xxm.c @@ -31,6 +31,7 @@ #include <pci.h> #endif #include <miiphy.h> +#include <linux/compiler.h> /* * I/O Port configuration table @@ -230,8 +231,8 @@ phys_size_t initdram(int board_type) uint psdmr = CONFIG_SYS_PSDMR; int i; - unsigned char ramtmp; unsigned char *ramptr1 = (unsigned char *)0x00000110; + __maybe_unused unsigned char ramtmp; memctl->memc_mptpr = CONFIG_SYS_MPTPR; diff --git a/board/esd/cpci5200/strataflash.c b/board/esd/cpci5200/strataflash.c index 9b578b5f5e..9de51f3eab 100644 --- a/board/esd/cpci5200/strataflash.c +++ b/board/esd/cpci5200/strataflash.c @@ -678,12 +678,10 @@ static ulong flash_get_size(ulong base, int banknum) static int flash_write_cfiword(flash_info_t * info, ulong dest, cfiword_t cword) { - cfiptr_t ctladdr; cfiptr_t cptr; int flag; - ctladdr.cp = flash_make_addr(info, 0, 0); - cptr.cp = (uchar *) dest; + cptr.cp = (uchar *)dest; /* Check if Flash is (sufficiently) erased */ switch (info->portwidth) { diff --git a/board/esd/pf5200/pf5200.c b/board/esd/pf5200/pf5200.c index 83dbfcbbda..2e07ac1209 100644 --- a/board/esd/pf5200/pf5200.c +++ b/board/esd/pf5200/pf5200.c @@ -327,13 +327,11 @@ int phypower(int flag) int do_phypower(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { - int status; + if (argv[1][0] == '0') + (void)phypower(0); + else + (void)phypower(1); - if (argv[1][0] == '0') { - status = phypower(0); - } else { - status = phypower(1); - } return (0); } diff --git a/board/etin/kvme080/multiverse.c b/board/etin/kvme080/multiverse.c index eb895817d5..93ad57a269 100644 --- a/board/etin/kvme080/multiverse.c +++ b/board/etin/kvme080/multiverse.c @@ -17,6 +17,7 @@ #include <common.h> #include <asm/io.h> #include <pci.h> +#include <linux/compiler.h> #include "multiverse.h" @@ -103,7 +104,7 @@ int multiv_reset(unsigned long base) void multiv_auto_slot_id(unsigned long base) { - unsigned int vector; + __maybe_unused unsigned int vector; int slot_id = 1; if (readb(base + VME_CTRL) & VME_CTRL_SYSFAIL) { *(volatile unsigned int*)(base + VME_IRQ2_REG) = 0xfe; diff --git a/board/etx094/flash.c b/board/etx094/flash.c index fa51c90378..0958e73d60 100644 --- a/board/etx094/flash.c +++ b/board/etx094/flash.c @@ -24,68 +24,53 @@ #include <common.h> #include <mpc8xx.h> -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /*----------------------------------------------------------------------- * Functions */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info); -static int write_word (flash_info_t *info, ulong dest, ulong data); -static void flash_get_offsets (ulong base, flash_info_t *info); +static ulong flash_get_size(vu_long *addr, flash_info_t *info); +static int write_word(flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets(ulong base, flash_info_t *info); /*----------------------------------------------------------------------- */ -unsigned long flash_init (void) +unsigned long flash_init(void) { volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; - unsigned long size_b0, size_b1; + unsigned long size_b0; int i; /* Init: no FLASHes known */ - for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) flash_info[i].flash_id = FLASH_UNKNOWN; - } /* Static FLASH Bank configuration here - FIXME XXX */ size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); if (flash_info[0].flash_id == FLASH_UNKNOWN) { - printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", + printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size_b0, size_b0<<20); } - size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]); - - if (size_b1 > size_b0) { - printf ("## ERROR: " - "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n", - size_b1, size_b1<<20, - size_b0, size_b0<<20 - ); - flash_info[0].flash_id = FLASH_UNKNOWN; - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[0].sector_count = -1; - flash_info[1].sector_count = -1; - flash_info[0].size = 0; - flash_info[1].size = 0; - return (0); - } - /* Remap FLASH according to real size */ memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); #ifdef CONFIG_FLASH_16BIT - memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16; /* 16 Bit data port */ + memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | + BR_MS_GPCM | BR_V | BR_PS_16; /* 16 Bit data port */ #else - memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; + memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | + BR_MS_GPCM | BR_V; #endif /* Re-do sizing to get full correct info */ - size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); + size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, + &flash_info[0]); - flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); + flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]); #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ @@ -95,56 +80,26 @@ unsigned long flash_init (void) &flash_info[0]); #endif - if (size_b1) { - memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); -#ifdef CONFIG_FLASH_16BIT - memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) | - BR_MS_GPCM | BR_V | BR_PS_16; -#else - memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) | - BR_MS_GPCM | BR_V; -#endif - - /* Re-do sizing to get full correct info */ - size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + size_b0), - &flash_info[1]); - - flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]); - -#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE - /* monitor protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, - &flash_info[1]); -#endif - } else { - memctl->memc_br1 = 0; /* invalidate bank */ - - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[1].sector_count = -1; - } + memctl->memc_br1 = 0; /* invalidate bank 1 */ flash_info[0].size = size_b0; - flash_info[1].size = size_b1; - return (size_b0 + size_b1); + return size_b0; } /*----------------------------------------------------------------------- */ -static void flash_get_offsets (ulong base, flash_info_t *info) +static void flash_get_offsets(ulong base, flash_info_t *info) { int i; - if (info->flash_id == FLASH_UNKNOWN) { + if (info->flash_id == FLASH_UNKNOWN) return; - } if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { - for (i = 0; i < info->sector_count; i++) { + for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00002000); - } + return; } @@ -156,106 +111,119 @@ static void flash_get_offsets (ulong base, flash_info_t *info) info->start[1] = base + 0x00004000; info->start[2] = base + 0x00006000; info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { + for (i = 4; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000) - 0x00030000; #else info->start[0] = base + 0x00000000; info->start[1] = base + 0x00008000; info->start[2] = base + 0x0000C000; info->start[3] = base + 0x00010000; - for (i = 4; i < info->sector_count; i++) { + for (i = 4; i < info->sector_count; i++) info->start[i] = base + (i * 0x00020000) - 0x00060000; #endif - } } else { /* set sector offsets for top boot block type */ i = info->sector_count - 1; info->start[i--] = base + info->size - 0x00008000; info->start[i--] = base + info->size - 0x0000C000; info->start[i--] = base + info->size - 0x00010000; - for (; i >= 0; i--) { + for (; i >= 0; i--) info->start[i] = base + i * 0x00020000; - } } - } /*----------------------------------------------------------------------- */ -void flash_print_info (flash_info_t *info) +void flash_print_info(flash_info_t *info) { int i; if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); + printf("missing or unknown FLASH type\n"); return; } switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_SST: printf ("SST "); break; - case FLASH_MAN_STM: printf ("STM "); break; - default: printf ("Unknown Vendor "); break; + case FLASH_MAN_AMD: + printf("AMD "); + break; + case FLASH_MAN_FUJ: + printf("FUJITSU "); + break; + case FLASH_MAN_SST: + printf("SST "); + break; + case FLASH_MAN_STM: + printf("STM "); + break; + default: + printf("Unknown Vendor "); + break; } switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); - break; - case FLASH_SST200A: printf ("39xF200A (2M = 128K x 16)\n"); - break; - case FLASH_SST400A: printf ("39xF400A (4M = 256K x 16)\n"); - break; - case FLASH_SST800A: printf ("39xF800A (8M = 512K x 16)\n"); - break; - case FLASH_STM800AB: printf ("M29W800AB (8M = 512K x 16)\n"); - break; - default: printf ("Unknown Chip Type\n"); - break; + case FLASH_AM400B: + printf("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: + printf("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: + printf("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: + printf("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: + printf("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: + printf("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: + printf("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: + printf("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + case FLASH_SST200A: + printf("39xF200A (2M = 128K x 16)\n"); + break; + case FLASH_SST400A: + printf("39xF400A (4M = 256K x 16)\n"); + break; + case FLASH_SST800A: + printf("39xF800A (8M = 512K x 16)\n"); + break; + case FLASH_STM800AB: + printf("M29W800AB (8M = 512K x 16)\n"); + break; + default: + printf("Unknown Chip Type\n"); + break; } - printf (" Size: %ld MB in %d Sectors\n", + printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - printf (" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) { + printf(" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", + printf("\n "); + printf(" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " " ); } - printf ("\n"); + printf("\n"); return; } -/*----------------------------------------------------------------------- - */ - - -/*----------------------------------------------------------------------- - */ - /* * The following code cannot be run from FLASH! */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info) +static ulong flash_get_size(vu_long *addr, flash_info_t *info) { short i; ulong value; @@ -263,7 +231,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) /* Write auto select command: read Manufacturer ID */ #ifdef CONFIG_FLASH_16BIT - vu_short *s_addr = (vu_short*)addr; + vu_short *s_addr = (vu_short *)addr; s_addr[0x5555] = 0x00AA; s_addr[0x2AAA] = 0x0055; s_addr[0x5555] = 0x0090; @@ -293,7 +261,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; info->size = 0; - return (0); /* no or unknown flash */ + return 0; /* no or unknown flash */ } #ifdef CONFIG_FLASH_16BIT value = s_addr[1]; @@ -349,32 +317,19 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) #endif break; -#if 0 /* enable when device IDs are available */ - case AMD_ID_LV320T: - info->flash_id += FLASH_AM320T; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ - - case AMD_ID_LV320B: - info->flash_id += FLASH_AM320B; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ -#endif case SST_ID_xF200A: info->flash_id += FLASH_SST200A; - info->sector_count = 64; /* 39xF200A ID ( 2M = 128K x 16 ) */ + info->sector_count = 64; /* 39xF200A (2M = 128K x 16) */ info->size = 0x00080000; break; case SST_ID_xF400A: info->flash_id += FLASH_SST400A; - info->sector_count = 128; /* 39xF400A ID ( 4M = 256K x 16 ) */ + info->sector_count = 128; /* 39xF400A (4M = 256K x 16) */ info->size = 0x00100000; break; case SST_ID_xF800A: info->flash_id += FLASH_SST800A; - info->sector_count = 256; /* 39xF800A ID ( 8M = 512K x 16 ) */ + info->sector_count = 256; /* 39xF800A (8M = 512K x 16) */ info->size = 0x00200000; break; /* => 2 MB */ case STM_ID_x800AB: @@ -384,55 +339,55 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) break; /* => 2 MB */ default: info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ + return 0; /* => no or unknown flash */ } if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", + printf("** ERROR: sector count %d > max (%d) **\n", info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; } if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { - for (i = 0; i < info->sector_count; i++) { + for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00002000); - } } else { /* AMD and Fujitsu types */ /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ + /* set sector offsets for bottom boot block type */ #ifdef CONFIG_FLASH_16BIT info->start[0] = base + 0x00000000; info->start[1] = base + 0x00004000; info->start[2] = base + 0x00006000; info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; + for (i = 4; i < info->sector_count; i++) + info->start[i] = base + + (i * 0x00010000) - 0x00030000; #else info->start[0] = base + 0x00000000; info->start[1] = base + 0x00008000; info->start[2] = base + 0x0000C000; info->start[3] = base + 0x00010000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00020000) - 0x00060000; + for (i = 4; i < info->sector_count; i++) + info->start[i] = base + + (i * 0x00020000) - 0x00060000; #endif - } } else { - /* set sector offsets for top boot block type */ + /* set sector offsets for top boot block type */ i = info->sector_count - 1; info->start[i--] = base + info->size - 0x00008000; info->start[i--] = base + info->size - 0x0000C000; info->start[i--] = base + info->size - 0x00010000; - for (; i >= 0; i--) { + for (; i >= 0; i--) info->start[i] = base + i * 0x00020000; - } } /* check for protected sectors */ for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address: + /* + * read sector protection at sector address: * (A7 .. A0) = 0x02 * D0 = 1 if protected */ @@ -459,28 +414,23 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) #endif } - return (info->size); + return info->size; } - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) +int flash_erase(flash_info_t *info, int s_first, int s_last) { - vu_long *addr = (vu_long*)(info->start[0]); + vu_long *addr = (vu_long *)(info->start[0]); int flag, prot, sect; ulong start, now, last; #ifdef CONFIG_FLASH_16BIT - vu_short *s_addr = (vu_short*)addr; + vu_short *s_addr = (vu_short *)addr; #endif if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } + if (info->flash_id == FLASH_UNKNOWN) + printf("- missing\n"); + else + printf("- no sectors to erase\n"); return 1; } /*#ifndef CONFIG_FLASH_16BIT @@ -493,30 +443,29 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) } #endif*/ prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) prot++; - } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", + printf("- Warning: %d protected sectors will not be erased!\n", prot); } else { - printf ("\n"); + printf("\n"); } - start = get_timer (0); + start = get_timer(0); last = start; /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { + for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ #ifdef CONFIG_FLASH_16BIT - vu_short *s_sect_addr = (vu_short*)(info->start[sect]); + vu_short *s_sect_addr = (vu_short *)(info->start[sect]); #else - vu_long *sect_addr = (vu_long*)(info->start[sect]); + vu_long *sect_addr = (vu_long *)(info->start[sect]); #endif - /* Disable interrupts which might cause a timeout here */ + /* Disable interrupts which might cause a timeout */ flag = disable_interrupts(); #ifdef CONFIG_FLASH_16BIT @@ -541,20 +490,21 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ - udelay (1000); + udelay(1000); #ifdef CONFIG_FLASH_16BIT while ((s_sect_addr[0] & 0x0080) != 0x0080) { #else while ((sect_addr[0] & 0x00800080) != 0x00800080) { #endif - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); + now = get_timer(start); + if (now > CONFIG_SYS_FLASH_ERASE_TOUT) { + printf("Timeout\n"); return 1; } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc ('.'); + /* show every second that we're waiting */ + if ((now - last) > 1000) { + putc('.'); last = now; } } @@ -569,7 +519,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) addr[0] = 0x00F000F0; /* reset bank */ #endif - printf (" done\n"); + printf(" done\n"); return 0; } @@ -581,37 +531,39 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) * 4 - Flash not identified */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; - if (info->flash_id == FLASH_UNKNOWN) { + if (info->flash_id == FLASH_UNKNOWN) return 4; - } wp = (addr & ~3); /* get lower word aligned address */ /* * handle unaligned start bytes */ - if ((l = addr - wp) != 0) { + l = addr - wp; + + if (l != 0) { data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { + for (i = 0, cp = wp; i < l; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - for (; i<4 && cnt>0; ++i) { + + for (; i < 4 && cnt > 0; ++i) { data = (data << 8) | *src++; --cnt; ++cp; } - for (; cnt==0 && i<4; ++i, ++cp) { + for (; cnt == 0 && i < 4; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } + rc = write_word(info, wp, data); + + if (rc != 0) + return rc; + wp += 4; } @@ -620,33 +572,32 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) */ while (cnt >= 4) { data = 0; - for (i=0; i<4; ++i) { + for (i = 0; i < 4; ++i) data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } + + rc = write_word(info, wp, data); + if (rc != 0) + return rc; + wp += 4; cnt -= 4; } - if (cnt == 0) { - return (0); - } + if (cnt == 0) + return 0; /* * handle unaligned tail bytes */ data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { data = (data << 8) | *src++; --cnt; } - for (; i<4; ++i, ++cp) { + for (; i < 4; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - return (write_word(info, wp, data)); + return write_word(info, wp, data); } /*----------------------------------------------------------------------- @@ -655,22 +606,21 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) * 1 - write timeout * 2 - Flash not erased */ -static int write_word (flash_info_t *info, ulong dest, ulong data) +static int write_word(flash_info_t *info, ulong dest, ulong data) { - vu_long *addr = (vu_long*)(info->start[0]); + vu_long *addr = (vu_long *)(info->start[0]); #ifdef CONFIG_FLASH_16BIT vu_short high_data; vu_short low_data; - vu_short *s_addr = (vu_short*)addr; + vu_short *s_addr = (vu_short *)addr; #endif ulong start; int flag; /* Check if Flash is (sufficiently) erased */ - if ((*((vu_long *)dest) & data) != data) { - return (2); - } + if ((*((vu_long *)dest) & data) != data) + return 2; #ifdef CONFIG_FLASH_16BIT /* Write the 16 higher-bits */ @@ -685,20 +635,17 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) *((vu_short *)dest) = high_data; - /* re-enable interrupts if necessary */ if (flag) enable_interrupts(); /* data polling for D7 */ - start = get_timer (0); + start = get_timer(0); while ((*((vu_short *)dest) & 0x0080) != (high_data & 0x0080)) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); - } + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) + return 1; } - /* Write the 16 lower-bits */ #endif @@ -725,7 +672,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) enable_interrupts(); /* data polling for D7 */ - start = get_timer (0); + start = get_timer(0); #ifdef CONFIG_FLASH_16BIT while ((*((vu_short *)dest) & 0x0080) != (low_data & 0x0080)) { @@ -733,12 +680,8 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) { #endif - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); - } + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) + return 1; } - return (0); + return 0; } - -/*----------------------------------------------------------------------- - */ diff --git a/board/fads/fads.c b/board/fads/fads.c index 9f7faaf47d..317d279603 100644 --- a/board/fads/fads.c +++ b/board/fads/fads.c @@ -603,15 +603,17 @@ static int initsdram(uint base, uint *noMbytes) phys_size_t initdram (int board_type) { uint sdramsz = 0; /* size of sdram in Mbytes */ - uint base = 0; /* base of dram in bytes */ uint m = 0; /* size of dram in Mbytes */ #ifndef CONFIG_MPC885ADS + uint base = 0; /* base of dram in bytes */ uint k, s; #endif #ifdef CONFIG_FADS if (!initsdram (0x00000000, &sdramsz)) { +#ifndef CONFIG_MPC885ADS base = sdramsz << 20; +#endif printf ("(%u MB SDRAM) ", sdramsz); } #endif diff --git a/board/freescale/m52277evb/u-boot.lds b/board/freescale/m52277evb/u-boot.lds index e7b22e3fc3..3e9f4c3460 100644 --- a/board/freescale/m52277evb/u-boot.lds +++ b/board/freescale/m52277evb/u-boot.lds @@ -32,9 +32,6 @@ SECTIONS arch/m68k/cpu/mcf5227x/libmcf5227x.o (.text*) arch/m68k/lib/libm68k.o (.text*) - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text*) - *(.text*) } _etext = .; diff --git a/board/freescale/mpc8266ads/mpc8266ads.c b/board/freescale/mpc8266ads/mpc8266ads.c index 2caf4aa990..5d48968184 100644 --- a/board/freescale/mpc8266ads/mpc8266ads.c +++ b/board/freescale/mpc8266ads/mpc8266ads.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2001 + * (C) Copyright 2001-2011 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * Modified during 2001 by @@ -61,8 +61,8 @@ const iop_conf_t iop_conf_tab[4][32] = { - /* Port A configuration */ - { /* conf ppar psor pdir podr pdat */ + /* Port A configuration */ + { /* conf ppar psor pdir podr pdat */ /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */ /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */ /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */ @@ -95,10 +95,10 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */ /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */ /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */ - }, + }, - /* Port B configuration */ - { /* conf ppar psor pdir podr pdat */ + /* Port B configuration */ + { /* conf ppar psor pdir podr pdat */ /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ @@ -131,10 +131,10 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - }, + }, - /* Port C */ - { /* conf ppar psor pdir podr pdat */ + /* Port C */ + { /* conf ppar psor pdir podr pdat */ /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */ /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */ /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */ @@ -167,10 +167,10 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */ /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */ /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */ - }, + }, - /* Port D */ - { /* conf ppar psor pdir podr pdat */ + /* Port D */ + { /* conf ppar psor pdir podr pdat */ /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */ /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */ /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */ @@ -203,7 +203,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - } + } }; typedef struct bscr_ { @@ -224,317 +224,329 @@ typedef struct pci_ic_s { void reset_phy(void) { - volatile bcsr_t *bcsr = (bcsr_t *)CONFIG_SYS_BCSR; + volatile bcsr_t *bcsr = (bcsr_t *)CONFIG_SYS_BCSR; - /* reset the FEC port */ - bcsr->bcsr1 &= ~FETH_RST; - bcsr->bcsr1 |= FETH_RST; + /* reset the FEC port */ + bcsr->bcsr1 &= ~FETH_RST; + bcsr->bcsr1 |= FETH_RST; } -int board_early_init_f (void) +int board_early_init_f(void) { - volatile bcsr_t *bcsr = (bcsr_t *)CONFIG_SYS_BCSR; - volatile pci_ic_t *pci_ic = (pci_ic_t *) CONFIG_SYS_PCI_INT; + volatile bcsr_t *bcsr = (bcsr_t *)CONFIG_SYS_BCSR; + volatile pci_ic_t *pci_ic = (pci_ic_t *)CONFIG_SYS_PCI_INT; - bcsr->bcsr1 = ~FETHIEN & ~RS232EN_1 & ~RS232EN_2; + bcsr->bcsr1 = ~FETHIEN & ~RS232EN_1 & ~RS232EN_2; - /* mask all PCI interrupts */ - pci_ic->pci_int_mask |= 0xfff00000; + /* mask all PCI interrupts */ + pci_ic->pci_int_mask |= 0xfff00000; - return 0; + return 0; } int checkboard(void) { - puts ("Board: Motorola MPC8266ADS\n"); - return 0; + puts("Board: Motorola MPC8266ADS\n"); + return 0; } phys_size_t initdram(int board_type) { /* Autoinit part stolen from board/sacsng/sacsng.c */ - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; - volatile memctl8260_t *memctl = &immap->im_memctl; - volatile uchar c = 0xff; - volatile uchar *ramaddr = (uchar *)(CONFIG_SYS_SDRAM_BASE + 0x8); - uint psdmr = CONFIG_SYS_PSDMR; - int i; - - uint psrt = 0x21; /* for no SPD */ - uint chipselects = 1; /* for no SPD */ - uint sdram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; /* for no SPD */ - uint or = CONFIG_SYS_OR2_PRELIM; /* for no SPD */ - uint data_width; - uint rows; - uint banks; - uint cols; - uint caslatency; - uint width; - uint rowst; - uint sdam; - uint bsma; - uint sda10; - u_char spd_size; - u_char data; - u_char cksum; - int j; - - /* Keep the compiler from complaining about potentially uninitialized vars */ - data_width = rows = banks = cols = caslatency = 0; - - /* - * Read the SDRAM SPD EEPROM via I2C. - */ - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - i2c_read(SDRAM_SPD_ADDR, 0, 1, &data, 1); - spd_size = data; - cksum = data; - for(j = 1; j < 64; j++) - { /* read only the checksummed bytes */ - /* note: the I2C address autoincrements when alen == 0 */ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + volatile memctl8260_t *memctl = &immap->im_memctl; + volatile uchar c = 0xff; + volatile uchar *ramaddr = (uchar *) (CONFIG_SYS_SDRAM_BASE + 0x8); + uint psdmr = CONFIG_SYS_PSDMR; + int i; + + uint psrt = 0x21; /* for no SPD */ + uint chipselects = 1; /* for no SPD */ + uint sdram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; /* for no SPD */ + uint or = CONFIG_SYS_OR2_PRELIM; /* for no SPD */ + uint data_width; + uint rows; + uint banks; + uint cols; + uint caslatency; + uint width; + uint rowst; + uint sdam; + uint bsma; + uint sda10; + u_char data; + u_char cksum; + int j; + + /* + * Keep the compiler from complaining about + * potentially uninitialized vars + */ + data_width = rows = banks = cols = caslatency = 0; + + /* + * Read the SDRAM SPD EEPROM via I2C. + */ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + + i2c_read(SDRAM_SPD_ADDR, 0, 1, &data, 1); + cksum = data; + for (j = 1; j < 64; j++) { /* read only the checksummed bytes */ + /* note: the I2C address autoincrements when alen == 0 */ i2c_read(SDRAM_SPD_ADDR, 0, 0, &data, 1); - /*printf("addr %d = 0x%02x\n", j, data);*/ - if(j == 5) chipselects = data & 0x0F; - else if(j == 6) data_width = data; - else if(j == 7) data_width |= data << 8; - else if(j == 3) rows = data & 0x0F; - else if(j == 4) cols = data & 0x0F; - else if(j == 12) - { + /*printf("addr %d = 0x%02x\n", j, data); */ + if (j == 5) + chipselects = data & 0x0F; + else if (j == 6) + data_width = data; + else if (j == 7) + data_width |= data << 8; + else if (j == 3) + rows = data & 0x0F; + else if (j == 4) + cols = data & 0x0F; + else if (j == 12) { /* - * Refresh rate: this assumes the prescaler is set to - * approximately 0.39uSec per tick and the target refresh period - * is about 85% of maximum. + * Refresh rate: this assumes the prescaler is set to + * approximately 0.39uSec per tick and the target + * refresh period is about 85% of maximum. */ - switch(data & 0x7F) - { - default: - case 0: psrt = 0x21; /* 15.625uS */ break; - case 1: psrt = 0x07; /* 3.9uS */ break; - case 2: psrt = 0x0F; /* 7.8uS */ break; - case 3: psrt = 0x43; /* 31.3uS */ break; - case 4: psrt = 0x87; /* 62.5uS */ break; - case 5: psrt = 0xFF; /* 125uS */ break; + switch (data & 0x7F) { + default: + case 0: + psrt = 0x21; /* 15.625uS */ + break; + case 1: + psrt = 0x07; /* 3.9uS */ + break; + case 2: + psrt = 0x0F; /* 7.8uS */ + break; + case 3: + psrt = 0x43; /* 31.3uS */ + break; + case 4: + psrt = 0x87; /* 62.5uS */ + break; + case 5: + psrt = 0xFF; /* 125uS */ + break; } - } - else if(j == 17) banks = data; - else if(j == 18) - { - caslatency = 3; /* default CL */ -# if(PESSIMISTIC_SDRAM) - if((data & 0x04) != 0) caslatency = 3; - else if((data & 0x02) != 0) caslatency = 2; - else if((data & 0x01) != 0) caslatency = 1; -# else - if((data & 0x01) != 0) caslatency = 1; - else if((data & 0x02) != 0) caslatency = 2; - else if((data & 0x04) != 0) caslatency = 3; -# endif - else - { - printf ("WARNING: Unknown CAS latency 0x%02X, using 3\n", + } else if (j == 17) + banks = data; + else if (j == 18) { + caslatency = 3; /* default CL */ +#if (PESSIMISTIC_SDRAM) + if ((data & 0x04) != 0) + caslatency = 3; + else if ((data & 0x02) != 0) + caslatency = 2; + else if ((data & 0x01) != 0) + caslatency = 1; +#else + if ((data & 0x01) != 0) + caslatency = 1; + else if ((data & 0x02) != 0) + caslatency = 2; + else if ((data & 0x04) != 0) + caslatency = 3; +#endif + else { + printf("WARNING: Unknown CAS latency 0x%02X, using 3\n", data); } - } - else if(j == 63) - { - if(data != cksum) - { - printf ("WARNING: Configuration data checksum failure:" + } else if (j == 63) { + if (data != cksum) { + printf("WARNING: Configuration data checksum failure:" " is 0x%02x, calculated 0x%02x\n", - data, cksum); + data, cksum); } } cksum += data; - } + } - /* We don't trust CL less than 2 (only saw it on an old 16MByte DIMM) */ - if(caslatency < 2) { + /* We don't trust CL less than 2 (only saw it on an old 16MByte DIMM) */ + if (caslatency < 2) { printf("CL was %d, forcing to 2\n", caslatency); caslatency = 2; - } - if(rows > 14) { - printf("This doesn't look good, rows = %d, should be <= 14\n", rows); + } + if (rows > 14) { + printf("This doesn't look good, rows = %d, should be <= 14\n", + rows); rows = 14; - } - if(cols > 11) { - printf("This doesn't look good, columns = %d, should be <= 11\n", cols); + } + if (cols > 11) { + printf("This doesn't look good, columns = %d, should be <= 11\n", + cols); cols = 11; - } + } - if((data_width != 64) && (data_width != 72)) - { + if ((data_width != 64) && (data_width != 72)) { printf("WARNING: SDRAM width unsupported, is %d, expected 64 or 72.\n", data_width); - } - width = 3; /* 2^3 = 8 bytes = 64 bits wide */ - /* - * Convert banks into log2(banks) - */ - if (banks == 2) banks = 1; - else if(banks == 4) banks = 2; - else if(banks == 8) banks = 3; - - - sdram_size = 1 << (rows + cols + banks + width); - /* hack for high density memory (512MB per CS) */ - /* !!!!! Will ONLY work with Page Based Interleave !!!!! - ( PSDMR[PBI] = 1 ) - */ - /* mamory actually has 11 column addresses, but the memory controller - doesn't really care. - the calculations that follow will however move the rows so that - they are muxed one bit off if you use 11 bit columns. - The solution is to tell the memory controller the correct size of the memory - but change the number of columns to 10 afterwards. - The 11th column addre will still be mucxed correctly onto the bus. - - Also be aware that the MPC8266ADS board Rev B has not connected - Row address 13 to anything. - - The fix is to connect ADD16 (from U37-47) to SADDR12 (U28-126) - */ - if (cols > 10) - cols = 10; - -#if(CONFIG_PBI == 0) /* bank-based interleaving */ - rowst = ((32 - 6) - (rows + cols + width)) * 2; + } + width = 3; /* 2^3 = 8 bytes = 64 bits wide */ + /* + * Convert banks into log2(banks) + */ + if (banks == 2) + banks = 1; + else if (banks == 4) + banks = 2; + else if (banks == 8) + banks = 3; + + + sdram_size = 1 << (rows + cols + banks + width); + /* hack for high density memory (512MB per CS) */ + /* !!!!! Will ONLY work with Page Based Interleave !!!!! + ( PSDMR[PBI] = 1 ) + */ + /* + * memory actually has 11 column addresses, but the memory + * controller doesn't really care. + * + * the calculations that follow will however move the rows so + * that they are muxed one bit off if you use 11 bit columns. + * + * The solution is to tell the memory controller the correct + * size of the memory but change the number of columns to 10 + * afterwards. + * + * The 11th column addre will still be mucxed correctly onto + * the bus. + * + * Also be aware that the MPC8266ADS board Rev B has not + * connected Row address 13 to anything. + * + * The fix is to connect ADD16 (from U37-47) to SADDR12 (U28-126) + */ + if (cols > 10) + cols = 10; + +#if (CONFIG_PBI == 0) /* bank-based interleaving */ + rowst = ((32 - 6) - (rows + cols + width)) * 2; #else - rowst = 32 - (rows + banks + cols + width); + rowst = 32 - (rows + banks + cols + width); #endif - or = ~(sdram_size - 1) | /* SDAM address mask */ - ((banks-1) << 13) | /* banks per device */ - (rowst << 9) | /* rowst */ - ((rows - 9) << 6); /* numr */ - - - /*printf("memctl->memc_or2 = 0x%08x\n", or);*/ - - /* - * SDAM specifies the number of columns that are multiplexed - * (reference AN2165/D), defined to be (columns - 6) for page - * interleave, (columns - 8) for bank interleave. - * - * BSMA is 14 - max(rows, cols). The bank select lines come - * into play above the highest "address" line going into the - * the SDRAM. - */ -#if(CONFIG_PBI == 0) /* bank-based interleaving */ - sdam = cols - 8; - bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols); - sda10 = sdam + 2; + or = ~(sdram_size - 1) | /* SDAM address mask */ + ((banks - 1) << 13) | /* banks per device */ + (rowst << 9) | /* rowst */ + ((rows - 9) << 6); /* numr */ + + + /*printf("memctl->memc_or2 = 0x%08x\n", or); */ + + /* + * SDAM specifies the number of columns that are multiplexed + * (reference AN2165/D), defined to be (columns - 6) for page + * interleave, (columns - 8) for bank interleave. + * + * BSMA is 14 - max(rows, cols). The bank select lines come + * into play above the highest "address" line going into the + * the SDRAM. + */ +#if (CONFIG_PBI == 0) /* bank-based interleaving */ + sdam = cols - 8; + bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols); + sda10 = sdam + 2; #else - sdam = cols + banks - 8; - bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols); - sda10 = sdam; + sdam = cols + banks - 8; + bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols); + sda10 = sdam; #endif -#if(PESSIMISTIC_SDRAM) - psdmr = (CONFIG_PBI |\ - PSDMR_RFEN |\ - PSDMR_RFRC_16_CLK |\ - PSDMR_PRETOACT_8W |\ - PSDMR_ACTTORW_8W |\ - PSDMR_WRC_4C |\ - PSDMR_EAMUX |\ - PSDMR_BUFCMD) |\ - caslatency |\ - ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \ - (sdam << 24) |\ - (bsma << 21) |\ - (sda10 << 18); +#if (PESSIMISTIC_SDRAM) + psdmr = (CONFIG_PBI | PSDMR_RFEN | PSDMR_RFRC_16_CLK | + PSDMR_PRETOACT_8W | PSDMR_ACTTORW_8W | PSDMR_WRC_4C | + PSDMR_EAMUX | PSDMR_BUFCMD) | caslatency | + ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ + (sdam << 24) | (bsma << 21) | (sda10 << 18); #else - psdmr = (CONFIG_PBI |\ - PSDMR_RFEN |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_3W | /* 1 for 7E parts (fast PC-133) */ \ - PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ \ - PSDMR_WRC_1C | /* 1 clock + 7nSec */ - EAMUX |\ - BUFCMD) |\ - caslatency |\ - ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \ - (sdam << 24) |\ - (bsma << 21) |\ - (sda10 << 18); + psdmr = (CONFIG_PBI | PSDMR_RFEN | PSDMR_RFRC_7_CLK | + PSDMR_PRETOACT_3W | /* 1 for 7E parts (fast PC-133) */ + PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ + PSDMR_WRC_1C | /* 1 clock + 7nSec */ + EAMUX | BUFCMD) | caslatency | + ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ + (sdam << 24) | (bsma << 21) | (sda10 << 18); #endif - /*printf("psdmr = 0x%08x\n", psdmr);*/ - - /* - * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): - * - * "At system reset, initialization software must set up the - * programmable parameters in the memory controller banks registers - * (ORx, BRx, P/LSDMR). After all memory parameters are configured, - * system software should execute the following initialization sequence - * for each SDRAM device. - * - * 1. Issue a PRECHARGE-ALL-BANKS command - * 2. Issue eight CBR REFRESH commands - * 3. Issue a MODE-SET command to initialize the mode register - * - * Quote from Micron MT48LC8M16A2 data sheet: - * - * "...the SDRAM requires a 100uS delay prior to issuing any - * command other than a COMMAND INHIBIT or NOP. Starting at some - * point during this 100uS period and continuing at least through - * the end of this period, COMMAND INHIBIT or NOP commands should - * be applied." - * - * "Once the 100uS delay has been satisfied with at least one COMMAND - * INHIBIT or NOP command having been applied, a /PRECHARGE command/ - * should be applied. All banks must then be precharged, thereby - * placing the device in the all banks idle state." - * - * "Once in the idle state, /two/ AUTO REFRESH cycles must be - * performed. After the AUTO REFRESH cycles are complete, the - * SDRAM is ready for mode register programming." - * - * (/emphasis/ mine, gvb) - * - * The way I interpret this, Micron start up sequence is: - * 1. Issue a PRECHARGE-BANK command (initial precharge) - * 2. Issue a PRECHARGE-ALL-BANKS command ("all banks ... precharged") - * 3. Issue two (presumably, doing eight is OK) CBR REFRESH commands - * 4. Issue a MODE-SET command to initialize the mode register - * - * -------- - * - * The initial commands are executed by setting P/LSDMR[OP] and - * accessing the SDRAM with a single-byte transaction." - * - * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. - */ - - memctl->memc_mptpr = CONFIG_SYS_MPTPR; - memctl->memc_psrt = psrt; - - memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; - memctl->memc_or2 = or; - - memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; - *ramaddr = c; - - memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; - for (i = 0; i < 8; i++) + /*printf("psdmr = 0x%08x\n", psdmr); */ + + /* + * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): + * + * "At system reset, initialization software must set up the + * programmable parameters in the memory controller banks registers + * (ORx, BRx, P/LSDMR). After all memory parameters are configured, + * system software should execute the following initialization sequence + * for each SDRAM device. + * + * 1. Issue a PRECHARGE-ALL-BANKS command + * 2. Issue eight CBR REFRESH commands + * 3. Issue a MODE-SET command to initialize the mode register + * + * Quote from Micron MT48LC8M16A2 data sheet: + * + * "...the SDRAM requires a 100uS delay prior to issuing any + * command other than a COMMAND INHIBIT or NOP. Starting at some + * point during this 100uS period and continuing at least through + * the end of this period, COMMAND INHIBIT or NOP commands should + * be applied." + * + * "Once the 100uS delay has been satisfied with at least one COMMAND + * INHIBIT or NOP command having been applied, a /PRECHARGE command/ + * should be applied. All banks must then be precharged, thereby + * placing the device in the all banks idle state." + * + * "Once in the idle state, /two/ AUTO REFRESH cycles must be + * performed. After the AUTO REFRESH cycles are complete, the + * SDRAM is ready for mode register programming." + * + * (/emphasis/ mine, gvb) + * + * The way I interpret this, Micron start up sequence is: + * 1. Issue a PRECHARGE-BANK command (initial precharge) + * 2. Issue a PRECHARGE-ALL-BANKS command ("all banks ... precharged") + * 3. Issue two (presumably, doing eight is OK) CBR REFRESH commands + * 4. Issue a MODE-SET command to initialize the mode register + * + * -------- + * + * The initial commands are executed by setting P/LSDMR[OP] and + * accessing the SDRAM with a single-byte transaction." + * + * The appropriate BRx/ORx registers have already been set + * when we get here. The SDRAM can be accessed at the address + * CONFIG_SYS_SDRAM_BASE. + */ + + memctl->memc_mptpr = CONFIG_SYS_MPTPR; + memctl->memc_psrt = psrt; + + memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; + memctl->memc_or2 = or; + + memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; *ramaddr = c; - memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; - *ramaddr = c; + memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; + for (i = 0; i < 8; i++) + *ramaddr = c; + + memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; + *ramaddr = c; - memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; - *ramaddr = c; + memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; + *ramaddr = c; - /* - * Do it a second time for the second set of chips if the DIMM has - * two chip selects (double sided). - */ - if(chipselects > 1) - { - ramaddr += sdram_size; + /* + * Do it a second time for the second set of chips if the DIMM has + * two chip selects (double sided). + */ + if (chipselects > 1) { + ramaddr += sdram_size; memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM + sdram_size; memctl->memc_or3 = or; @@ -551,28 +563,28 @@ phys_size_t initdram(int board_type) memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; *ramaddr = c; - } + } /* print info */ printf("SDRAM configuration read from SPD\n"); printf("\tSize per side = %dMB\n", sdram_size >> 20); - printf("\tOrganization: %d sides, %d banks, %d Columns, %d Rows, Data width = %d bits\n", chipselects, 1<<(banks), cols, rows, data_width); + printf("\tOrganization: %d sides, %d banks, %d Columns, %d Rows, Data width = %d bits\n", + chipselects, 1 << (banks), cols, rows, data_width); printf("\tRefresh rate = %d, CAS latency = %d", psrt, caslatency); -#if(CONFIG_PBI == 0) /* bank-based interleaving */ - printf(", Using Bank Based Interleave\n"); +#if (CONFIG_PBI == 0) /* bank-based interleaving */ + printf(", Using Bank Based Interleave\n"); #else - printf(", Using Page Based Interleave\n"); + printf(", Using Page Based Interleave\n"); #endif printf("\tTotal size: "); - /* this delay only needed for original 16MB DIMM... - * Not needed for any other memory configuration */ - if ((sdram_size * chipselects) == (16 *1024 *1024)) - udelay (250000); - return (sdram_size * chipselects); - /*return (16 * 1024 * 1024);*/ -} + /* this delay only needed for original 16MB DIMM... + * Not needed for any other memory configuration */ + if ((sdram_size * chipselects) == (16 * 1024 * 1024)) + udelay(250000); + return sdram_size * chipselects; +} #ifdef CONFIG_PCI struct pci_controller hose; diff --git a/board/funkwerk/vovpn-gw/vovpn-gw.c b/board/funkwerk/vovpn-gw/vovpn-gw.c index a4bfbc9780..57bd21fc29 100644 --- a/board/funkwerk/vovpn-gw/vovpn-gw.c +++ b/board/funkwerk/vovpn-gw/vovpn-gw.c @@ -25,6 +25,7 @@ #include <mpc8260.h> #include <asm/m8260_pci.h> #include <miiphy.h> +#include <linux/compiler.h> #include "m88e6060.h" @@ -263,7 +264,7 @@ int board_early_init_f (void) int misc_init_r (void) { volatile ioport_t *iop; - unsigned char temp; + __maybe_unused unsigned char temp; #if 0 /* DUMP UPMA RAM */ volatile immap_t *immap; diff --git a/board/genietv/flash.c b/board/genietv/flash.c index 5313ad8b0a..19a428abb8 100644 --- a/board/genietv/flash.c +++ b/board/genietv/flash.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000 + * (C) Copyright 2000-2011 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -24,32 +24,33 @@ #include <common.h> #include <mpc8xx.h> -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /*----------------------------------------------------------------------- * Functions */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info); -static int write_word (flash_info_t *info, ulong dest, ulong data); -static void flash_get_offsets (ulong base, flash_info_t *info); +static ulong flash_get_size(vu_long *addr, flash_info_t *info); +static int write_word(flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets(ulong base, flash_info_t *info); /*----------------------------------------------------------------------- */ -unsigned long flash_init (void) +unsigned long flash_init(void) { - unsigned long size_b0, size_b1; + unsigned long size_b0; int i; /* Init: no FLASHes known */ - for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) - flash_info[i].flash_id = FLASH_UNKNOWN; + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) + flash_info[i].flash_id = FLASH_UNKNOWN; /* Detect size */ - size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); + size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, + &flash_info[0]); /* Setup offsets */ - flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); + flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]); #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* Monitor protection ON by default */ @@ -59,21 +60,15 @@ unsigned long flash_init (void) &flash_info[0]); #endif - size_b1 = 0 ; - - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[1].sector_count = -1; - flash_info[0].size = size_b0; - flash_info[1].size = size_b1; - return (size_b0 + size_b1); + return size_b0; } /*----------------------------------------------------------------------- * Fix this to support variable sector sizes */ -static void flash_get_offsets (ulong base, flash_info_t *info) +static void flash_get_offsets(ulong base, flash_info_t *info) { int i; @@ -87,73 +82,85 @@ static void flash_get_offsets (ulong base, flash_info_t *info) /*----------------------------------------------------------------------- */ -void flash_print_info (flash_info_t *info) +void flash_print_info(flash_info_t *info) { int i; - if (info->flash_id == FLASH_UNKNOWN) - { - puts ("missing or unknown FLASH type\n"); + if (info->flash_id == FLASH_UNKNOWN) { + puts("missing or unknown FLASH type\n"); return; } - switch (info->flash_id & FLASH_VENDMASK) - { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; - default: printf ("Unknown Vendor "); break; + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: + printf("AMD "); + break; + case FLASH_MAN_FUJ: + printf("FUJITSU "); + break; + case FLASH_MAN_BM: + printf("BRIGHT MICRO "); + break; + default: + printf("Unknown Vendor "); + break; } - switch (info->flash_id & FLASH_TYPEMASK) - { - case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); - break; - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); - break; - default: printf ("Unknown Chip Type\n"); - break; + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM040: + printf("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); + break; + case FLASH_AM400B: + printf("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: + printf("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: + printf("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: + printf("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: + printf("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: + printf("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: + printf("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: + printf("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + default: + printf("Unknown Chip Type\n"); + break; } if (info->size >> 20) { - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, - info->sector_count); + printf(" Size: %ld MB in %d Sectors\n", + info->size >> 20, + info->sector_count); } else { - printf (" Size: %ld KB in %d Sectors\n", - info->size >> 10, - info->sector_count); + printf(" Size: %ld KB in %d Sectors\n", + info->size >> 10, + info->sector_count); } - puts (" Sector Start Addresses:"); + puts(" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) - { + for (i = 0; i < info->sector_count; ++i) { if ((i % 5) == 0) - { - puts ("\n "); - } + puts("\n "); - printf (" %08lX%s", + printf(" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " "); } - putc ('\n'); + putc('\n'); return; } /*----------------------------------------------------------------------- @@ -163,7 +170,7 @@ void flash_print_info (flash_info_t *info) * The following code cannot be run from FLASH! */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info) +static ulong flash_get_size(vu_long *addr, flash_info_t *info) { short i; volatile unsigned char *caddr; @@ -173,9 +180,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) /* Write auto select command: read Manufacturer ID */ -#if 0 - printf("Base address is: %08x\n", caddr); -#endif + debug("Base address is: %8p\n", caddr); caddr[0x0555] = 0xAA; caddr[0x02AA] = 0x55; @@ -183,51 +188,47 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) value = caddr[0]; -#if 0 - printf("Manufact ID: %02x\n", value); -#endif - switch (value) - { - case 0x1: /* AMD_MANUFACT */ - info->flash_id = FLASH_MAN_AMD; - break; + debug("Manufact ID: %02x\n", value); - case 0x4: /* FUJ_MANUFACT */ - info->flash_id = FLASH_MAN_FUJ; + switch (value) { + case 0x1: /* AMD_MANUFACT */ + info->flash_id = FLASH_MAN_AMD; + break; + case 0x4: /* FUJ_MANUFACT */ + info->flash_id = FLASH_MAN_FUJ; + break; + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - break; } value = caddr[1]; /* device ID */ -#if 0 - printf("Device ID: %02x\n", value); -#endif - switch (value) - { - case AMD_ID_LV040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 512Kb */ - - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ + debug("Device ID: %02x\n", value); + + switch (value) { + case AMD_ID_LV040B: + info->flash_id += FLASH_AM040; + info->sector_count = 8; + info->size = 0x00080000; + break; /* => 512Kb */ + + default: + info->flash_id = FLASH_UNKNOWN; + return 0; /* => no or unknown flash */ } - flash_get_offsets ((ulong)addr, &flash_info[0]); + flash_get_offsets((ulong)addr, &flash_info[0]); /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) - { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ + for (i = 0; i < info->sector_count; i++) { + /* + * read sector protection at sector address, + * (A7 .. A0) = 0x02 + * D0 = 1 if protected + */ caddr = (volatile unsigned char *)(info->start[i]); info->protect[i] = caddr[2] & 1; } @@ -235,52 +236,47 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) /* * Prevent writes to uninitialized FLASH. */ - if (info->flash_id != FLASH_UNKNOWN) - { + if (info->flash_id != FLASH_UNKNOWN) { caddr = (volatile unsigned char *)info->start[0]; *caddr = 0xF0; /* reset bank */ } - return (info->size); + return info->size; } - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) +int flash_erase(flash_info_t *info, int s_first, int s_last) { - volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]); + volatile unsigned char *addr = + (volatile unsigned char *)(info->start[0]); int flag, prot, sect, l_sect; ulong start, now, last; if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } + if (info->flash_id == FLASH_UNKNOWN) + printf("- missing\n"); + else + printf("- no sectors to erase\n"); + return 1; } if ((info->flash_id == FLASH_UNKNOWN) || (info->flash_id > FLASH_AMD_COMP)) { - printf ("Can't erase unknown flash type - aborted\n"); + printf("Can't erase unknown flash type - aborted\n"); return 1; } prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) prot++; - } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", + printf("- Warning: %d protected sectors will not be erased!\n", prot); } else { - printf ("\n"); + printf("\n"); } l_sect = -1; @@ -295,7 +291,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) addr[0x02AA] = 0x55; /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { + for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr = (volatile unsigned char *)(info->start[sect]); addr[0] = 0x30; @@ -308,7 +304,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ - udelay (1000); + udelay(1000); /* * We wait for the last triggered sector @@ -316,19 +312,21 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) if (l_sect < 0) goto DONE; - start = get_timer (0); + start = get_timer(0); last = start; addr = (volatile unsigned char *)(info->start[l_sect]); - while ((addr[0] & 0xFF) != 0xFF) - { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); + while ((addr[0] & 0xFF) != 0xFF) { + + now = get_timer(start); + + if (now > CONFIG_SYS_FLASH_ERASE_TOUT) { + printf("Timeout\n"); return 1; } /* show that we're waiting */ if ((now - last) > 1000) { /* every second */ - putc ('.'); + putc('.'); last = now; } } @@ -339,7 +337,7 @@ DONE: addr[0] = 0xF0; /* reset bank */ - printf (" done\n"); + printf(" done\n"); return 0; } @@ -350,7 +348,7 @@ DONE: * 2 - Flash not erased */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; @@ -360,23 +358,26 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) /* * handle unaligned start bytes */ - if ((l = addr - wp) != 0) { + l = addr - wp; + + if (l != 0) { data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { + for (i = 0, cp = wp; i < l; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - for (; i<4 && cnt>0; ++i) { + + for (; i < 4 && cnt > 0; ++i) { data = (data << 8) | *src++; --cnt; ++cp; } - for (; cnt==0 && i<4; ++i, ++cp) { + for (; cnt == 0 && i < 4; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } + rc = write_word(info, wp, data); + + if (rc != 0) + return rc; + wp += 4; } @@ -385,33 +386,33 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) */ while (cnt >= 4) { data = 0; - for (i=0; i<4; ++i) { + for (i = 0; i < 4; ++i) data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } + + rc = write_word(info, wp, data); + + if (rc != 0) + return rc; + wp += 4; cnt -= 4; } - if (cnt == 0) { - return (0); - } + if (cnt == 0) + return 0; /* * handle unaligned tail bytes */ data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { data = (data << 8) | *src++; --cnt; } - for (; i<4; ++i, ++cp) { + for (; i < 4; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - return (write_word(info, wp, data)); + return write_word(info, wp, data); } /*----------------------------------------------------------------------- @@ -420,10 +421,11 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) * 1 - write timeout * 2 - Flash not erased */ -static int write_word (flash_info_t *info, ulong dest, ulong data) +static int write_word(flash_info_t *info, ulong dest, ulong data) { - volatile unsigned char *addr = (volatile unsigned char*)(info->start[0]), - *cdest,*cdata; + volatile unsigned char *cdest, *cdata; + volatile unsigned char *addr = + (volatile unsigned char *)(info->start[0]); ulong start; int flag, count = 4 ; @@ -431,39 +433,33 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) cdata = (volatile unsigned char *)&data ; /* Check if Flash is (sufficiently) erased */ - if ((*((vu_long *)dest) & data) != data) { - return (2); - } + if ((*((vu_long *)dest) & data) != data) + return 2; - while(count--) - { - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); + while (count--) { - addr[0x0555] = 0xAA; - addr[0x02AA] = 0x55; - addr[0x0555] = 0xA0; + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); - *cdest = *cdata; + addr[0x0555] = 0xAA; + addr[0x02AA] = 0x55; + addr[0x0555] = 0xA0; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + *cdest = *cdata; - /* data polling for D7 */ - start = get_timer (0); - while ((*cdest ^ *cdata) & 0x80) - { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer(0); + while ((*cdest ^ *cdata) & 0x80) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) + return 1; } - } - cdata++ ; - cdest++ ; + cdata++ ; + cdest++ ; } - return (0); + return 0; } - -/*----------------------------------------------------------------------- - */ diff --git a/board/gw8260/flash.c b/board/gw8260/flash.c index 6035f6976c..fb29659e29 100644 --- a/board/gw8260/flash.c +++ b/board/gw8260/flash.c @@ -63,54 +63,50 @@ static int write_word (flash_info_t *info, ulong dest, ulong data); /* functions */ /*********************************************************************/ -/*********************************************************************/ -/* NAME: flash_init() - initializes flash banks */ -/* */ -/* DESCRIPTION: */ -/* This function initializes the flash bank(s). */ -/* */ -/* RETURNS: */ -/* The size in bytes of the flash */ -/* */ -/* RESTRICTIONS/LIMITATIONS: */ -/* */ -/* */ -/*********************************************************************/ -unsigned long flash_init (void) +/* + * NAME: flash_init() - initializes flash banks + * + * DESCRIPTION: + * This function initializes the flash bank(s). + * + * RETURNS: + * The size in bytes of the flash + * + * RESTRICTIONS/LIMITATIONS: + * + * + */ +unsigned long flash_init(void) { - unsigned long size; - int i; - - /* Init: no FLASHes known */ - for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { - flash_info[i].flash_id = FLASH_UNKNOWN; - } - - /* for now, only support the 4 MB Flash SIMM */ - size = flash_get_size((vu_long *)CONFIG_SYS_FLASH0_BASE, &flash_info[0]); - - /* - * protect monitor and environment sectors - */ - + int i; + + /* Init: no FLASHes known */ + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) + flash_info[i].flash_id = FLASH_UNKNOWN; + + /* for now, only support the 4 MB Flash SIMM */ + (void)flash_get_size((vu_long *) CONFIG_SYS_FLASH0_BASE, + &flash_info[0]); + /* + * protect monitor and environment sectors + */ #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH0_BASE - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[0]); #endif #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) -# ifndef CONFIG_ENV_SIZE -# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -# endif - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); +#ifndef CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#endif + flash_protect(FLAG_PROTECT_SET, + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); #endif - return (CONFIG_SYS_FLASH0_SIZE * 1024 * 1024); /*size*/ + return CONFIG_SYS_FLASH0_SIZE * 1024 * 1024; /*size */ } /*********************************************************************/ diff --git a/board/hymod/input.c b/board/hymod/input.c index 998132d659..1a2b8d23a7 100644 --- a/board/hymod/input.c +++ b/board/hymod/input.c @@ -76,7 +76,6 @@ hymod_get_ethaddr (void) if (n == 17) { int i; char *p, *q; - uchar ea[6]; /* see if it looks like an ethernet address */ @@ -85,7 +84,7 @@ hymod_get_ethaddr (void) for (i = 0; i < 6; i++) { char term = (i == 5 ? '\0' : ':'); - ea[i] = simple_strtol (p, &q, 16); + (void)simple_strtol (p, &q, 16); if ((q - p) != 2 || *q++ != term) break; diff --git a/board/icu862/flash.c b/board/icu862/flash.c index 2afeff4b51..7f72258f1a 100644 --- a/board/icu862/flash.c +++ b/board/icu862/flash.c @@ -52,13 +52,12 @@ unsigned long flash_init (void) { volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; - unsigned long size_b0, size_b1; + unsigned long size_b0; int i; /* Init: no FLASHes known */ - for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { + for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) flash_info[i].flash_id = FLASH_UNKNOWN; - } /* Static FLASH Bank configuration here - FIXME XXX */ @@ -70,27 +69,6 @@ unsigned long flash_init (void) size_b0 >> 20); } - if (FLASH_BASE1_PRELIM != 0x0) { - size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]); - - if (size_b1 > size_b0) { - printf ("## ERROR: Bank 1 (0x%08lx = %ld MB)" - " > Bank 0 (0x%08lx = %ld MB)\n", - size_b1, size_b1 >> 20, - size_b0, size_b0 >> 20); - - flash_info[0].flash_id = FLASH_UNKNOWN; - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[0].sector_count = -1; - flash_info[1].sector_count = -1; - flash_info[0].size = 0; - flash_info[1].size = 0; - return (0); - } - } else { - size_b1 = 0; - } - /* Remap FLASH according to real size */ memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK); memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; @@ -117,13 +95,9 @@ unsigned long flash_init (void) #endif /* ICU862 Board has only one Flash Bank */ - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[1].sector_count = -1; - flash_info[0].size = size_b0; - flash_info[1].size = size_b1; - return (size_b0 + size_b1); + return size_b0; } diff --git a/board/icu862/pcmcia.c b/board/icu862/pcmcia.c index a4c0b54bc1..dbe3c3cf72 100644 --- a/board/icu862/pcmcia.c +++ b/board/icu862/pcmcia.c @@ -18,18 +18,16 @@ static void cfg_port_B (void) { - volatile immap_t *immap; volatile cpm8xx_t *cp; uint reg; - immap = (immap_t *)CONFIG_SYS_IMMR; cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); /* - * Configure Port B for TPS2205 PC-Card Power-Interface Switch - * - * Switch off all voltages, assert shutdown - */ + * Configure Port B for TPS2205 PC-Card Power-Interface Switch + * + * Switch off all voltages, assert shutdown + */ reg = cp->cp_pbdat; reg |= (TPS2205_VPP_PGM | TPS2205_VPP_VCC | /* VAVPP => Hi-Z */ TPS2205_VCC3 | TPS2205_VCC5 | /* VAVCC => Hi-Z */ @@ -47,7 +45,6 @@ static void cfg_port_B (void) int pcmcia_hardware_enable(int slot) { - volatile immap_t *immap; volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; volatile sysconf8xx_t *sysp; @@ -58,7 +55,6 @@ int pcmcia_hardware_enable(int slot) udelay(10000); - immap = (immap_t *)CONFIG_SYS_IMMR; sysp = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); @@ -188,7 +184,6 @@ int pcmcia_hardware_disable(int slot) int pcmcia_voltage_set(int slot, int vcc, int vpp) { - volatile immap_t *immap; volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; u_long reg; @@ -198,7 +193,6 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n", 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10); - immap = (immap_t *)CONFIG_SYS_IMMR; cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); /* diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index d621833cc1..02db07f1db 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -281,10 +281,9 @@ phys_size_t initdram (int board_type) volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; - long psize, lsize; + long psize; psize = 16 * 1024 * 1024; - lsize = 0; memctl->memc_psrt = CONFIG_SYS_PSRT; memctl->memc_mptpr = CONFIG_SYS_MPTPR; diff --git a/board/kup/common/pcmcia.c b/board/kup/common/pcmcia.c index ce6b1861db..61ba586e17 100644 --- a/board/kup/common/pcmcia.c +++ b/board/kup/common/pcmcia.c @@ -20,7 +20,6 @@ int pcmcia_hardware_enable(int slot) { - volatile immap_t *immap; volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; volatile sysconf8xx_t *sysp; @@ -30,15 +29,14 @@ int pcmcia_hardware_enable(int slot) udelay(10000); - immap = (immap_t *)CONFIG_SYS_IMMR; sysp = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); /* - * Configure SIUMCR to enable PCMCIA port B - * (VFLS[0:1] are not used for debugging, we connect FRZ# instead) - */ + * Configure SIUMCR to enable PCMCIA port B + * (VFLS[0:1] are not used for debugging, we connect FRZ# instead) + */ sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */ /* clear interrupt state, and disable interrupts */ @@ -46,9 +44,9 @@ int pcmcia_hardware_enable(int slot) pcmp->pcmc_per &= ~PCMCIA_MASK(slot); /* - * Disable interrupts, DMA, and PCMCIA buffers - * (isolate the interface) and assert RESET signal - */ + * Disable interrupts, DMA, and PCMCIA buffers + * (isolate the interface) and assert RESET signal + */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = 0; reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ @@ -57,9 +55,9 @@ int pcmcia_hardware_enable(int slot) udelay(2500); /* - * Configure Port B pins for - * 3 Volts enable - */ + * Configure Port B pins for + * 3 Volts enable + */ if (slot) { /* Slot A is built-in */ cp->cp_pbdir |= KUP4K_PCMCIA_B_3V3; cp->cp_pbpar &= ~KUP4K_PCMCIA_B_3V3; @@ -67,8 +65,8 @@ int pcmcia_hardware_enable(int slot) cp->cp_pbdat |= KUP4K_PCMCIA_B_3V3; /* active low */ } /* - * Make sure there is a card in the slot, then configure the interface. - */ + * Make sure there is a card in the slot, then configure the interface. + */ udelay(10000); debug ("[%d] %s: PIPR(%p)=0x%x\n", __LINE__,__FUNCTION__, @@ -79,8 +77,8 @@ int pcmcia_hardware_enable(int slot) } /* - * Power On. - */ + * Power On. + */ printf("%s Slot %c:", slot ? "" : "\n", 'A' + slot); mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot); reg = pcmp->pcmc_pipr; @@ -149,7 +147,6 @@ int pcmcia_hardware_disable(int slot) int pcmcia_voltage_set(int slot, int vcc, int vpp) { - volatile immap_t *immap; volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; u_long reg; @@ -162,14 +159,13 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) if (!slot) /* Slot A is not configurable */ return 0; - immap = (immap_t *)CONFIG_SYS_IMMR; pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); /* - * Disable PCMCIA buffers (isolate the interface) - * and assert RESET signal - */ + * Disable PCMCIA buffers (isolate the interface) + * and assert RESET signal + */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = PCMCIA_PGCRX(slot); reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ @@ -179,9 +175,9 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) debug ("PCMCIA power OFF\n"); /* - * Configure Port B pins for - * 3 Volts enable - */ + * Configure Port B pins for + * 3 Volts enable + */ cp->cp_pbdir |= KUP4K_PCMCIA_B_3V3; cp->cp_pbpar &= ~KUP4K_PCMCIA_B_3V3; /* remove all power */ diff --git a/board/kup/kup4k/kup4k.c b/board/kup/kup4k/kup4k.c index 267821c48f..e1dc8f7cf8 100644 --- a/board/kup/kup4k/kup4k.c +++ b/board/kup/kup4k/kup4k.c @@ -152,7 +152,7 @@ phys_size_t initdram(int board_type) volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; long int size = 0; - uchar *latch,rev,mod,tmp; + uchar *latch, rev, tmp; /* * Init ChipSelect #4 (CAN + HW-Latch) to determine Hardware Revision @@ -164,7 +164,6 @@ phys_size_t initdram(int board_type) latch = (uchar *)0x90000200; tmp = swapbyte(*latch); rev = (tmp & 0xF8) >> 3; - mod = (tmp & 0x07); upmconfig(UPMA, (uint *) sdram_table, sizeof (sdram_table) / sizeof (uint)); diff --git a/board/linkstation/ide.c b/board/linkstation/ide.c index 568fdf5f2e..f3e3fce824 100644 --- a/board/linkstation/ide.c +++ b/board/linkstation/ide.c @@ -62,14 +62,16 @@ int ide_preinit (void) &ide_bus_offset32); ide_bus_offset[0] = ide_bus_offset32 & 0xfffffffe; ide_bus_offset[0] = pci_hose_bus_to_phys(&hose, - ide_bus_offset[0] & 0xfffffffe, - PCI_REGION_IO); - pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2, - (u32 *) &ide_bus_offset[1]); - ide_bus_offset[1] &= 0xfffffffe; - ide_bus_offset[1] = pci_hose_bus_to_phys(&hose, - ide_bus_offset[1] & 0xfffffffe, - PCI_REGION_IO); + ide_bus_offset[0] & 0xfffffffe, + PCI_REGION_IO); + if (CONFIG_SYS_IDE_MAXBUS > 1) { + pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2, + (u32 *) &ide_bus_offset[1]); + ide_bus_offset[1] &= 0xfffffffe; + ide_bus_offset[1] = pci_hose_bus_to_phys(&hose, + ide_bus_offset[1] & 0xfffffffe, + PCI_REGION_IO); + } } if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) { diff --git a/board/lwmon/pcmcia.c b/board/lwmon/pcmcia.c index ad2e60d590..acbb9d54d2 100644 --- a/board/lwmon/pcmcia.c +++ b/board/lwmon/pcmcia.c @@ -29,8 +29,6 @@ int pcmcia_hardware_enable(int slot) { - volatile immap_t *immap; - volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; volatile sysconf8xx_t *sysp; uint reg, mask; @@ -51,10 +49,8 @@ int pcmcia_hardware_enable(int slot) #endif udelay(10000); - immap = (immap_t *)CONFIG_SYS_IMMR; sysp = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); - cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); /* * Configure SIUMCR to enable PCMCIA port B @@ -171,7 +167,6 @@ int pcmcia_hardware_disable(int slot) int pcmcia_voltage_set(int slot, int vcc, int vpp) { - volatile immap_t *immap; volatile pcmconf8xx_t *pcmp; u_long reg; uchar val; @@ -181,7 +176,6 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n", 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10); - immap = (immap_t *)CONFIG_SYS_IMMR; pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); /* * Disable PCMCIA buffers (isolate the interface) diff --git a/board/manroland/uc100/pcmcia.c b/board/manroland/uc100/pcmcia.c index ad256783ce..db3821a5e4 100644 --- a/board/manroland/uc100/pcmcia.c +++ b/board/manroland/uc100/pcmcia.c @@ -27,8 +27,8 @@ static void cfg_ports (void) immap = (immap_t *)CONFIG_SYS_IMMR; /* - * Configure Port A for MAX1602 PC-Card Power-Interface Switch - */ + * Configure Port A for MAX1602 PC-Card Power-Interface Switch + */ immap->im_ioport.iop_padat &= ~0x8000; /* set port x output to low */ immap->im_ioport.iop_padir |= 0x8000; /* enable port x as output */ @@ -40,7 +40,6 @@ static void cfg_ports (void) int pcmcia_hardware_enable(int slot) { volatile immap_t *immap; - volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; volatile sysconf8xx_t *sysp; uint reg, mask; @@ -52,15 +51,14 @@ int pcmcia_hardware_enable(int slot) immap = (immap_t *)CONFIG_SYS_IMMR; sysp = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); - cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); /* Configure Ports for TPS2211A PC-Card Power-Interface Switch */ cfg_ports (); /* - * Configure SIUMCR to enable PCMCIA port B - * (VFLS[0:1] are not used for debugging, we connect FRZ# instead) - */ + * Configure SIUMCR to enable PCMCIA port B + * (VFLS[0:1] are not used for debugging, we connect FRZ# instead) + */ sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */ /* clear interrupt state, and disable interrupts */ @@ -68,9 +66,9 @@ int pcmcia_hardware_enable(int slot) pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_); /* - * Disable interrupts, DMA, and PCMCIA buffers - * (isolate the interface) and assert RESET signal - */ + * Disable interrupts, DMA, and PCMCIA buffers + * (isolate the interface) and assert RESET signal + */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = 0; reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ @@ -78,8 +76,8 @@ int pcmcia_hardware_enable(int slot) udelay(500); /* - * Make sure there is a card in the slot, then configure the interface. - */ + * Make sure there is a card in the slot, then configure the interface. + */ udelay(10000); debug ("[%d] %s: PIPR(%p)=0x%x\n", __LINE__,__FUNCTION__, @@ -90,19 +88,19 @@ int pcmcia_hardware_enable(int slot) } /* - * Power On. - */ + * Power On. + */ mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot); reg = pcmp->pcmc_pipr; debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n", reg, (reg&PCMCIA_VS1(slot))?"n":"ff", (reg&PCMCIA_VS2(slot))?"n":"ff"); - if ((reg & mask) == mask) { + + if ((reg & mask) == mask) puts (" 5.0V card found: "); - } else { + else puts (" 3.3V card found: "); - } /* switch VCC on */ immap->im_ioport.iop_padat |= 0x8000; /* power enable 3.3V */ @@ -154,8 +152,6 @@ int pcmcia_hardware_disable(int slot) int pcmcia_voltage_set(int slot, int vcc, int vpp) { - volatile immap_t *immap; - volatile pcmconf8xx_t *pcmp; u_long reg; debug ("voltage_set: " @@ -163,12 +159,10 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n", 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10); - immap = (immap_t *)CONFIG_SYS_IMMR; - pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); /* - * Disable PCMCIA buffers (isolate the interface) - * and assert RESET signal - */ + * Disable PCMCIA buffers (isolate the interface) + * and assert RESET signal + */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = PCMCIA_PGCRX(_slot_); reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ @@ -176,10 +170,10 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) udelay(500); /* - * Configure Port C pins for - * 5 Volts Enable and 3 Volts enable, - * Turn all power pins to Hi-Z - */ + * Configure Port C pins for + * 5 Volts Enable and 3 Volts enable, + * Turn all power pins to Hi-Z + */ debug ("PCMCIA power OFF\n"); cfg_ports (); /* Enables switch, but all in Hi-Z */ diff --git a/board/mbx8xx/mbx8xx.c b/board/mbx8xx/mbx8xx.c index 255796bd10..0f014e1ad4 100644 --- a/board/mbx8xx/mbx8xx.c +++ b/board/mbx8xx/mbx8xx.c @@ -117,14 +117,16 @@ static const uint sdram_table_50[] = { /* ------------------------------------------------------------------------- */ +#ifdef CONFIG_SYS_USE_OSCCLK static unsigned int get_reffreq(void); +#endif static unsigned int board_get_cpufreq(void); void mbx_init (void) { volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immr->im_memctl; - ulong speed, refclock, plprcr, sccr; + ulong speed, plprcr, sccr; ulong br0_32 = memctl->memc_br0 & 0x400; /* real-time clock status and control register */ @@ -152,7 +154,6 @@ void mbx_init (void) immr->im_clkrst.car_sccr = sccr; speed = board_get_cpufreq (); - refclock = get_reffreq (); #if ((CONFIG_SYS_PLPRCR & PLPRCR_MF_MSK) != 0) plprcr = CONFIG_SYS_PLPRCR; @@ -163,7 +164,7 @@ void mbx_init (void) #endif #ifdef CONFIG_SYS_USE_OSCCLK /* See doc/README.MBX ! */ - plprcr |= ((speed + refclock / 2) / refclock - 1) << 20; + plprcr |= ((speed + get_reffreq() / 2) / refclock - 1) << 20; #endif immr->im_clkrstk.cark_plprcrk = KAPWR_KEY; @@ -226,21 +227,27 @@ static unsigned int board_get_cpufreq (void) { #ifndef CONFIG_8xx_GCLK_FREQ vpd_packet_t *packet; + ulong *p; packet = vpd_find_packet (VPD_PID_ICS); - return *((ulong *) packet->data); + p = (ulong *)packet->data; + return *p; #else return((unsigned int)CONFIG_8xx_GCLK_FREQ ); #endif /* CONFIG_8xx_GCLK_FREQ */ } +#ifdef CONFIG_SYS_USE_OSCCLK static unsigned int get_reffreq (void) { vpd_packet_t *packet; + ulong *p; packet = vpd_find_packet (VPD_PID_RCS); - return *((ulong *) packet->data); + p = (ulong *)packet->data; + return *p; } +#endif static void board_get_enetaddr(uchar *addr) { diff --git a/board/mbx8xx/pcmcia.c b/board/mbx8xx/pcmcia.c index e672d8c78c..497e260a0a 100644 --- a/board/mbx8xx/pcmcia.c +++ b/board/mbx8xx/pcmcia.c @@ -77,10 +77,7 @@ int pcmcia_voltage_set (int slot, int vcc, int vpp) int pcmcia_hardware_enable (int slot) { - volatile immap_t *immap; - volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; - volatile sysconf8xx_t *sysp; uint reg, mask; debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", @@ -88,10 +85,7 @@ int pcmcia_hardware_enable (int slot) udelay (10000); - immap = (immap_t *) CONFIG_SYS_IMMR; - sysp = (sysconf8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_siu_conf)); pcmp = (pcmconf8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_pcmcia)); - cp = (cpm8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_cpm)); /* clear interrupt state, and disable interrupts */ pcmp->pcmc_pscr = PCMCIA_MASK (_slot_); diff --git a/board/mcc200/auto_update.c b/board/mcc200/auto_update.c index 49213d0b38..4152873845 100644 --- a/board/mcc200/auto_update.c +++ b/board/mcc200/auto_update.c @@ -341,7 +341,7 @@ int do_auto_update(void) { block_dev_desc_t *stor_dev; long sz; - int i, res = 0, bitmap_first, cnt, old_ctrlc, got_ctrlc; + int i, res = 0, cnt, old_ctrlc; char *env; long start, end; @@ -450,8 +450,6 @@ int do_auto_update(void) /* make sure that we see CTRL-C and save the old state */ old_ctrlc = disable_ctrlc(0); - bitmap_first = 0; - /* validate the images first */ for (i = 0; i < AU_MAXFILES; i++) { ulong imsize; @@ -506,14 +504,11 @@ int do_auto_update(void) /* this is really not a good idea, but it's what the */ /* customer wants. */ cnt = 0; - got_ctrlc = 0; do { res = au_do_update(i, sz); /* let the user break out of the loop */ if (ctrlc() || had_ctrlc()) { clear_ctrlc(); - if (res < 0) - got_ctrlc = 1; break; } cnt++; diff --git a/board/mousse/flash.c b/board/mousse/flash.c index d729f33f93..cc405356dc 100644 --- a/board/mousse/flash.c +++ b/board/mousse/flash.c @@ -776,8 +776,7 @@ void flash_print_info (flash_info_t * info) */ int flash_erase (flash_info_t * info, int s_first, int s_last) { - vu_long *addr = (vu_long *) (info->start[0]); - int prot, sect, l_sect; + int prot, sect; flash_dev_t *dev = NULL; if ((s_first < 0) || (s_first > s_last)) { @@ -803,17 +802,12 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("\n"); } - l_sect = -1; - /* Start erase on unprotected sectors */ dev = getFlashDevFromInfo (info); if (dev) { printf ("Erase FLASH[%s] -%d sectors:", dev->name, dev->sectors); for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ - addr = (vu_long *) (dev->base); - /* printf("erase_sector: sector=%d, addr=0x%x\n", - sect, addr); */ printf ("."); if (ERROR == flashEraseSector (dev, sect)) { printf ("ERROR: could not erase sector %d on FLASH[%s]\n", sect, dev->name); diff --git a/board/mpl/common/flash.c b/board/mpl/common/flash.c index 61f031aabe..81d7271a1b 100644 --- a/board/mpl/common/flash.c +++ b/board/mpl/common/flash.c @@ -600,7 +600,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) { volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); volatile FLASH_WORD_SIZE *addr2; - int flag, prot, sect, l_sect; + int flag, prot, sect; int i, rcode = 0; @@ -632,8 +632,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("\n"); } - l_sect = -1; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); @@ -672,7 +670,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) rcode |= wait_for_DQ7(info, sect); } } - l_sect = sect; /* * Wait for each sector to complete, it's more * reliable. According to AMD Spec, you must @@ -691,16 +688,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) /* wait at least 80us - let's wait 1 ms */ udelay (1000); -#if 0 - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - wait_for_DQ7(info, l_sect); - -DONE: -#endif /* reset to read mode */ addr = (FLASH_WORD_SIZE *)info->start[0]; addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ diff --git a/board/netta/codec.c b/board/netta/codec.c index c8d31d72e4..e303aa4780 100644 --- a/board/netta/codec.c +++ b/board/netta/codec.c @@ -1386,34 +1386,31 @@ static inline unsigned int s_transfer_internal(int s_id, unsigned int address, u static void s_write_BR(int s_id, unsigned int regno, unsigned int val) { unsigned int address; - unsigned int v; address = 0x70 | (regno & 15); val &= 0xff; - v = s_transfer_internal(s_id, address, val); + (void)s_transfer_internal(s_id, address, val); } static void s_write_OR(int s_id, unsigned int regno, unsigned int val) { unsigned int address; - unsigned int v; address = 0x70 | (regno & 15); val &= 0xff; - v = s_transfer_internal(s_id, address, val); + (void)s_transfer_internal(s_id, address, val); } static void s_write_NR(int s_id, unsigned int regno, unsigned int val) { unsigned int address; - unsigned int v; address = (regno & 7) << 4; val &= 0xf; - v = s_transfer_internal(s_id, address | val, 0x00); + (void)s_transfer_internal(s_id, address | val, 0x00); } #define BR7_IFR 0x08 /* IDL2 free run */ diff --git a/board/netta/pcmcia.c b/board/netta/pcmcia.c index ed58f2c85e..3fa1925f4c 100644 --- a/board/netta/pcmcia.c +++ b/board/netta/pcmcia.c @@ -147,23 +147,16 @@ static void set_shdn(int what) static void cfg_ports (void) { - volatile immap_t *immap; - volatile cpm8xx_t *cp; - - immap = (immap_t *)CONFIG_SYS_IMMR; - cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); - - cfg_vppd(0); cfg_vppd(1); /* VPPD0,VPPD1 VAVPP => Hi-Z */ cfg_vccd(0); cfg_vccd(1); /* 3V and 5V off */ cfg_shdn(); cfg_oc(); /* - * Configure Port A for TPS2211 PC-Card Power-Interface Switch - * - * Switch off all voltages, assert shutdown - */ + * Configure Port A for TPS2211 PC-Card Power-Interface Switch + * + * Switch off all voltages, assert shutdown + */ set_vppd(0, 1); set_vppd(1, 1); set_vccd(0, 0); set_vccd(1, 0); set_shdn(1); @@ -173,10 +166,7 @@ static void cfg_ports (void) int pcmcia_hardware_enable(int slot) { - volatile immap_t *immap; - volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; - volatile sysconf8xx_t *sysp; uint reg, pipr, mask; int i; @@ -184,10 +174,7 @@ int pcmcia_hardware_enable(int slot) udelay(10000); - immap = (immap_t *)CONFIG_SYS_IMMR; - sysp = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); - cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); /* Configure Ports for TPS2211A PC-Card Power-Interface Switch */ cfg_ports (); @@ -197,9 +184,9 @@ int pcmcia_hardware_enable(int slot) pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_); /* - * Disable interrupts, DMA, and PCMCIA buffers - * (isolate the interface) and assert RESET signal - */ + * Disable interrupts, DMA, and PCMCIA buffers + * (isolate the interface) and assert RESET signal + */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = 0; reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ @@ -221,8 +208,8 @@ int pcmcia_hardware_enable(int slot) } /* - * Power On: Set VAVCC to 3.3V or 5V, set VAVPP to Hi-Z - */ + * Power On: Set VAVCC to 3.3V or 5V, set VAVPP to Hi-Z + */ mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot); pipr = pcmp->pcmc_pipr; debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n", @@ -267,15 +254,10 @@ int pcmcia_hardware_enable(int slot) #if defined(CONFIG_CMD_PCMCIA) int pcmcia_hardware_disable(int slot) { - volatile immap_t *immap; - volatile pcmconf8xx_t *pcmp; u_long reg; debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot); - immap = (immap_t *)CONFIG_SYS_IMMR; - pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); - /* Configure PCMCIA General Control Register */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = 0; @@ -296,24 +278,19 @@ int pcmcia_hardware_disable(int slot) int pcmcia_voltage_set(int slot, int vcc, int vpp) { - volatile immap_t *immap; - volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; u_long reg; - ushort sreg; debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n", 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10); - immap = (immap_t *)CONFIG_SYS_IMMR; - cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); /* - * Disable PCMCIA buffers (isolate the interface) - * and assert RESET signal - */ + * Disable PCMCIA buffers (isolate the interface) + * and assert RESET signal + */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = PCMCIA_PGCRX(_slot_); reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ @@ -322,30 +299,29 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) udelay(500); /* - * Configure Port C pins for - * 5 Volts Enable and 3 Volts enable, - * Turn all power pins to Hi-Z - */ + * Configure Port C pins for + * 5 Volts Enable and 3 Volts enable, + * Turn all power pins to Hi-Z + */ debug ("PCMCIA power OFF\n"); cfg_ports (); /* Enables switch, but all in Hi-Z */ - sreg = immap->im_ioport.iop_pcdat; set_vppd(0, 1); set_vppd(1, 1); switch(vcc) { - case 0: - break; /* Switch off */ + case 0: + break; /* Switch off */ - case 33: - set_vccd(0, 1); set_vccd(1, 0); - break; + case 33: + set_vccd(0, 1); set_vccd(1, 0); + break; - case 50: - set_vccd(0, 0); set_vccd(1, 1); - break; + case 50: + set_vccd(0, 0); set_vccd(1, 1); + break; - default: - goto done; + default: + goto done; } /* Checking supported voltages */ diff --git a/board/pm520/flash.c b/board/pm520/flash.c index 64c8624157..01dcd560c9 100644 --- a/board/pm520/flash.c +++ b/board/pm520/flash.c @@ -370,7 +370,7 @@ static unsigned char intel_sector_protected (flash_info_t *info, ushort sector) int flash_erase (flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -404,7 +404,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) } start = get_timer (0); - last = start; /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -440,6 +439,10 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf (" done\n"); } } + + if (flag) + enable_interrupts(); + return rcode; } @@ -543,6 +546,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) ulong status; ulong start; int flag; + int rcode = 0; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -561,14 +565,17 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (1); + rcode = 1; + break; } } *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); + if (flag) + enable_interrupts(); + + return rcode; } void inline spin_wheel (void) diff --git a/board/r360mpi/pcmcia.c b/board/r360mpi/pcmcia.c index 85da41bd22..a939b31d47 100644 --- a/board/r360mpi/pcmcia.c +++ b/board/r360mpi/pcmcia.c @@ -19,7 +19,6 @@ int pcmcia_hardware_enable(int slot) { volatile immap_t *immap; - volatile cpm8xx_t *cp; volatile pcmconf8xx_t *pcmp; volatile sysconf8xx_t *sysp; uint reg, mask; @@ -31,7 +30,6 @@ int pcmcia_hardware_enable(int slot) immap = (immap_t *)CONFIG_SYS_IMMR; sysp = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf)); pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); - cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm)); /* * Configure SIUMCR to enable PCMCIA port B @@ -127,13 +125,11 @@ int pcmcia_hardware_enable(int slot) int pcmcia_hardware_disable(int slot) { volatile immap_t *immap; - volatile pcmconf8xx_t *pcmp; u_long reg; debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot); immap = (immap_t *)CONFIG_SYS_IMMR; - pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); /* remove all power */ immap->im_ioport.iop_pcdat |= 0x0400; diff --git a/board/rbc823/flash.c b/board/rbc823/flash.c index cb1e089f38..6be2bc92f4 100644 --- a/board/rbc823/flash.c +++ b/board/rbc823/flash.c @@ -24,32 +24,30 @@ #include <common.h> #include <mpc8xx.h> -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; -/*----------------------------------------------------------------------- +/* * Functions */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info); -static int write_word (flash_info_t *info, ulong dest, ulong data); -static void flash_get_offsets (ulong base, flash_info_t *info); - -/*----------------------------------------------------------------------- - */ +static ulong flash_get_size(vu_long *addr, flash_info_t *info); +static int write_word(flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets(ulong base, flash_info_t *info); -unsigned long flash_init (void) +unsigned long flash_init(void) { - unsigned long size_b0, size_b1; + unsigned long size_b0; int i; /* Init: no FLASHes known */ - for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) - flash_info[i].flash_id = FLASH_UNKNOWN; + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) + flash_info[i].flash_id = FLASH_UNKNOWN; /* Detect size */ - size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); + size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, + &flash_info[0]); /* Setup offsets */ - flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); + flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]); #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* Monitor protection ON by default */ @@ -59,21 +57,15 @@ unsigned long flash_init (void) &flash_info[0]); #endif - size_b1 = 0 ; - - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[1].sector_count = -1; - flash_info[0].size = size_b0; - flash_info[1].size = size_b1; - return (size_b0 + size_b1); + return size_b0; } /*----------------------------------------------------------------------- * Fix this to support variable sector sizes */ -static void flash_get_offsets (ulong base, flash_info_t *info) +static void flash_get_offsets(ulong base, flash_info_t *info) { int i; @@ -87,83 +79,93 @@ static void flash_get_offsets (ulong base, flash_info_t *info) /*----------------------------------------------------------------------- */ -void flash_print_info (flash_info_t *info) +void flash_print_info(flash_info_t *info) { int i; - if (info->flash_id == FLASH_UNKNOWN) - { - puts ("missing or unknown FLASH type\n"); + if (info->flash_id == FLASH_UNKNOWN) { + puts("missing or unknown FLASH type\n"); return; } - switch (info->flash_id & FLASH_VENDMASK) - { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; - default: printf ("Unknown Vendor "); break; + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: + printf("AMD "); + break; + case FLASH_MAN_FUJ: + printf("FUJITSU "); + break; + case FLASH_MAN_BM: + printf("BRIGHT MICRO "); + break; + default: + printf("Unknown Vendor "); + break; } - switch (info->flash_id & FLASH_TYPEMASK) - { - case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); - break; - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); - break; - default: printf ("Unknown Chip Type\n"); - break; + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM040: + printf("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); + break; + case FLASH_AM400B: + printf("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: + printf("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: + printf("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: + printf("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: + printf("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: + printf("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: + printf("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: + printf("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + default: + printf("Unknown Chip Type\n"); + break; } if (info->size >> 20) { - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, - info->sector_count); + printf(" Size: %ld MB in %d Sectors\n", + info->size >> 20, + info->sector_count); } else { - printf (" Size: %ld KB in %d Sectors\n", - info->size >> 10, - info->sector_count); + printf(" Size: %ld KB in %d Sectors\n", + info->size >> 10, + info->sector_count); } - puts (" Sector Start Addresses:"); + puts(" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) - { + for (i = 0; i < info->sector_count; ++i) { if ((i % 5) == 0) - { - puts ("\n "); - } + puts("\n "); - printf (" %08lX%s", + printf(" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " "); } - putc ('\n'); + putc('\n'); return; } -/*----------------------------------------------------------------------- - */ /* * The following code cannot be run from FLASH! */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info) +static ulong flash_get_size(vu_long *addr, flash_info_t *info) { short i; volatile unsigned char *caddr; @@ -173,9 +175,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) /* Write auto select command: read Manufacturer ID */ -#if 0 - printf("Base address is: %08x\n", caddr); -#endif + debug("Base address is: %8p\n", caddr); caddr[0x0555] = 0xAA; caddr[0x02AA] = 0x55; @@ -183,51 +183,49 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) value = caddr[0]; -#if 0 - printf("Manufact ID: %02x\n", value); -#endif - switch (value) - { - case 0x01: /*AMD_MANUFACT*/ - info->flash_id = FLASH_MAN_AMD; + debug("Manufact ID: %02x\n", value); + + switch (value) { + case 0x01: /*AMD_MANUFACT*/ + info->flash_id = FLASH_MAN_AMD; break; - case 0x04: /*FUJ_MANUFACT*/ - info->flash_id = FLASH_MAN_FUJ; + case 0x04: /*FUJ_MANUFACT*/ + info->flash_id = FLASH_MAN_FUJ; break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - break; + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + break; } value = caddr[1]; /* device ID */ -#if 0 - printf("Device ID: %02x\n", value); -#endif - switch (value) - { - case AMD_ID_LV040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 512Kb */ - - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ + debug("Device ID: %02x\n", value); + + switch (value) { + case AMD_ID_LV040B: + info->flash_id += FLASH_AM040; + info->sector_count = 8; + info->size = 0x00080000; + break; /* => 512Kb */ + + default: + info->flash_id = FLASH_UNKNOWN; + return 0; /* => no or unknown flash */ } - flash_get_offsets ((ulong)addr, &flash_info[0]); + flash_get_offsets((ulong)addr, &flash_info[0]); /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) - { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ + for (i = 0; i < info->sector_count; i++) { + /* + * read sector protection at sector address, + * (A7 .. A0) = 0x02 + * D0 = 1 if protected + */ caddr = (volatile unsigned char *)(info->start[i]); info->protect[i] = caddr[2] & 1; } @@ -235,52 +233,48 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) /* * Prevent writes to uninitialized FLASH. */ - if (info->flash_id != FLASH_UNKNOWN) - { + if (info->flash_id != FLASH_UNKNOWN) { caddr = (volatile unsigned char *)info->start[0]; *caddr = 0xF0; /* reset bank */ } - return (info->size); + return info->size; } -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) +int flash_erase(flash_info_t *info, int s_first, int s_last) { - volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]); + volatile unsigned char *addr = + (volatile unsigned char *)(info->start[0]); int flag, prot, sect, l_sect; ulong start, now, last; if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } + if (info->flash_id == FLASH_UNKNOWN) + printf("- missing\n"); + else + printf("- no sectors to erase\n"); + return 1; } if ((info->flash_id == FLASH_UNKNOWN) || (info->flash_id > FLASH_AMD_COMP)) { - printf ("Can't erase unknown flash type - aborted\n"); + printf("Can't erase unknown flash type - aborted\n"); return 1; } prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) prot++; - } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", + printf("- Warning: %d protected sectors will not be erased!\n", prot); } else { - printf ("\n"); + printf("\n"); } l_sect = -1; @@ -295,7 +289,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) addr[0x02AA] = 0x55; /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { + for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr = (volatile unsigned char *)(info->start[sect]); addr[0] = 0x30; @@ -308,7 +302,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ - udelay (1000); + udelay(1000); /* * We wait for the last triggered sector @@ -316,19 +310,19 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) if (l_sect < 0) goto DONE; - start = get_timer (0); + start = get_timer(0); last = start; addr = (volatile unsigned char *)(info->start[l_sect]); - while ((addr[0] & 0xFF) != 0xFF) - { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); + while ((addr[0] & 0xFF) != 0xFF) { + now = get_timer(start); + if (now > CONFIG_SYS_FLASH_ERASE_TOUT) { + printf("Timeout\n"); return 1; } /* show that we're waiting */ if ((now - last) > 1000) { /* every second */ - putc ('.'); + putc('.'); last = now; } } @@ -339,18 +333,18 @@ DONE: addr[0] = 0xF0; /* reset bank */ - printf (" done\n"); + printf(" done\n"); return 0; } -/*----------------------------------------------------------------------- +/* * Copy memory to flash, returns: * 0 - OK * 1 - write timeout * 2 - Flash not erased */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; @@ -360,23 +354,27 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) /* * handle unaligned start bytes */ - if ((l = addr - wp) != 0) { + l = addr - wp; + + if (l != 0) { data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { + for (i = 0, cp = wp; i < l; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - for (; i<4 && cnt>0; ++i) { + + for (; i < 4 && cnt > 0; ++i) { data = (data << 8) | *src++; --cnt; ++cp; } - for (; cnt==0 && i<4; ++i, ++cp) { + + for (; cnt == 0 && i < 4; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } + rc = write_word(info, wp, data); + + if (rc != 0) + return rc; + wp += 4; } @@ -385,45 +383,46 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) */ while (cnt >= 4) { data = 0; - for (i=0; i<4; ++i) { + for (i = 0; i < 4; ++i) data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } + + rc = write_word(info, wp, data); + + if (rc != 0) + return rc; + wp += 4; cnt -= 4; } - if (cnt == 0) { - return (0); - } + if (cnt == 0) + return 0; /* * handle unaligned tail bytes */ data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { data = (data << 8) | *src++; --cnt; } - for (; i<4; ++i, ++cp) { + for (; i < 4; ++i, ++cp) data = (data << 8) | (*(uchar *)cp); - } - return (write_word(info, wp, data)); + return write_word(info, wp, data); } -/*----------------------------------------------------------------------- +/* * Write a word to Flash, returns: * 0 - OK * 1 - write timeout * 2 - Flash not erased */ -static int write_word (flash_info_t *info, ulong dest, ulong data) +static int write_word(flash_info_t *info, ulong dest, ulong data) { - volatile unsigned char *addr = (volatile unsigned char*)(info->start[0]), - *cdest,*cdata; + volatile unsigned char *cdest, *cdata; + volatile unsigned char *addr = + (volatile unsigned char *)(info->start[0]); ulong start; int flag, count = 4 ; @@ -431,39 +430,32 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) cdata = (volatile unsigned char *)&data ; /* Check if Flash is (sufficiently) erased */ - if ((*((vu_long *)dest) & data) != data) { - return (2); - } + if ((*((vu_long *)dest)&data) != data) + return 2; - while(count--) - { - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); + while (count--) { + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); - addr[0x0555] = 0xAA; - addr[0x02AA] = 0x55; - addr[0x0555] = 0xA0; + addr[0x0555] = 0xAA; + addr[0x02AA] = 0x55; + addr[0x0555] = 0xA0; - *cdest = *cdata; + *cdest = *cdata; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* data polling for D7 */ - start = get_timer (0); - while ((*cdest ^ *cdata) & 0x80) - { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); + /* data polling for D7 */ + start = get_timer(0); + while ((*cdest ^ *cdata) & 0x80) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) + return 1; } - } - cdata++ ; - cdest++ ; + cdata++ ; + cdest++ ; } - return (0); + return 0; } - -/*----------------------------------------------------------------------- - */ diff --git a/board/rpxsuper/flash.c b/board/rpxsuper/flash.c index be29b65cf4..70ae1d2ff9 100644 --- a/board/rpxsuper/flash.c +++ b/board/rpxsuper/flash.c @@ -47,41 +47,39 @@ static int write_word (flash_info_t *info, ulong dest, ulong data); /*----------------------------------------------------------------------- */ -unsigned long flash_init (void) +unsigned long flash_init(void) { - unsigned long size; - int i; + int i; - /* Init: no FLASHes known */ - for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { - flash_info[i].flash_id = FLASH_UNKNOWN; - } + /* Init: no FLASHes known */ + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) + flash_info[i].flash_id = FLASH_UNKNOWN; - /* for now, only support the 4 MB Flash SIMM */ - size = flash_get_size((vu_long *)CONFIG_SYS_FLASH0_BASE, &flash_info[0]); + /* for now, only support the 4 MB Flash SIMM */ + (void)flash_get_size((vu_long *) CONFIG_SYS_FLASH0_BASE, + &flash_info[0]); - /* - * protect monitor and environment sectors - */ + /* + * protect monitor and environment sectors + */ #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH0_BASE - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[0]); #endif #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) -# ifndef CONFIG_ENV_SIZE -# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -# endif - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); +#ifndef CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#endif + flash_protect(FLAG_PROTECT_SET, + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); #endif - return /*size*/ (CONFIG_SYS_FLASH0_SIZE * 1024 * 1024); + return CONFIG_SYS_FLASH0_SIZE * 1024 * 1024; } /*----------------------------------------------------------------------- diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c index 61cab87035..536d7de0e0 100644 --- a/board/sacsng/sacsng.c +++ b/board/sacsng/sacsng.c @@ -39,7 +39,7 @@ extern void eth_loopback_test(void); #endif /* CONFIG_ETHER_LOOPBACK_TEST */ #include "clkinit.h" -#include "ioconfig.h" /* I/O configuration table */ +#include "ioconfig.h" /* I/O configuration table */ /* * PBI Page Based Interleaving @@ -61,88 +61,86 @@ extern void eth_loopback_test(void); /* * ADC/DAC Defines: */ -#define INITIAL_SAMPLE_RATE 10016 /* Initial Daq sample rate */ -#define INITIAL_RIGHT_JUST 0 /* Initial DAC right justification */ -#define INITIAL_MCLK_DIVIDE 0 /* Initial MCLK Divide */ -#define INITIAL_SAMPLE_64X 1 /* Initial 64x clocking mode */ -#define INITIAL_SAMPLE_128X 0 /* Initial 128x clocking mode */ +#define INITIAL_SAMPLE_RATE 10016 /* Initial Daq sample rate */ +#define INITIAL_RIGHT_JUST 0 /* Initial DAC right justification */ +#define INITIAL_MCLK_DIVIDE 0 /* Initial MCLK Divide */ +#define INITIAL_SAMPLE_64X 1 /* Initial 64x clocking mode */ +#define INITIAL_SAMPLE_128X 0 /* Initial 128x clocking mode */ /* * ADC Defines: */ -#define I2C_ADC_1_ADDR 0x0E /* I2C Address of the ADC #1 */ -#define I2C_ADC_2_ADDR 0x0F /* I2C Address of the ADC #2 */ +#define I2C_ADC_1_ADDR 0x0E /* I2C Address of the ADC #1 */ +#define I2C_ADC_2_ADDR 0x0F /* I2C Address of the ADC #2 */ -#define ADC_SDATA1_MASK 0x00020000 /* PA14 - CH12SDATA_PU */ -#define ADC_SDATA2_MASK 0x00010000 /* PA15 - CH34SDATA_PU */ +#define ADC_SDATA1_MASK 0x00020000 /* PA14 - CH12SDATA_PU */ +#define ADC_SDATA2_MASK 0x00010000 /* PA15 - CH34SDATA_PU */ -#define ADC_VREF_CAP 100 /* VREF capacitor in uF */ -#define ADC_INITIAL_DELAY (10 * ADC_VREF_CAP) /* 10 usec per uF, in usec */ -#define ADC_SDATA_DELAY 100 /* ADC SDATA release delay in usec */ +#define ADC_VREF_CAP 100 /* VREF capacitor in uF */ +#define ADC_INITIAL_DELAY (10 * ADC_VREF_CAP) /* 10 usec per uF, in usec */ +#define ADC_SDATA_DELAY 100 /* ADC SDATA release delay in usec */ #define ADC_CAL_DELAY (1000000 / INITIAL_SAMPLE_RATE * 4500) - /* Wait at least 4100 LRCLK's */ - -#define ADC_REG1_FRAME_START 0x80 /* Frame start */ -#define ADC_REG1_GROUND_CAL 0x40 /* Ground calibration enable */ -#define ADC_REG1_ANA_MOD_PDOWN 0x20 /* Analog modulator section in power down */ -#define ADC_REG1_DIG_MOD_PDOWN 0x10 /* Digital modulator section in power down */ - -#define ADC_REG2_128x 0x80 /* Oversample at 128x */ -#define ADC_REG2_CAL 0x40 /* System calibration enable */ -#define ADC_REG2_CHANGE_SIGN 0x20 /* Change sign enable */ -#define ADC_REG2_LR_DISABLE 0x10 /* Left/Right output disable */ -#define ADC_REG2_HIGH_PASS_DIS 0x08 /* High pass filter disable */ -#define ADC_REG2_SLAVE_MODE 0x04 /* Slave mode */ -#define ADC_REG2_DFS 0x02 /* Digital format select */ -#define ADC_REG2_MUTE 0x01 /* Mute */ - -#define ADC_REG7_ADDR_ENABLE 0x80 /* Address enable */ -#define ADC_REG7_PEAK_ENABLE 0x40 /* Peak enable */ -#define ADC_REG7_PEAK_UPDATE 0x20 /* Peak update */ -#define ADC_REG7_PEAK_FORMAT 0x10 /* Peak display format */ -#define ADC_REG7_DIG_FILT_PDOWN 0x04 /* Digital filter power down enable */ -#define ADC_REG7_FIR2_IN_EN 0x02 /* External FIR2 input enable */ -#define ADC_REG7_PSYCHO_EN 0x01 /* External pyscho filter input enable */ + /* Wait at least 4100 LRCLK's */ + +#define ADC_REG1_FRAME_START 0x80 /* Frame start */ +#define ADC_REG1_GROUND_CAL 0x40 /* Ground calibration enable */ +#define ADC_REG1_ANA_MOD_PDOWN 0x20 /* Analog modulator section in power down */ +#define ADC_REG1_DIG_MOD_PDOWN 0x10 /* Digital modulator section in power down */ + +#define ADC_REG2_128x 0x80 /* Oversample at 128x */ +#define ADC_REG2_CAL 0x40 /* System calibration enable */ +#define ADC_REG2_CHANGE_SIGN 0x20 /* Change sign enable */ +#define ADC_REG2_LR_DISABLE 0x10 /* Left/Right output disable */ +#define ADC_REG2_HIGH_PASS_DIS 0x08 /* High pass filter disable */ +#define ADC_REG2_SLAVE_MODE 0x04 /* Slave mode */ +#define ADC_REG2_DFS 0x02 /* Digital format select */ +#define ADC_REG2_MUTE 0x01 /* Mute */ + +#define ADC_REG7_ADDR_ENABLE 0x80 /* Address enable */ +#define ADC_REG7_PEAK_ENABLE 0x40 /* Peak enable */ +#define ADC_REG7_PEAK_UPDATE 0x20 /* Peak update */ +#define ADC_REG7_PEAK_FORMAT 0x10 /* Peak display format */ +#define ADC_REG7_DIG_FILT_PDOWN 0x04 /* Digital filter power down enable */ +#define ADC_REG7_FIR2_IN_EN 0x02 /* External FIR2 input enable */ +#define ADC_REG7_PSYCHO_EN 0x01 /* External pyscho filter input enable */ /* * DAC Defines: */ -#define I2C_DAC_ADDR 0x11 /* I2C Address of the DAC */ +#define I2C_DAC_ADDR 0x11 /* I2C Address of the DAC */ -#define DAC_RST_MASK 0x00008000 /* PA16 - DAC_RST* */ -#define DAC_RESET_DELAY 100 /* DAC reset delay in usec */ -#define DAC_INITIAL_DELAY 5000 /* DAC initialization delay in usec */ +#define DAC_RST_MASK 0x00008000 /* PA16 - DAC_RST* */ +#define DAC_RESET_DELAY 100 /* DAC reset delay in usec */ +#define DAC_INITIAL_DELAY 5000 /* DAC initialization delay in usec */ -#define DAC_REG1_AMUTE 0x80 /* Auto-mute */ +#define DAC_REG1_AMUTE 0x80 /* Auto-mute */ -#define DAC_REG1_LEFT_JUST_24_BIT (0 << 4) /* Fmt 0: Left justified 24 bit */ -#define DAC_REG1_I2S_24_BIT (1 << 4) /* Fmt 1: I2S up to 24 bit */ -#define DAC_REG1_RIGHT_JUST_16BIT (2 << 4) /* Fmt 2: Right justified 16 bit */ -#define DAC_REG1_RIGHT_JUST_24BIT (3 << 4) /* Fmt 3: Right justified 24 bit */ -#define DAC_REG1_RIGHT_JUST_20BIT (4 << 4) /* Fmt 4: Right justified 20 bit */ -#define DAC_REG1_RIGHT_JUST_18BIT (5 << 4) /* Fmt 5: Right justified 18 bit */ +#define DAC_REG1_LEFT_JUST_24_BIT (0 << 4) /* Fmt 0: Left justified 24 bit */ +#define DAC_REG1_I2S_24_BIT (1 << 4) /* Fmt 1: I2S up to 24 bit */ +#define DAC_REG1_RIGHT_JUST_16BIT (2 << 4) /* Fmt 2: Right justified 16 bit */ +#define DAC_REG1_RIGHT_JUST_24BIT (3 << 4) /* Fmt 3: Right justified 24 bit */ +#define DAC_REG1_RIGHT_JUST_20BIT (4 << 4) /* Fmt 4: Right justified 20 bit */ +#define DAC_REG1_RIGHT_JUST_18BIT (5 << 4) /* Fmt 5: Right justified 18 bit */ -#define DAC_REG1_DEM_NO (0 << 2) /* No De-emphasis */ -#define DAC_REG1_DEM_44KHZ (1 << 2) /* 44.1KHz De-emphasis */ -#define DAC_REG1_DEM_48KHZ (2 << 2) /* 48KHz De-emphasis */ -#define DAC_REG1_DEM_32KHZ (3 << 2) /* 32KHz De-emphasis */ +#define DAC_REG1_DEM_NO (0 << 2) /* No De-emphasis */ +#define DAC_REG1_DEM_44KHZ (1 << 2) /* 44.1KHz De-emphasis */ +#define DAC_REG1_DEM_48KHZ (2 << 2) /* 48KHz De-emphasis */ +#define DAC_REG1_DEM_32KHZ (3 << 2) /* 32KHz De-emphasis */ -#define DAC_REG1_SINGLE 0 /* 4- 50KHz sample rate */ -#define DAC_REG1_DOUBLE 1 /* 50-100KHz sample rate */ -#define DAC_REG1_QUAD 2 /* 100-200KHz sample rate */ -#define DAC_REG1_DSD 3 /* Direct Stream Data, DSD */ +#define DAC_REG1_SINGLE 0 /* 4- 50KHz sample rate */ +#define DAC_REG1_DOUBLE 1 /* 50-100KHz sample rate */ +#define DAC_REG1_QUAD 2 /* 100-200KHz sample rate */ +#define DAC_REG1_DSD 3 /* Direct Stream Data, DSD */ -#define DAC_REG5_INVERT_A 0x80 /* Invert channel A */ -#define DAC_REG5_INVERT_B 0x40 /* Invert channel B */ -#define DAC_REG5_I2C_MODE 0x20 /* Control port (I2C) mode */ -#define DAC_REG5_POWER_DOWN 0x10 /* Power down mode */ -#define DAC_REG5_MUTEC_A_B 0x08 /* Mutec A=B */ -#define DAC_REG5_FREEZE 0x04 /* Freeze */ -#define DAC_REG5_MCLK_DIV 0x02 /* MCLK divide by 2 */ -#define DAC_REG5_RESERVED 0x01 /* Reserved */ - -/* ------------------------------------------------------------------------- */ +#define DAC_REG5_INVERT_A 0x80 /* Invert channel A */ +#define DAC_REG5_INVERT_B 0x40 /* Invert channel B */ +#define DAC_REG5_I2C_MODE 0x20 /* Control port (I2C) mode */ +#define DAC_REG5_POWER_DOWN 0x10 /* Power down mode */ +#define DAC_REG5_MUTEC_A_B 0x08 /* Mutec A=B */ +#define DAC_REG5_FREEZE 0x04 /* Freeze */ +#define DAC_REG5_MCLK_DIV 0x02 /* MCLK divide by 2 */ +#define DAC_REG5_RESERVED 0x01 /* Reserved */ /* * Check Board Identity: @@ -150,290 +148,297 @@ extern void eth_loopback_test(void); int checkboard(void) { - printf ("SACSng\n"); + printf("SACSng\n"); - return 0; + return 0; } -/* ------------------------------------------------------------------------- */ - phys_size_t initdram(int board_type) { - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; - volatile memctl8260_t *memctl = &immap->im_memctl; - volatile uchar c = 0; - volatile uchar *ramaddr = (uchar *)(CONFIG_SYS_SDRAM_BASE + 0x8); - uint psdmr = CONFIG_SYS_PSDMR; - int i; - uint psrt = 14; /* for no SPD */ - uint chipselects = 1; /* for no SPD */ - uint sdram_size = CONFIG_SYS_SDRAM0_SIZE * 1024 * 1024; /* for no SPD */ - uint or = CONFIG_SYS_OR2_PRELIM; /* for no SPD */ + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; + volatile memctl8260_t *memctl = &immap->im_memctl; + volatile uchar c = 0; + volatile uchar *ramaddr = (uchar *)(CONFIG_SYS_SDRAM_BASE + 0x8); + uint psdmr = CONFIG_SYS_PSDMR; + int i; + uint psrt = 14; /* for no SPD */ + uint chipselects = 1; /* for no SPD */ + uint sdram_size = CONFIG_SYS_SDRAM0_SIZE * 1024 * 1024; /* for no SPD */ + uint or = CONFIG_SYS_OR2_PRELIM; /* for no SPD */ + #ifdef SDRAM_SPD_ADDR - uint data_width; - uint rows; - uint banks; - uint cols; - uint caslatency; - uint width; - uint rowst; - uint sdam; - uint bsma; - uint sda10; - u_char spd_size; - u_char data; - u_char cksum; - int j; + uint data_width; + uint rows; + uint banks; + uint cols; + uint caslatency; + uint width; + uint rowst; + uint sdam; + uint bsma; + uint sda10; + u_char data; + u_char cksum; + int j; #endif #ifdef SDRAM_SPD_ADDR - /* Keep the compiler from complaining about potentially uninitialized vars */ - data_width = chipselects = rows = banks = cols = caslatency = psrt = 0; - - /* - * Read the SDRAM SPD EEPROM via I2C. - */ - i2c_read(SDRAM_SPD_ADDR, 0, 1, &data, 1); - spd_size = data; - cksum = data; - for(j = 1; j < 64; j++) { /* read only the checksummed bytes */ - /* note: the I2C address autoincrements when alen == 0 */ - i2c_read(SDRAM_SPD_ADDR, 0, 0, &data, 1); - if(j == 5) chipselects = data & 0x0F; - else if(j == 6) data_width = data; - else if(j == 7) data_width |= data << 8; - else if(j == 3) rows = data & 0x0F; - else if(j == 4) cols = data & 0x0F; - else if(j == 12) { - /* - * Refresh rate: this assumes the prescaler is set to - * approximately 1uSec per tick. - */ - switch(data & 0x7F) { - default: - case 0: psrt = 14 ; /* 15.625uS */ break; - case 1: psrt = 2; /* 3.9uS */ break; - case 2: psrt = 6; /* 7.8uS */ break; - case 3: psrt = 29; /* 31.3uS */ break; - case 4: psrt = 60; /* 62.5uS */ break; - case 5: psrt = 120; /* 125uS */ break; - } - } - else if(j == 17) banks = data; - else if(j == 18) { - caslatency = 3; /* default CL */ + /* Keep the compiler from complaining about potentially uninitialized vars */ + data_width = chipselects = rows = banks = cols = caslatency = psrt = + 0; + + /* + * Read the SDRAM SPD EEPROM via I2C. + */ + i2c_read(SDRAM_SPD_ADDR, 0, 1, &data, 1); + cksum = data; + for (j = 1; j < 64; j++) { /* read only the checksummed bytes */ + /* note: the I2C address autoincrements when alen == 0 */ + i2c_read(SDRAM_SPD_ADDR, 0, 0, &data, 1); + if (j == 5) + chipselects = data & 0x0F; + else if (j == 6) + data_width = data; + else if (j == 7) + data_width |= data << 8; + else if (j == 3) + rows = data & 0x0F; + else if (j == 4) + cols = data & 0x0F; + else if (j == 12) { + /* + * Refresh rate: this assumes the prescaler is set to + * approximately 1uSec per tick. + */ + switch (data & 0x7F) { + default: + case 0: + psrt = 14; /* 15.625uS */ + break; + case 1: + psrt = 2; /* 3.9uS */ + break; + case 2: + psrt = 6; /* 7.8uS */ + break; + case 3: + psrt = 29; /* 31.3uS */ + break; + case 4: + psrt = 60; /* 62.5uS */ + break; + case 5: + psrt = 120; /* 125uS */ + break; + } + } else if (j == 17) + banks = data; + else if (j == 18) { + caslatency = 3; /* default CL */ #if(PESSIMISTIC_SDRAM) - if((data & 0x04) != 0) caslatency = 3; - else if((data & 0x02) != 0) caslatency = 2; - else if((data & 0x01) != 0) caslatency = 1; + if ((data & 0x04) != 0) + caslatency = 3; + else if ((data & 0x02) != 0) + caslatency = 2; + else if ((data & 0x01) != 0) + caslatency = 1; #else - if((data & 0x01) != 0) caslatency = 1; - else if((data & 0x02) != 0) caslatency = 2; - else if((data & 0x04) != 0) caslatency = 3; + if ((data & 0x01) != 0) + caslatency = 1; + else if ((data & 0x02) != 0) + caslatency = 2; + else if ((data & 0x04) != 0) + caslatency = 3; #endif - else { - printf ("WARNING: Unknown CAS latency 0x%02X, using 3\n", - data); - } + else { + printf("WARNING: Unknown CAS latency 0x%02X, using 3\n", data); + } + } else if (j == 63) { + if (data != cksum) { + printf("WARNING: Configuration data checksum failure:" " is 0x%02x, calculated 0x%02x\n", data, cksum); + } + } + cksum += data; } - else if(j == 63) { - if(data != cksum) { - printf ("WARNING: Configuration data checksum failure:" - " is 0x%02x, calculated 0x%02x\n", - data, cksum); - } + + /* We don't trust CL less than 2 (only saw it on an old 16MByte DIMM) */ + if (caslatency < 2) { + printf("WARNING: CL was %d, forcing to 2\n", caslatency); + caslatency = 2; + } + if (rows > 14) { + printf("WARNING: This doesn't look good, rows = %d, should be <= 14\n", + rows); + rows = 14; + } + if (cols > 11) { + printf("WARNING: This doesn't look good, columns = %d, should be <= 11\n", + cols); + cols = 11; + } + + if ((data_width != 64) && (data_width != 72)) { + printf("WARNING: SDRAM width unsupported, is %d, expected 64 or 72.\n", + data_width); } - cksum += data; - } - - /* We don't trust CL less than 2 (only saw it on an old 16MByte DIMM) */ - if(caslatency < 2) { - printf("WARNING: CL was %d, forcing to 2\n", caslatency); - caslatency = 2; - } - if(rows > 14) { - printf("WARNING: This doesn't look good, rows = %d, should be <= 14\n", rows); - rows = 14; - } - if(cols > 11) { - printf("WARNING: This doesn't look good, columns = %d, should be <= 11\n", cols); - cols = 11; - } - - if((data_width != 64) && (data_width != 72)) - { - printf("WARNING: SDRAM width unsupported, is %d, expected 64 or 72.\n", - data_width); - } - width = 3; /* 2^3 = 8 bytes = 64 bits wide */ - /* - * Convert banks into log2(banks) - */ - if (banks == 2) banks = 1; - else if(banks == 4) banks = 2; - else if(banks == 8) banks = 3; - - sdram_size = 1 << (rows + cols + banks + width); - -#if(CONFIG_PBI == 0) /* bank-based interleaving */ - rowst = ((32 - 6) - (rows + cols + width)) * 2; + width = 3; /* 2^3 = 8 bytes = 64 bits wide */ + /* + * Convert banks into log2(banks) + */ + if (banks == 2) + banks = 1; + else if (banks == 4) + banks = 2; + else if (banks == 8) + banks = 3; + + sdram_size = 1 << (rows + cols + banks + width); + +#if(CONFIG_PBI == 0) /* bank-based interleaving */ + rowst = ((32 - 6) - (rows + cols + width)) * 2; #else - rowst = 32 - (rows + banks + cols + width); + rowst = 32 - (rows + banks + cols + width); #endif - or = ~(sdram_size - 1) | /* SDAM address mask */ - ((banks-1) << 13) | /* banks per device */ - (rowst << 9) | /* rowst */ - ((rows - 9) << 6); /* numr */ - - memctl->memc_or2 = or; - - /* - * SDAM specifies the number of columns that are multiplexed - * (reference AN2165/D), defined to be (columns - 6) for page - * interleave, (columns - 8) for bank interleave. - * - * BSMA is 14 - max(rows, cols). The bank select lines come - * into play above the highest "address" line going into the - * the SDRAM. - */ -#if(CONFIG_PBI == 0) /* bank-based interleaving */ - sdam = cols - 8; - bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols); - sda10 = sdam + 2; + or = ~(sdram_size - 1) | /* SDAM address mask */ + ((banks - 1) << 13) | /* banks per device */ + (rowst << 9) | /* rowst */ + ((rows - 9) << 6); /* numr */ + + memctl->memc_or2 = or; + + /* + * SDAM specifies the number of columns that are multiplexed + * (reference AN2165/D), defined to be (columns - 6) for page + * interleave, (columns - 8) for bank interleave. + * + * BSMA is 14 - max(rows, cols). The bank select lines come + * into play above the highest "address" line going into the + * the SDRAM. + */ +#if(CONFIG_PBI == 0) /* bank-based interleaving */ + sdam = cols - 8; + bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols); + sda10 = sdam + 2; #else - sdam = cols - 6; - bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols); - sda10 = sdam; + sdam = cols - 6; + bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols); + sda10 = sdam; #endif #if(PESSIMISTIC_SDRAM) - psdmr = (CONFIG_PBI |\ - PSDMR_RFEN |\ - PSDMR_RFRC_16_CLK |\ - PSDMR_PRETOACT_8W |\ - PSDMR_ACTTORW_8W |\ - PSDMR_WRC_4C |\ - PSDMR_EAMUX |\ - PSDMR_BUFCMD) |\ - caslatency |\ - ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \ - (sdam << 24) |\ - (bsma << 21) |\ - (sda10 << 18); + psdmr = (CONFIG_PBI | PSDMR_RFEN | PSDMR_RFRC_16_CLK | + PSDMR_PRETOACT_8W | PSDMR_ACTTORW_8W | PSDMR_WRC_4C | + PSDMR_EAMUX | PSDMR_BUFCMD) | caslatency | + ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ + (sdam << 24) | (bsma << 21) | (sda10 << 18); #else - psdmr = (CONFIG_PBI |\ - PSDMR_RFEN |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_3W | /* 1 for 7E parts (fast PC-133) */ \ - PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ \ - PSDMR_WRC_1C | /* 1 clock + 7nSec */ - EAMUX |\ - BUFCMD) |\ - caslatency |\ - ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \ - (sdam << 24) |\ - (bsma << 21) |\ - (sda10 << 18); + psdmr = (CONFIG_PBI | PSDMR_RFEN | PSDMR_RFRC_7_CLK | + PSDMR_PRETOACT_3W | /* 1 for 7E parts (fast PC-133) */ + PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ + PSDMR_WRC_1C | /* 1 clock + 7nSec */ + EAMUX | BUFCMD) | + caslatency | ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ + (sdam << 24) | (bsma << 21) | (sda10 << 18); #endif #endif - /* - * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): - * - * "At system reset, initialization software must set up the - * programmable parameters in the memory controller banks registers - * (ORx, BRx, P/LSDMR). After all memory parameters are configured, - * system software should execute the following initialization sequence - * for each SDRAM device. - * - * 1. Issue a PRECHARGE-ALL-BANKS command - * 2. Issue eight CBR REFRESH commands - * 3. Issue a MODE-SET command to initialize the mode register - * - * Quote from Micron MT48LC8M16A2 data sheet: - * - * "...the SDRAM requires a 100uS delay prior to issuing any - * command other than a COMMAND INHIBIT or NOP. Starting at some - * point during this 100uS period and continuing at least through - * the end of this period, COMMAND INHIBIT or NOP commands should - * be applied." - * - * "Once the 100uS delay has been satisfied with at least one COMMAND - * INHIBIT or NOP command having been applied, a /PRECHARGE command/ - * should be applied. All banks must then be precharged, thereby - * placing the device in the all banks idle state." - * - * "Once in the idle state, /two/ AUTO REFRESH cycles must be - * performed. After the AUTO REFRESH cycles are complete, the - * SDRAM is ready for mode register programming." - * - * (/emphasis/ mine, gvb) - * - * The way I interpret this, Micron start up sequence is: - * 1. Issue a PRECHARGE-BANK command (initial precharge) - * 2. Issue a PRECHARGE-ALL-BANKS command ("all banks ... precharged") - * 3. Issue two (presumably, doing eight is OK) CBR REFRESH commands - * 4. Issue a MODE-SET command to initialize the mode register - * - * -------- - * - * The initial commands are executed by setting P/LSDMR[OP] and - * accessing the SDRAM with a single-byte transaction." - * - * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. - */ - - memctl->memc_mptpr = CONFIG_SYS_MPTPR; - memctl->memc_psrt = psrt; - - memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; - *ramaddr = c; - - memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; - for (i = 0; i < 8; i++) - *ramaddr = c; - - memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; - *ramaddr = c; - - memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; - *ramaddr = c; - - /* - * Do it a second time for the second set of chips if the DIMM has - * two chip selects (double sided). - */ - if(chipselects > 1) { - ramaddr += sdram_size; + /* + * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): + * + * "At system reset, initialization software must set up the + * programmable parameters in the memory controller banks registers + * (ORx, BRx, P/LSDMR). After all memory parameters are configured, + * system software should execute the following initialization sequence + * for each SDRAM device. + * + * 1. Issue a PRECHARGE-ALL-BANKS command + * 2. Issue eight CBR REFRESH commands + * 3. Issue a MODE-SET command to initialize the mode register + * + * Quote from Micron MT48LC8M16A2 data sheet: + * + * "...the SDRAM requires a 100uS delay prior to issuing any + * command other than a COMMAND INHIBIT or NOP. Starting at some + * point during this 100uS period and continuing at least through + * the end of this period, COMMAND INHIBIT or NOP commands should + * be applied." + * + * "Once the 100uS delay has been satisfied with at least one COMMAND + * INHIBIT or NOP command having been applied, a /PRECHARGE command/ + * should be applied. All banks must then be precharged, thereby + * placing the device in the all banks idle state." + * + * "Once in the idle state, /two/ AUTO REFRESH cycles must be + * performed. After the AUTO REFRESH cycles are complete, the + * SDRAM is ready for mode register programming." + * + * (/emphasis/ mine, gvb) + * + * The way I interpret this, Micron start up sequence is: + * 1. Issue a PRECHARGE-BANK command (initial precharge) + * 2. Issue a PRECHARGE-ALL-BANKS command ("all banks ... precharged") + * 3. Issue two (presumably, doing eight is OK) CBR REFRESH commands + * 4. Issue a MODE-SET command to initialize the mode register + * + * -------- + * + * The initial commands are executed by setting P/LSDMR[OP] and + * accessing the SDRAM with a single-byte transaction." + * + * The appropriate BRx/ORx registers have already been set when we + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. + */ - memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM + sdram_size; - memctl->memc_or3 = or; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; + memctl->memc_psrt = psrt; memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; *ramaddr = c; memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; for (i = 0; i < 8; i++) - *ramaddr = c; + *ramaddr = c; memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; *ramaddr = c; memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; *ramaddr = c; - } - /* return total ram size */ - return (sdram_size * chipselects); + /* + * Do it a second time for the second set of chips if the DIMM has + * two chip selects (double sided). + */ + if (chipselects > 1) { + ramaddr += sdram_size; + + memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM + sdram_size; + memctl->memc_or3 = or; + + memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; + *ramaddr = c; + + memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; + for (i = 0; i < 8; i++) + *ramaddr = c; + + memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; + *ramaddr = c; + + memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; + *ramaddr = c; + } + + /* return total ram size */ + return (sdram_size * chipselects); } /*----------------------------------------------------------------------- * Board Control Functions */ -void board_poweroff (void) +void board_poweroff(void) { - while (1); /* hang forever */ + while (1); /* hang forever */ } @@ -441,301 +446,288 @@ void board_poweroff (void) /* ------------------------------------------------------------------------- */ int misc_init_r(void) { - /* - * Note: iop is used by the I2C macros, and iopa by the ADC/DAC initialization. - */ - volatile ioport_t *iopa = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0 /* port A */); - volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); - - int reg; /* I2C register value */ - char *ep; /* Environment pointer */ - char str_buf[12] ; /* sprintf output buffer */ - int sample_rate; /* ADC/DAC sample rate */ - int sample_64x; /* Use 64/4 clocking for the ADC/DAC */ - int sample_128x; /* Use 128/4 clocking for the ADC/DAC */ - int right_just; /* Is the data to the DAC right justified? */ - int mclk_divide; /* MCLK Divide */ - int quiet; /* Quiet or minimal output mode */ - - quiet = 0; - if ((ep = getenv("quiet")) != NULL) { - quiet = simple_strtol(ep, NULL, 10); - } - else { - setenv("quiet", "0"); - } - - /* - * SACSng custom initialization: - * Start the ADC and DAC clocks, since the Crystal parts do not - * work on the I2C bus until the clocks are running. - */ - - sample_rate = INITIAL_SAMPLE_RATE; - if ((ep = getenv("DaqSampleRate")) != NULL) { - sample_rate = simple_strtol(ep, NULL, 10); - } - - sample_64x = INITIAL_SAMPLE_64X; - sample_128x = INITIAL_SAMPLE_128X; - if ((ep = getenv("Daq64xSampling")) != NULL) { - sample_64x = simple_strtol(ep, NULL, 10); + /* + * Note: iop is used by the I2C macros, and iopa by the ADC/DAC initialization. + */ + volatile ioport_t *iopa = + ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0 /* port A */ ); + volatile ioport_t *iop = + ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); + + int reg; /* I2C register value */ + char *ep; /* Environment pointer */ + char str_buf[12]; /* sprintf output buffer */ + int sample_rate; /* ADC/DAC sample rate */ + int sample_64x; /* Use 64/4 clocking for the ADC/DAC */ + int sample_128x; /* Use 128/4 clocking for the ADC/DAC */ + int right_just; /* Is the data to the DAC right justified? */ + int mclk_divide; /* MCLK Divide */ + int quiet; /* Quiet or minimal output mode */ + + quiet = 0; + + if ((ep = getenv("quiet")) != NULL) + quiet = simple_strtol(ep, NULL, 10); + else + setenv("quiet", "0"); + + /* + * SACSng custom initialization: + * Start the ADC and DAC clocks, since the Crystal parts do not + * work on the I2C bus until the clocks are running. + */ + + sample_rate = INITIAL_SAMPLE_RATE; + if ((ep = getenv("DaqSampleRate")) != NULL) + sample_rate = simple_strtol(ep, NULL, 10); + + sample_64x = INITIAL_SAMPLE_64X; + sample_128x = INITIAL_SAMPLE_128X; + if ((ep = getenv("Daq64xSampling")) != NULL) { + sample_64x = simple_strtol(ep, NULL, 10); + if (sample_64x) + sample_128x = 0; + else + sample_128x = 1; + } else { + if ((ep = getenv("Daq128xSampling")) != NULL) { + sample_128x = simple_strtol(ep, NULL, 10); + if (sample_128x) + sample_64x = 0; + else + sample_64x = 1; + } + } + + /* + * Stop the clocks and wait for at least 1 LRCLK period + * to make sure the clocking has really stopped. + */ + Daq_Stop_Clocks(); + udelay((1000000 / sample_rate) * NUM_LRCLKS_TO_STABILIZE); + + /* + * Initialize the clocks with the new rates + */ + Daq_Init_Clocks(sample_rate, sample_64x); + sample_rate = Daq_Get_SampleRate(); + + /* + * Start the clocks and wait for at least 1 LRCLK period + * to make sure the clocking has become stable. + */ + Daq_Start_Clocks(sample_rate); + udelay((1000000 / sample_rate) * NUM_LRCLKS_TO_STABILIZE); + + sprintf(str_buf, "%d", sample_rate); + setenv("DaqSampleRate", str_buf); + if (sample_64x) { - sample_128x = 0; + setenv("Daq64xSampling", "1"); + setenv("Daq128xSampling", NULL); + } else { + setenv("Daq64xSampling", NULL); + setenv("Daq128xSampling", "1"); } - else { - sample_128x = 1; + + /* + * Display the ADC/DAC clocking information + */ + if (!quiet) + Daq_Display_Clocks(); + + /* + * Determine the DAC data justification + */ + + right_just = INITIAL_RIGHT_JUST; + if ((ep = getenv("DaqDACRightJustified")) != NULL) + right_just = simple_strtol(ep, NULL, 10); + + sprintf(str_buf, "%d", right_just); + setenv("DaqDACRightJustified", str_buf); + + /* + * Determine the DAC MCLK Divide + */ + + mclk_divide = INITIAL_MCLK_DIVIDE; + if ((ep = getenv("DaqDACMClockDivide")) != NULL) + mclk_divide = simple_strtol(ep, NULL, 10); + + sprintf(str_buf, "%d", mclk_divide); + setenv("DaqDACMClockDivide", str_buf); + + /* + * Initializing the I2C address in the Crystal A/Ds: + * + * 1) Wait for VREF cap to settle (10uSec per uF) + * 2) Release pullup on SDATA + * 3) Write the I2C address to register 6 + * 4) Enable address matching by setting the MSB in register 7 + */ + + if (!quiet) + printf("Initializing the ADC...\n"); + + udelay(ADC_INITIAL_DELAY); /* 10uSec per uF of VREF cap */ + + iopa->pdat &= ~ADC_SDATA1_MASK; /* release SDATA1 */ + udelay(ADC_SDATA_DELAY); /* arbitrary settling time */ + + i2c_reg_write(0x00, 0x06, I2C_ADC_1_ADDR); /* set address */ + i2c_reg_write(I2C_ADC_1_ADDR, 0x07, /* turn on ADDREN */ + ADC_REG7_ADDR_ENABLE); + + i2c_reg_write(I2C_ADC_1_ADDR, 0x02, /* 128x, slave mode, !HPEN */ + (sample_64x ? 0 : ADC_REG2_128x) | + ADC_REG2_HIGH_PASS_DIS | ADC_REG2_SLAVE_MODE); + + reg = i2c_reg_read(I2C_ADC_1_ADDR, 0x06) & 0x7F; + if (reg != I2C_ADC_1_ADDR) { + printf("Init of ADC U10 failed: address is 0x%02X should be 0x%02X\n", + reg, I2C_ADC_1_ADDR); } - } - else { - if ((ep = getenv("Daq128xSampling")) != NULL) { - sample_128x = simple_strtol(ep, NULL, 10); - if (sample_128x) { - sample_64x = 0; - } - else { - sample_64x = 1; - } + + iopa->pdat &= ~ADC_SDATA2_MASK; /* release SDATA2 */ + udelay(ADC_SDATA_DELAY); /* arbitrary settling time */ + + /* set address (do not set ADDREN yet) */ + i2c_reg_write(0x00, 0x06, I2C_ADC_2_ADDR); + + i2c_reg_write(I2C_ADC_2_ADDR, 0x02, /* 64x, slave mode, !HPEN */ + (sample_64x ? 0 : ADC_REG2_128x) | + ADC_REG2_HIGH_PASS_DIS | ADC_REG2_SLAVE_MODE); + + reg = i2c_reg_read(I2C_ADC_2_ADDR, 0x06) & 0x7F; + if (reg != I2C_ADC_2_ADDR) { + printf("Init of ADC U15 failed: address is 0x%02X should be 0x%02X\n", + reg, I2C_ADC_2_ADDR); } - } - - /* - * Stop the clocks and wait for at least 1 LRCLK period - * to make sure the clocking has really stopped. - */ - Daq_Stop_Clocks(); - udelay((1000000 / sample_rate) * NUM_LRCLKS_TO_STABILIZE); - - /* - * Initialize the clocks with the new rates - */ - Daq_Init_Clocks(sample_rate, sample_64x); - sample_rate = Daq_Get_SampleRate(); - - /* - * Start the clocks and wait for at least 1 LRCLK period - * to make sure the clocking has become stable. - */ - Daq_Start_Clocks(sample_rate); - udelay((1000000 / sample_rate) * NUM_LRCLKS_TO_STABILIZE); - - sprintf(str_buf, "%d", sample_rate); - setenv("DaqSampleRate", str_buf); - - if (sample_64x) { - setenv("Daq64xSampling", "1"); - setenv("Daq128xSampling", NULL); - } - else { - setenv("Daq64xSampling", NULL); - setenv("Daq128xSampling", "1"); - } - - /* - * Display the ADC/DAC clocking information - */ - if (!quiet) { - Daq_Display_Clocks(); - } - - /* - * Determine the DAC data justification - */ - - right_just = INITIAL_RIGHT_JUST; - if ((ep = getenv("DaqDACRightJustified")) != NULL) { - right_just = simple_strtol(ep, NULL, 10); - } - - sprintf(str_buf, "%d", right_just); - setenv("DaqDACRightJustified", str_buf); - - /* - * Determine the DAC MCLK Divide - */ - - mclk_divide = INITIAL_MCLK_DIVIDE; - if ((ep = getenv("DaqDACMClockDivide")) != NULL) { - mclk_divide = simple_strtol(ep, NULL, 10); - } - - sprintf(str_buf, "%d", mclk_divide); - setenv("DaqDACMClockDivide", str_buf); - - /* - * Initializing the I2C address in the Crystal A/Ds: - * - * 1) Wait for VREF cap to settle (10uSec per uF) - * 2) Release pullup on SDATA - * 3) Write the I2C address to register 6 - * 4) Enable address matching by setting the MSB in register 7 - */ - - if (!quiet) { - printf("Initializing the ADC...\n"); - } - udelay(ADC_INITIAL_DELAY); /* 10uSec per uF of VREF cap */ - - iopa->pdat &= ~ADC_SDATA1_MASK; /* release SDATA1 */ - udelay(ADC_SDATA_DELAY); /* arbitrary settling time */ - - i2c_reg_write(0x00, 0x06, I2C_ADC_1_ADDR); /* set address */ - i2c_reg_write(I2C_ADC_1_ADDR, 0x07, /* turn on ADDREN */ - ADC_REG7_ADDR_ENABLE); - - i2c_reg_write(I2C_ADC_1_ADDR, 0x02, /* 128x, slave mode, !HPEN */ - (sample_64x ? 0 : ADC_REG2_128x) | - ADC_REG2_HIGH_PASS_DIS | - ADC_REG2_SLAVE_MODE); - - reg = i2c_reg_read(I2C_ADC_1_ADDR, 0x06) & 0x7F; - if(reg != I2C_ADC_1_ADDR) - printf("Init of ADC U10 failed: address is 0x%02X should be 0x%02X\n", - reg, I2C_ADC_1_ADDR); - - iopa->pdat &= ~ADC_SDATA2_MASK; /* release SDATA2 */ - udelay(ADC_SDATA_DELAY); /* arbitrary settling time */ - - i2c_reg_write(0x00, 0x06, I2C_ADC_2_ADDR); /* set address (do not set ADDREN yet) */ - - i2c_reg_write(I2C_ADC_2_ADDR, 0x02, /* 64x, slave mode, !HPEN */ - (sample_64x ? 0 : ADC_REG2_128x) | - ADC_REG2_HIGH_PASS_DIS | - ADC_REG2_SLAVE_MODE); - - reg = i2c_reg_read(I2C_ADC_2_ADDR, 0x06) & 0x7F; - if(reg != I2C_ADC_2_ADDR) - printf("Init of ADC U15 failed: address is 0x%02X should be 0x%02X\n", - reg, I2C_ADC_2_ADDR); - - i2c_reg_write(I2C_ADC_1_ADDR, 0x01, /* set FSTART and GNDCAL */ - ADC_REG1_FRAME_START | - ADC_REG1_GROUND_CAL); - - i2c_reg_write(I2C_ADC_1_ADDR, 0x02, /* Start calibration */ - (sample_64x ? 0 : ADC_REG2_128x) | - ADC_REG2_CAL | - ADC_REG2_HIGH_PASS_DIS | - ADC_REG2_SLAVE_MODE); - - udelay(ADC_CAL_DELAY); /* a minimum of 4100 LRCLKs */ - i2c_reg_write(I2C_ADC_1_ADDR, 0x01, 0x00); /* remove GNDCAL */ - - /* - * Now that we have synchronized the ADC's, enable address - * selection on the second ADC as well as the first. - */ - i2c_reg_write(I2C_ADC_2_ADDR, 0x07, ADC_REG7_ADDR_ENABLE); - - /* - * Initialize the Crystal DAC - * - * Two of the config lines are used for I2C so we have to set them - * to the proper initialization state without inadvertantly - * sending an I2C "start" sequence. When we bring the I2C back to - * the normal state, we send an I2C "stop" sequence. - */ - if (!quiet) { - printf("Initializing the DAC...\n"); - } - - /* - * Bring the I2C clock and data lines low for initialization - */ - I2C_SCL(0); - I2C_DELAY; - I2C_SDA(0); - I2C_ACTIVE; - I2C_DELAY; - - /* Reset the DAC */ - iopa->pdat &= ~DAC_RST_MASK; - udelay(DAC_RESET_DELAY); - - /* Release the DAC reset */ - iopa->pdat |= DAC_RST_MASK; - udelay(DAC_INITIAL_DELAY); - - /* - * Cause the DAC to: - * Enable control port (I2C mode) - * Going into power down - */ - i2c_reg_write(I2C_DAC_ADDR, 0x05, - DAC_REG5_I2C_MODE | - DAC_REG5_POWER_DOWN); - - /* - * Cause the DAC to: - * Enable control port (I2C mode) - * Going into power down - * . MCLK divide by 1 - * . MCLK divide by 2 - */ - i2c_reg_write(I2C_DAC_ADDR, 0x05, - DAC_REG5_I2C_MODE | - DAC_REG5_POWER_DOWN | - (mclk_divide ? DAC_REG5_MCLK_DIV : 0)); - - /* - * Cause the DAC to: - * Auto-mute disabled - * . Format 0, left justified 24 bits - * . Format 3, right justified 24 bits - * No de-emphasis - * . Single speed mode - * . Double speed mode - */ - i2c_reg_write(I2C_DAC_ADDR, 0x01, - (right_just ? DAC_REG1_RIGHT_JUST_24BIT : - DAC_REG1_LEFT_JUST_24_BIT) | - DAC_REG1_DEM_NO | - (sample_rate >= 50000 ? DAC_REG1_DOUBLE : DAC_REG1_SINGLE)); - - sprintf(str_buf, "%d", - sample_rate >= 50000 ? DAC_REG1_DOUBLE : DAC_REG1_SINGLE); - setenv("DaqDACFunctionalMode", str_buf); - - /* - * Cause the DAC to: - * Enable control port (I2C mode) - * Remove power down - * . MCLK divide by 1 - * . MCLK divide by 2 - */ - i2c_reg_write(I2C_DAC_ADDR, 0x05, - DAC_REG5_I2C_MODE | - (mclk_divide ? DAC_REG5_MCLK_DIV : 0)); - - /* - * Create a I2C stop condition: - * low->high on data while clock is high. - */ - I2C_SCL(1); - I2C_DELAY; - I2C_SDA(1); - I2C_DELAY; - I2C_TRISTATE; - - if (!quiet) { - printf("\n"); - } + i2c_reg_write(I2C_ADC_1_ADDR, 0x01, /* set FSTART and GNDCAL */ + ADC_REG1_FRAME_START | ADC_REG1_GROUND_CAL); + + i2c_reg_write(I2C_ADC_1_ADDR, 0x02, /* Start calibration */ + (sample_64x ? 0 : ADC_REG2_128x) | + ADC_REG2_CAL | + ADC_REG2_HIGH_PASS_DIS | ADC_REG2_SLAVE_MODE); + + udelay(ADC_CAL_DELAY); /* a minimum of 4100 LRCLKs */ + i2c_reg_write(I2C_ADC_1_ADDR, 0x01, 0x00); /* remove GNDCAL */ + + /* + * Now that we have synchronized the ADC's, enable address + * selection on the second ADC as well as the first. + */ + i2c_reg_write(I2C_ADC_2_ADDR, 0x07, ADC_REG7_ADDR_ENABLE); + + /* + * Initialize the Crystal DAC + * + * Two of the config lines are used for I2C so we have to set them + * to the proper initialization state without inadvertantly + * sending an I2C "start" sequence. When we bring the I2C back to + * the normal state, we send an I2C "stop" sequence. + */ + if (!quiet) + printf("Initializing the DAC...\n"); + + /* + * Bring the I2C clock and data lines low for initialization + */ + I2C_SCL(0); + I2C_DELAY; + I2C_SDA(0); + I2C_ACTIVE; + I2C_DELAY; + + /* Reset the DAC */ + iopa->pdat &= ~DAC_RST_MASK; + udelay(DAC_RESET_DELAY); + + /* Release the DAC reset */ + iopa->pdat |= DAC_RST_MASK; + udelay(DAC_INITIAL_DELAY); + + /* + * Cause the DAC to: + * Enable control port (I2C mode) + * Going into power down + */ + i2c_reg_write(I2C_DAC_ADDR, 0x05, + DAC_REG5_I2C_MODE | DAC_REG5_POWER_DOWN); + + /* + * Cause the DAC to: + * Enable control port (I2C mode) + * Going into power down + * . MCLK divide by 1 + * . MCLK divide by 2 + */ + i2c_reg_write(I2C_DAC_ADDR, 0x05, + DAC_REG5_I2C_MODE | + DAC_REG5_POWER_DOWN | + (mclk_divide ? DAC_REG5_MCLK_DIV : 0)); + + /* + * Cause the DAC to: + * Auto-mute disabled + * . Format 0, left justified 24 bits + * . Format 3, right justified 24 bits + * No de-emphasis + * . Single speed mode + * . Double speed mode + */ + i2c_reg_write(I2C_DAC_ADDR, 0x01, + (right_just ? DAC_REG1_RIGHT_JUST_24BIT : + DAC_REG1_LEFT_JUST_24_BIT) | + DAC_REG1_DEM_NO | + (sample_rate >= + 50000 ? DAC_REG1_DOUBLE : DAC_REG1_SINGLE)); + + sprintf(str_buf, "%d", + sample_rate >= 50000 ? DAC_REG1_DOUBLE : DAC_REG1_SINGLE); + setenv("DaqDACFunctionalMode", str_buf); + + /* + * Cause the DAC to: + * Enable control port (I2C mode) + * Remove power down + * . MCLK divide by 1 + * . MCLK divide by 2 + */ + i2c_reg_write(I2C_DAC_ADDR, 0x05, + DAC_REG5_I2C_MODE | + (mclk_divide ? DAC_REG5_MCLK_DIV : 0)); + + /* + * Create a I2C stop condition: + * low->high on data while clock is high. + */ + I2C_SCL(1); + I2C_DELAY; + I2C_SDA(1); + I2C_DELAY; + I2C_TRISTATE; + + if (!quiet) + printf("\n"); #ifdef CONFIG_ETHER_LOOPBACK_TEST - /* - * Run the Ethernet loopback test - */ - eth_loopback_test (); + /* + * Run the Ethernet loopback test + */ + eth_loopback_test(); #endif /* CONFIG_ETHER_LOOPBACK_TEST */ #ifdef CONFIG_SHOW_BOOT_PROGRESS - /* - * Turn off the RED fail LED now that we are up and running. - */ - status_led_set(STATUS_LED_RED, STATUS_LED_OFF); + /* + * Turn off the RED fail LED now that we are up and running. + */ + status_led_set(STATUS_LED_RED, STATUS_LED_OFF); #endif - return 0; + return 0; } #ifdef CONFIG_SHOW_BOOT_PROGRESS @@ -749,85 +741,86 @@ int misc_init_r(void) */ static void flash_code(uchar number, uchar modulo, uchar digits) { - int j; - - /* - * Recursively do upper digits. - */ - if(digits > 1) { - flash_code(number / modulo, modulo, digits - 1); - } - - number = number % modulo; - - /* - * Zero is indicated by one long flash (dash). - */ - if(number == 0) { - status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); - udelay(1000000); - status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); - udelay(200000); - } else { - /* - * Non-zero is indicated by short flashes, one per count. - */ - for(j = 0; j < number; j++) { - status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); - udelay(100000); - status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); - udelay(200000); - } - } - /* - * Inter-digit pause: we've already waited 200 mSec, wait 1 sec total - */ - udelay(700000); -} - -static int last_boot_progress; + int j; -void show_boot_progress (int status) -{ - int i,j; - if(status > 0) { - last_boot_progress = status; - } else { /* - * If a specific failure code is given, flash this code - * else just use the last success code we've seen + * Recursively do upper digits. */ - if(status < -1) - last_boot_progress = -status; + if (digits > 1) + flash_code(number / modulo, modulo, digits - 1); + + number = number % modulo; /* - * Flash this code 5 times + * Zero is indicated by one long flash (dash). */ - for(j=0; j<5; j++) { - /* - * Houston, we have a problem. - * Blink the last OK status which indicates where things failed. - */ - status_led_set(STATUS_LED_RED, STATUS_LED_ON); - flash_code(last_boot_progress, 5, 3); - - /* - * Delay 5 seconds between repetitions, - * with the fault LED blinking - */ - for(i=0; i<5; i++) { - status_led_set(STATUS_LED_RED, STATUS_LED_OFF); - udelay(500000); - status_led_set(STATUS_LED_RED, STATUS_LED_ON); - udelay(500000); - } + if (number == 0) { + status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); + udelay(1000000); + status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); + udelay(200000); + } else { + /* + * Non-zero is indicated by short flashes, one per count. + */ + for (j = 0; j < number; j++) { + status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); + udelay(100000); + status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); + udelay(200000); + } } - /* - * Reset the board to retry initialization. + * Inter-digit pause: we've already waited 200 mSec, wait 1 sec total */ - do_reset (NULL, 0, 0, NULL); - } + udelay(700000); +} + +static int last_boot_progress; + +void show_boot_progress(int status) +{ + int i, j; + + if (status > 0) { + last_boot_progress = status; + } else { + /* + * If a specific failure code is given, flash this code + * else just use the last success code we've seen + */ + if (status < -1) + last_boot_progress = -status; + + /* + * Flash this code 5 times + */ + for (j = 0; j < 5; j++) { + /* + * Houston, we have a problem. + * Blink the last OK status which indicates where things failed. + */ + status_led_set(STATUS_LED_RED, STATUS_LED_ON); + flash_code(last_boot_progress, 5, 3); + + /* + * Delay 5 seconds between repetitions, + * with the fault LED blinking + */ + for (i = 0; i < 5; i++) { + status_led_set(STATUS_LED_RED, + STATUS_LED_OFF); + udelay(500000); + status_led_set(STATUS_LED_RED, STATUS_LED_ON); + udelay(500000); + } + } + + /* + * Reset the board to retry initialization. + */ + do_reset(NULL, 0, 0, NULL); + } } #endif /* CONFIG_SHOW_BOOT_PROGRESS */ @@ -841,27 +834,29 @@ void show_boot_progress (int status) #define SPI_DAC_CS_MASK 0x00001000 static const u32 cs_mask[] = { - SPI_ADC_CS_MASK, - SPI_DAC_CS_MASK, + SPI_ADC_CS_MASK, + SPI_DAC_CS_MASK, }; int spi_cs_is_valid(unsigned int bus, unsigned int cs) { - return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]); + return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]); } void spi_cs_activate(struct spi_slave *slave) { - volatile ioport_t *iopd = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3 /* port D */); + volatile ioport_t *iopd = + ioport_addr((immap_t *) CONFIG_SYS_IMMR, 3 /* port D */ ); - iopd->pdat &= ~cs_mask[slave->cs]; + iopd->pdat &= ~cs_mask[slave->cs]; } void spi_cs_deactivate(struct spi_slave *slave) { - volatile ioport_t *iopd = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3 /* port D */); + volatile ioport_t *iopd = + ioport_addr((immap_t *) CONFIG_SYS_IMMR, 3 /* port D */ ); - iopd->pdat |= cs_mask[slave->cs]; + iopd->pdat |= cs_mask[slave->cs]; } #endif diff --git a/board/siemens/SCM/scm.c b/board/siemens/SCM/scm.c index 926e491271..461b56e3ff 100644 --- a/board/siemens/SCM/scm.c +++ b/board/siemens/SCM/scm.c @@ -24,6 +24,7 @@ #include <common.h> #include <ioports.h> #include <mpc8260.h> +#include <linux/compiler.h> #include "scm.h" @@ -397,7 +398,7 @@ static void config_scoh_cs (void) volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immr->im_memctl; volatile can_reg_t *can = (volatile can_reg_t *) CONFIG_SYS_CAN0_BASE; - volatile uint tmp, i; + __maybe_unused volatile uint tmp, i; /* Initialize OR3 / BR3 for CAN Bus Controller 0 */ memctl->memc_or3 = CONFIG_SYS_CAN0_OR3; diff --git a/board/svm_sc8xx/flash.c b/board/svm_sc8xx/flash.c index db1f21a581..af329b9f55 100644 --- a/board/svm_sc8xx/flash.c +++ b/board/svm_sc8xx/flash.c @@ -27,155 +27,163 @@ #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) #endif -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /*----------------------------------------------------------------------- * Functions */ -static int write_word (flash_info_t *info, ulong dest, ulong data); -#if 0 -static ulong flash_get_size (vu_long *addr, flash_info_t *info); -static void flash_get_offsets (ulong base, flash_info_t *info); -#endif -#ifdef CONFIG_BOOT_8B -static int my_in_8( unsigned char *addr); -static void my_out_8( unsigned char *addr, int val); +static int write_word(flash_info_t *info, ulong dest, ulong data); + +#ifdef CONFIG_BOOT_8B +static int my_in_8(unsigned char *addr); +static void my_out_8(unsigned char *addr, int val); #endif -#ifdef CONFIG_BOOT_16B -static int my_in_be16( unsigned short *addr); -static void my_out_be16( unsigned short *addr, int val); +#ifdef CONFIG_BOOT_16B +static int my_in_be16(unsigned short *addr); +static void my_out_be16(unsigned short *addr, int val); #endif -#ifdef CONFIG_BOOT_32B -static unsigned my_in_be32( unsigned *addr); -static void my_out_be32( unsigned *addr, int val); +#ifdef CONFIG_BOOT_32B +static unsigned my_in_be32(unsigned *addr); +static void my_out_be32(unsigned *addr, int val); #endif /*----------------------------------------------------------------------- */ -unsigned long flash_init (void) +unsigned long flash_init(void) { - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; unsigned long size_b0, size_b1; int i; - size_b0=0; - size_b1=0; + size_b0 = 0; + size_b1 = 0; /* Init: no FLASHes known */ - for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) flash_info[i].flash_id = FLASH_UNKNOWN; - } + #ifdef CONFIG_SYS_DOC_BASE #ifndef CONFIG_FEL8xx_AT - memctl->memc_or5 = (0xffff8000 | CONFIG_SYS_OR_TIMING_DOC ); /* 32k bytes */ + /* 32k bytes */ + memctl->memc_or5 = (0xffff8000 | CONFIG_SYS_OR_TIMING_DOC); memctl->memc_br5 = CONFIG_SYS_DOC_BASE | 0x401; #else - memctl->memc_or3 = (0xffff8000 | CONFIG_SYS_OR_TIMING_DOC ); /* 32k bytes */ + /* 32k bytes */ + memctl->memc_or3 = (0xffff8000 | CONFIG_SYS_OR_TIMING_DOC); memctl->memc_br3 = CONFIG_SYS_DOC_BASE | 0x401; #endif #endif -#if defined( CONFIG_BOOT_8B) -/* memctl->memc_or0 = 0xfff80ff4; /###* 4MB bytes */ -/* memctl->memc_br0 = 0x40000401; */ - size_b0 = 0x80000; /* 512 K */ +#if defined(CONFIG_BOOT_8B) + size_b0 = 0x80000; /* 512 K */ + flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM040; flash_info[0].sector_count = 8; flash_info[0].size = 0x00080000; + /* set up sector start address table */ for (i = 0; i < flash_info[0].sector_count; i++) - flash_info[0].start[i] = 0x40000000 + (i * 0x10000); + flash_info[0].start[i] = 0x40000000 + (i * 0x10000); + /* protect all sectors */ for (i = 0; i < flash_info[0].sector_count; i++) - flash_info[0].protect[i] = 0x1; -#elif defined (CONFIG_BOOT_16B) -/* memctl->memc_or0 = 0xfff80ff4; /###* 4MB bytes */ -/* memctl->memc_br0 = 0x40000401; */ - size_b0 = 0x400000; /* 4MB , assume AMD29LV320B */ + flash_info[0].protect[i] = 0x1; + +#elif defined(CONFIG_BOOT_16B) + size_b0 = 0x400000; /* 4MB , assume AMD29LV320B */ + flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM320B; flash_info[0].sector_count = 67; flash_info[0].size = 0x00400000; + /* set up sector start address table */ - flash_info[0].start[0] = 0x40000000 ; + flash_info[0].start[0] = 0x40000000; flash_info[0].start[1] = 0x40000000 + 0x4000; flash_info[0].start[2] = 0x40000000 + 0x6000; flash_info[0].start[3] = 0x40000000 + 0x8000; - for (i = 4; i < flash_info[0].sector_count; i++) - flash_info[0].start[i] = 0x40000000 + 0x10000 + ((i-4) * 0x10000); + + for (i = 4; i < flash_info[0].sector_count; i++) { + flash_info[0].start[i] = + 0x40000000 + 0x10000 + ((i - 4) * 0x10000); + } + /* protect all sectors */ for (i = 0; i < flash_info[0].sector_count; i++) - flash_info[0].protect[i] = 0x1; + flash_info[0].protect[i] = 0x1; #endif - #ifdef CONFIG_BOOT_32B /* Static FLASH Bank configuration here - FIXME XXX */ - - size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); + size_b0 = flash_get_size((vu_long *) FLASH_BASE0_PRELIM, + &flash_info[0]); if (flash_info[0].flash_id == FLASH_UNKNOWN) { - printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", - size_b0, size_b0<<20); + printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", + size_b0, size_b0 << 20); } - size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]); + size_b1 = flash_get_size((vu_long *) FLASH_BASE1_PRELIM, + &flash_info[1]); if (size_b1 > size_b0) { - printf ("## ERROR: " + printf("## ERROR: " "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n", - size_b1, size_b1<<20, - size_b0, size_b0<<20 - ); - flash_info[0].flash_id = FLASH_UNKNOWN; - flash_info[1].flash_id = FLASH_UNKNOWN; - flash_info[0].sector_count = -1; - flash_info[1].sector_count = -1; - flash_info[0].size = 0; - flash_info[1].size = 0; - return (0); + size_b1, size_b1 << 20, size_b0, size_b0 << 20); + flash_info[0].flash_id = FLASH_UNKNOWN; + flash_info[1].flash_id = FLASH_UNKNOWN; + flash_info[0].sector_count = -1; + flash_info[1].sector_count = -1; + flash_info[0].size = 0; + flash_info[1].size = 0; + + return 0; } /* Remap FLASH according to real size */ - memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK); - memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; + memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | + (-size_b0 & OR_AM_MSK); + memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | + BR_MS_GPCM | BR_V; /* Re-do sizing to get full correct info */ - size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); + size_b0 = flash_get_size((vu_long *) CONFIG_SYS_FLASH_BASE, + &flash_info[0]); - flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); + flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]); #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, - &flash_info[0]); + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[0]); #endif #ifdef CONFIG_ENV_IS_IN_FLASH /* ENV protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1, - &flash_info[0]); + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); #endif if (size_b1) { - memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); - memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) | - BR_MS_GPCM | BR_V; + memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | + (-size_b1 & 0xFFFF8000); + memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + + size_b0) & BR_BA_MSK) | BR_MS_GPCM | BR_V; /* Re-do sizing to get full correct info */ - size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + size_b0), - &flash_info[1]); + size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + + size_b0), &flash_info[1]); - flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]); + flash_get_offsets(CONFIG_SYS_FLASH_BASE + size_b0, + &flash_info[1]); #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[1]); #endif @@ -183,11 +191,11 @@ unsigned long flash_init (void) /* ENV protection ON by default */ flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[1]); #endif } else { - memctl->memc_br1 = 0; /* invalidate bank */ + memctl->memc_br1 = 0; /* invalidate bank */ flash_info[1].flash_id = FLASH_UNKNOWN; flash_info[1].sector_count = -1; @@ -197,350 +205,209 @@ unsigned long flash_init (void) flash_info[1].size = size_b1; -#endif /* CONFIG_BOOT_32B */ +#endif /* CONFIG_BOOT_32B */ - return (size_b0 + size_b1); + return size_b0 + size_b1; } -#if 0 -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t *info) -{ - int i; - /* set up sector start address table */ - if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00008000; - info->start[2] = base + 0x0000C000; - info->start[3] = base + 0x00010000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00020000) - 0x00060000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00008000; - info->start[i--] = base + info->size - 0x0000C000; - info->start[i--] = base + info->size - 0x00010000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00020000; - } - } -} -#endif -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t *info) + +void flash_print_info(flash_info_t *info) { int i; if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); + printf("missing or unknown FLASH type\n"); return; } switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - default: printf ("Unknown Vendor "); break; + case FLASH_MAN_AMD: + printf("AMD "); + break; + case FLASH_MAN_FUJ: + printf("FUJITSU "); + break; + default: + printf("Unknown Vendor "); + break; } switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); - break; - default: printf ("Unknown Chip Type\n"); - break; + case FLASH_AM400B: + printf("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: + printf("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: + printf("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: + printf("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: + printf("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: + printf("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: + printf("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: + printf("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + default: + printf("Unknown Chip Type\n"); + break; } - printf (" Size: %ld MB in %d Sectors\n", + printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - printf (" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) { + printf(" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], - info->protect[i] ? " (RO)" : " " - ); + printf("\n "); + printf(" %08lX%s", + info->start[i], info->protect[i] ? " (RO)" : " "); } - printf ("\n"); + printf("\n"); return; } -/*----------------------------------------------------------------------- - */ - - -/*----------------------------------------------------------------------- - */ - /* * The following code cannot be run from FLASH! */ -#if 0 -static ulong flash_get_size (vu_long *addr, flash_info_t *info) -{ - short i; - ulong value; - ulong base = (ulong)addr; - - /* Write auto select command: read Manufacturer ID */ - addr[0x0555] = 0x00AA00AA; - addr[0x02AA] = 0x00550055; - addr[0x0555] = 0x00900090; - value = addr[0]; - - switch (value) { - case AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - case FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ; - break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ - } - - value = addr[1]; /* device ID */ - - switch (value) { - case AMD_ID_LV400T: - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00100000; - break; /* => 1 MB */ - - case AMD_ID_LV400B: - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00100000; - break; /* => 1 MB */ - - case AMD_ID_LV800T: - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_LV800B: - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_LV160T: - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ - - case AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ -#if 0 /* enable when device IDs are available */ - case AMD_ID_LV320T: - info->flash_id += FLASH_AM320T; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ - - case AMD_ID_LV320B: - info->flash_id += FLASH_AM320B; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ -#endif - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ - } - - /* set up sector start address table */ - if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00008000; - info->start[2] = base + 0x0000C000; - info->start[3] = base + 0x00010000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00020000) - 0x00060000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00008000; - info->start[i--] = base + info->size - 0x0000C000; - info->start[i--] = base + info->size - 0x00010000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00020000; - } - } - - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr = (volatile unsigned long *)(info->start[i]); - info->protect[i] = addr[2] & 1; - } - - /* - * Prevent writes to uninitialized FLASH. - */ - if (info->flash_id != FLASH_UNKNOWN) { - addr = (volatile unsigned long *)info->start[0]; - - *addr = 0x00F000F0; /* reset bank */ - } - - return (info->size); -} -#endif - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) +int flash_erase(flash_info_t *info, int s_first, int s_last) { - vu_long *addr = (vu_long*)(info->start[0]); - int flag, prot, sect, l_sect,in_mid,in_did; + vu_long *addr = (vu_long *) (info->start[0]); + int flag, prot, sect, l_sect, in_mid, in_did; ulong start, now, last; if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } + if (info->flash_id == FLASH_UNKNOWN) + printf("- missing\n"); + else + printf("- no sectors to erase\n"); + return 1; } if ((info->flash_id == FLASH_UNKNOWN) || (info->flash_id > FLASH_AMD_COMP)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); + printf("Can't erase unknown flash type %08lx - aborted\n", + info->flash_id); return 1; } prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) prot++; - } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", + printf("- Warning: %d protected sectors will not be erased!\n", prot); } else { - printf ("\n"); + printf("\n"); } l_sect = -1; /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); -#if defined (CONFIG_BOOT_8B ) - my_out_8( (unsigned char * ) ((ulong)addr+0x555) , 0xaa ); - my_out_8( (unsigned char * ) ((ulong)addr+0x2aa) , 0x55 ); - my_out_8( (unsigned char * ) ((ulong)addr+0x555) , 0x90 ); - in_mid=my_in_8( (unsigned char * ) addr ); - in_did=my_in_8( (unsigned char * ) ((ulong)addr+1) ); - printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did ); - my_out_8( (unsigned char *)addr, 0xf0); + +#if defined(CONFIG_BOOT_8B) + my_out_8((unsigned char *)((ulong)addr + 0x555), 0xaa); + my_out_8((unsigned char *)((ulong)addr + 0x2aa), 0x55); + my_out_8((unsigned char *)((ulong)addr + 0x555), 0x90); + + in_mid = my_in_8((unsigned char *)addr); + in_did = my_in_8((unsigned char *)((ulong)addr + 1)); + + printf(" man ID=0x%x, dev ID=0x%x.\n", in_mid, in_did); + + my_out_8((unsigned char *)addr, 0xf0); udelay(1); - my_out_8( (unsigned char *) ((ulong)addr+0x555),0xaa ); - my_out_8( (unsigned char *) ((ulong)addr+0x2aa),0x55 ); - my_out_8( (unsigned char *) ((ulong)addr+0x555),0x80 ); - my_out_8( (unsigned char *) ((ulong)addr+0x555),0xaa ); - my_out_8( (unsigned char *) ((ulong)addr+0x2aa),0x55 ); + + my_out_8((unsigned char *)((ulong)addr + 0x555), 0xaa); + my_out_8((unsigned char *)((ulong)addr + 0x2aa), 0x55); + my_out_8((unsigned char *)((ulong)addr + 0x555), 0x80); + my_out_8((unsigned char *)((ulong)addr + 0x555), 0xaa); + my_out_8((unsigned char *)((ulong)addr + 0x2aa), 0x55); + /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { + for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ - addr = (vu_long*)(info->start[sect]); + addr = (vu_long *) (info->start[sect]); /*addr[0] = 0x00300030; */ - my_out_8( (unsigned char *) ((ulong)addr),0x30 ); + my_out_8((unsigned char *)((ulong)addr), 0x30); l_sect = sect; } } -#elif defined(CONFIG_BOOT_16B ) - my_out_be16( (unsigned short * ) ((ulong)addr+ (0xaaa)) , 0xaa ); - my_out_be16( (unsigned short * ) ((ulong)addr+ (0x554)) , 0x55 ); - my_out_be16( (unsigned short * ) ((ulong)addr+ (0xaaa)) , 0x90 ); - in_mid=my_in_be16( (unsigned short * ) addr ); - in_did=my_in_be16 ( (unsigned short * ) ((ulong)addr+2) ); - printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did ); - my_out_be16( (unsigned short *)addr, 0xf0); +#elif defined(CONFIG_BOOT_16B) + my_out_be16((unsigned short *)((ulong)addr + (0xaaa)), 0xaa); + my_out_be16((unsigned short *)((ulong)addr + (0x554)), 0x55); + my_out_be16((unsigned short *)((ulong)addr + (0xaaa)), 0x90); + in_mid = my_in_be16((unsigned short *)addr); + in_did = my_in_be16((unsigned short *)((ulong)addr + 2)); + printf(" man ID=0x%x, dev ID=0x%x.\n", in_mid, in_did); + my_out_be16((unsigned short *)addr, 0xf0); udelay(1); - my_out_be16( (unsigned short *) ((ulong)addr+ 0xaaa),0xaa ); - my_out_be16( (unsigned short *) ((ulong)addr+0x554),0x55 ); - my_out_be16( (unsigned short *) ((ulong)addr+0xaaa),0x80 ); - my_out_be16( (unsigned short *) ((ulong)addr+0xaaa),0xaa ); - my_out_be16( (unsigned short *) ((ulong)addr+0x554),0x55 ); + my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0xaa); + my_out_be16((unsigned short *)((ulong)addr + 0x554), 0x55); + my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0x80); + my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0xaa); + my_out_be16((unsigned short *)((ulong)addr + 0x554), 0x55); /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { + for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ - addr = (vu_long*)(info->start[sect]); - my_out_be16( (unsigned short *) ((ulong)addr),0x30 ); + addr = (vu_long *) (info->start[sect]); + my_out_be16((unsigned short *)((ulong)addr), 0x30); l_sect = sect; } } #elif defined(CONFIG_BOOT_32B) - my_out_be32( (unsigned * ) ((ulong)addr+0x1554) , 0xaa ); - my_out_be32( (unsigned * ) ((ulong)addr+0xaa8) , 0x55 ); - my_out_be32( (unsigned *) ((ulong)addr+0x1554) , 0x90 ); - in_mid=my_in_be32( (unsigned * ) addr ); - in_did=my_in_be32( (unsigned * ) ((ulong)addr+4) ); - printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did ); - my_out_be32( (unsigned *)addr, 0xf0); + my_out_be32((unsigned *)((ulong)addr + 0x1554), 0xaa); + my_out_be32((unsigned *)((ulong)addr + 0xaa8), 0x55); + my_out_be32((unsigned *)((ulong)addr + 0x1554), 0x90); + + in_mid = my_in_be32((unsigned *)addr); + in_did = my_in_be32((unsigned *)((ulong)addr + 4)); + + printf(" man ID=0x%x, dev ID=0x%x.\n", in_mid, in_did); + + my_out_be32((unsigned *) addr, 0xf0); udelay(1); - my_out_be32( (unsigned *) ((ulong)addr+0x1554),0xaa ); - my_out_be32( (unsigned *) ((ulong)addr+0xaa8),0x55 ); - my_out_be32( (unsigned *) ((ulong)addr+0x1554),0x80 ); - my_out_be32( (unsigned *) ((ulong)addr+0x1554),0xaa ); - my_out_be32( (unsigned *) ((ulong)addr+0xaa8),0x55 ); + + my_out_be32((unsigned *)((ulong)addr + 0x1554), 0xaa); + my_out_be32((unsigned *)((ulong)addr + 0xaa8), 0x55); + my_out_be32((unsigned *)((ulong)addr + 0x1554), 0x80); + my_out_be32((unsigned *)((ulong)addr + 0x1554), 0xaa); + my_out_be32((unsigned *)((ulong)addr + 0xaa8), 0x55); + /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { + for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ - addr = (vu_long*)(info->start[sect]); - my_out_be32( (unsigned *) ((ulong)addr),0x00300030 ); + addr = (vu_long *) (info->start[sect]); + my_out_be32((unsigned *)((ulong)addr), 0x00300030); l_sect = sect; } } #else -# error CONFIG_BOOT_(size)B missing. +#error CONFIG_BOOT_(size)B missing. #endif /* re-enable interrupts if necessary */ if (flag) enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ - udelay (1000); + udelay(1000); /* * We wait for the last triggered sector @@ -548,53 +415,55 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) if (l_sect < 0) goto DONE; - start = get_timer (0); - last = start; - addr = (vu_long*)(info->start[l_sect]); -#if defined (CONFIG_BOOT_8B) - while ( (my_in_8((unsigned char *)addr) & 0x80) != 0x80 ) -#elif defined(CONFIG_BOOT_16B ) - while ( (my_in_be16((unsigned short *)addr) & 0x0080) != 0x0080 ) + start = get_timer(0); + last = start; + addr = (vu_long *) (info->start[l_sect]); +#if defined(CONFIG_BOOT_8B) + while ((my_in_8((unsigned char *) addr) & 0x80) != 0x80) +#elif defined(CONFIG_BOOT_16B) + while ((my_in_be16((unsigned short *) addr) & 0x0080) != 0x0080) #elif defined(CONFIG_BOOT_32B) - while ( (my_in_be32((unsigned *)addr) & 0x00800080) != 0x00800080 ) + while ((my_in_be32((unsigned *) addr) & 0x00800080) != 0x00800080) #else -# error CONFIG_BOOT_(size)B missing. +#error CONFIG_BOOT_(size)B missing. #endif { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); + now = get_timer(start); + if (now > CONFIG_SYS_FLASH_ERASE_TOUT) { + printf("Timeout\n"); return 1; } /* show that we're waiting */ if ((now - last) > 1000) { /* every second */ - putc ('.'); + putc('.'); last = now; } } DONE: /* reset to read mode */ - addr = (volatile unsigned long *)info->start[0]; -#if defined (CONFIG_BOOT_8B) - my_out_8( (unsigned char *)addr, 0xf0); -#elif defined(CONFIG_BOOT_16B ) - my_out_be16( (unsigned short * ) addr , 0x00f0 ); + addr = (volatile unsigned long *) info->start[0]; + +#if defined(CONFIG_BOOT_8B) + my_out_8((unsigned char *) addr, 0xf0); +#elif defined(CONFIG_BOOT_16B) + my_out_be16((unsigned short *) addr, 0x00f0); #elif defined(CONFIG_BOOT_32B) - my_out_be32 ( (unsigned *)addr, 0x00F000F0 ); /* reset bank */ + my_out_be32((unsigned *) addr, 0x00F000F0); /* reset bank */ #else -# error CONFIG_BOOT_(size)B missing. +#error CONFIG_BOOT_(size)B missing. #endif - printf (" done\n"); + printf(" done\n"); return 0; } -/*----------------------------------------------------------------------- +/* * Copy memory to flash, returns: * 0 - OK * 1 - write timeout * 2 - Flash not erased */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; @@ -604,23 +473,26 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) /* * handle unaligned start bytes */ - if ((l = addr - wp) != 0) { + l = addr - wp; + + if (l != 0) { data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - for (; i<4 && cnt>0; ++i) { + for (i = 0, cp = wp; i < l; ++i, ++cp) + data = (data << 8) | (*(uchar *) cp); + + for (; i < 4 && cnt > 0; ++i) { data = (data << 8) | *src++; --cnt; ++cp; } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } + for (; cnt == 0 && i < 4; ++i, ++cp) + data = (data << 8) | (*(uchar *) cp); + + rc = write_word(info, wp, data); + + if (rc != 0) + return rc; - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } wp += 4; } @@ -629,113 +501,123 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) */ while (cnt >= 4) { data = 0; - for (i=0; i<4; ++i) { + for (i = 0; i < 4; ++i) data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; + + rc = write_word(info, wp, data); + + if (rc != 0) + return rc; + + wp += 4; cnt -= 4; } - if (cnt == 0) { - return (0); - } + if (cnt == 0) + return 0; /* * handle unaligned tail bytes */ data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { data = (data << 8) | *src++; --cnt; } - for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } + for (; i < 4; ++i, ++cp) + data = (data << 8) | (*(uchar *) cp); - return (write_word(info, wp, data)); + return write_word(info, wp, data); } -/*----------------------------------------------------------------------- +/* * Write a word to Flash, returns: * 0 - OK * 1 - write timeout * 2 - Flash not erased */ -static int write_word (flash_info_t *info, ulong dest, ulong data) +static int write_word(flash_info_t *info, ulong dest, ulong data) { - ulong addr = (ulong)(info->start[0]); - ulong start,last; + ulong addr = (ulong) (info->start[0]); + ulong start; int flag; ulong i; - int data_short[2]; + int data_short[2]; /* Check if Flash is (sufficiently) erased */ - if ( ((ulong) *(ulong *)dest & data) != data ) { - return (2); - } + if (((ulong)*(ulong *)dest & data) != data) + return 2; + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); #if defined(CONFIG_BOOT_8B) #ifdef DEBUG { - int in_mid,in_did; - my_out_8( (unsigned char * ) (addr+0x555) , 0xaa ); - my_out_8( (unsigned char * ) (addr+0x2aa) , 0x55 ); - my_out_8( (unsigned char * ) (addr+0x555) , 0x90 ); - in_mid=my_in_8( (unsigned char * ) addr ); - in_did=my_in_8( (unsigned char * ) (addr+1) ); - printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did ); - my_out_8( (unsigned char *)addr, 0xf0); - udelay(1); + int in_mid, in_did; + + my_out_8((unsigned char *) (addr + 0x555), 0xaa); + my_out_8((unsigned char *) (addr + 0x2aa), 0x55); + my_out_8((unsigned char *) (addr + 0x555), 0x90); + + in_mid = my_in_8((unsigned char *) addr); + in_did = my_in_8((unsigned char *) (addr + 1)); + + printf(" man ID=0x%x, dev ID=0x%x.\n", in_mid, in_did); + + my_out_8((unsigned char *) addr, 0xf0); + udelay(1); } #endif - { - int data_ch[4]; - data_ch[0]=(int ) ((data>>24) & 0xff); - data_ch[1]=(int ) ((data>>16) &0xff ); - data_ch[2]=(int ) ((data >>8) & 0xff); - data_ch[3]=(int ) (data & 0xff); - for (i=0;i<4;i++ ){ - my_out_8( (unsigned char *) (addr+0x555),0xaa); - my_out_8((unsigned char *) (addr+0x2aa),0x55); - my_out_8( (unsigned char *) (addr+0x555),0xa0); - my_out_8((unsigned char *) (dest+i) ,data_ch[i]); - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - start = get_timer (0); - last = start; - while( ( my_in_8((unsigned char *) (dest+i)) ) != ( data_ch[i] ) ) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT ) { - return 1; - } - } - }/* for */ - } -#elif defined( CONFIG_BOOT_16B) - data_short[0]=(int) (data>>16) & 0xffff; - data_short[1]=(int ) data & 0xffff ; - for (i=0;i<2;i++ ){ - my_out_be16( (unsigned short *) ((ulong)addr+ 0xaaa),0xaa ); - my_out_be16( (unsigned short *) ((ulong)addr+ 0x554),0x55 ); - my_out_be16( (unsigned short *) ((ulong)addr+ 0xaaa),0xa0 ); - my_out_be16( (unsigned short *) (dest+(i*2)) ,data_short[i]); - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - start = get_timer (0); - last = start; - while( ( my_in_be16((unsigned short *) (dest+(i*2))) ) != ( data_short[i] ) ) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT ) { - return 1; - } - } + { + int data_ch[4]; + + data_ch[0] = (int) ((data >> 24) & 0xff); + data_ch[1] = (int) ((data >> 16) & 0xff); + data_ch[2] = (int) ((data >> 8) & 0xff); + data_ch[3] = (int) (data & 0xff); + + for (i = 0; i < 4; i++) { + my_out_8((unsigned char *) (addr + 0x555), 0xaa); + my_out_8((unsigned char *) (addr + 0x2aa), 0x55); + my_out_8((unsigned char *) (addr + 0x555), 0xa0); + my_out_8((unsigned char *) (dest + i), data_ch[i]); + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + start = get_timer(0); + while ((my_in_8((unsigned char *)(dest + i))) != + (data_ch[i])) { + if (get_timer(start) > + CONFIG_SYS_FLASH_WRITE_TOUT) { + return 1; + } + } + } /* for */ + } +#elif defined(CONFIG_BOOT_16B) + data_short[0] = (int) (data >> 16) & 0xffff; + data_short[1] = (int) data & 0xffff; + for (i = 0; i < 2; i++) { + my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0xaa); + my_out_be16((unsigned short *)((ulong)addr + 0x554), 0x55); + my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0xa0); + my_out_be16((unsigned short *)(dest + (i * 2)), + data_short[i]); + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + start = get_timer(0); + while ((my_in_be16((unsigned short *)(dest + (i * 2)))) != + (data_short[i])) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) + return 1; + } } -#elif defined( CONFIG_BOOT_32B) +#elif defined(CONFIG_BOOT_32B) addr[0x0555] = 0x00AA00AA; addr[0x02AA] = 0x00550055; addr[0x0555] = 0x00A000A0; @@ -747,51 +629,54 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) enable_interrupts(); /* data polling for D7 */ - start = get_timer (0); + start = get_timer(0); while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); - } + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) + return 1; } #endif - - - return (0); + return 0; } -#ifdef CONFIG_BOOT_8B -static int my_in_8 ( unsigned char *addr) + +#ifdef CONFIG_BOOT_8B +static int my_in_8(unsigned char *addr) { - int ret; - __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); - return ret; + int ret; + __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr)); + + return ret; } -static void my_out_8 ( unsigned char *addr, int val) +static void my_out_8(unsigned char *addr, int val) { - __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); + __asm__ __volatile__("stb%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val)); } #endif -#ifdef CONFIG_BOOT_16B -static int my_in_be16( unsigned short *addr) +#ifdef CONFIG_BOOT_16B +static int my_in_be16(unsigned short *addr) { - int ret; - __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); - return ret; + int ret; + __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr)); + + return ret; } -static void my_out_be16( unsigned short *addr, int val) + +static void my_out_be16(unsigned short *addr, int val) { - __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); + __asm__ __volatile__("sth%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val)); } #endif -#ifdef CONFIG_BOOT_32B -static unsigned my_in_be32( unsigned *addr) +#ifdef CONFIG_BOOT_32B +static unsigned my_in_be32(unsigned *addr) { unsigned ret; - __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); - return ret; + __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr)); + + return ret; } -static void my_out_be32( unsigned *addr, int val) + +static void my_out_be32(unsigned *addr, int val) { - __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); + __asm__ __volatile__("stw%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val)); } #endif diff --git a/board/svm_sc8xx/svm_sc8xx.c b/board/svm_sc8xx/svm_sc8xx.c index f34b83515e..771bb4a5fe 100644 --- a/board/svm_sc8xx/svm_sc8xx.c +++ b/board/svm_sc8xx/svm_sc8xx.c @@ -80,15 +80,12 @@ int checkboard(void) char buf[64]; int i; int l = getenv_f("serial#", buf, sizeof(buf)); - int board_type; if (l < 0 || strncmp(buf, "SVM8", 4)) { printf("### No HW ID - assuming SVM SC8xx\n"); return (0); } - board_type = 1; - for (i = 0; i < l; ++i) { if (buf[i] == ' ') break; @@ -97,7 +94,7 @@ int checkboard(void) putc('\n'); - return (0); + return 0; } /* ------------------------------------------------------------------------- */ diff --git a/board/tqc/tqm5200/cam5200_flash.c b/board/tqc/tqm5200/cam5200_flash.c index 4c8922f35f..5329c2a410 100644 --- a/board/tqc/tqm5200/cam5200_flash.c +++ b/board/tqc/tqm5200/cam5200_flash.c @@ -279,7 +279,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) { volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]); volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2; - int flag, prot, sect, l_sect; + int flag, prot, sect; if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) @@ -305,8 +305,6 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) printf("\n"); - l_sect = -1; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); @@ -322,7 +320,6 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055; addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */ - l_sect = sect; /* * Wait for each sector to complete, it's more * reliable. According to AMD Spec, you must @@ -609,7 +606,7 @@ static int flash_erase_16(flash_info_t * info, int s_first, int s_last) { volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]); volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2; - int flag, prot, sect, l_sect; + int flag, prot, sect; if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) @@ -635,8 +632,6 @@ static int flash_erase_16(flash_info_t * info, int s_first, int s_last) printf("\n"); - l_sect = -1; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); @@ -652,7 +647,6 @@ static int flash_erase_16(flash_info_t * info, int s_first, int s_last) addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55005500; addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x30003000; /* sector erase */ - l_sect = sect; /* * Wait for each sector to complete, it's more * reliable. According to AMD Spec, you must diff --git a/board/tqc/tqm5200/cmd_stk52xx.c b/board/tqc/tqm5200/cmd_stk52xx.c index 0789c5848e..c40f7f0428 100644 --- a/board/tqc/tqm5200/cmd_stk52xx.c +++ b/board/tqc/tqm5200/cmd_stk52xx.c @@ -82,18 +82,17 @@ static void spi_init(void) static int spi_transmit(unsigned char data) { - int dummy; struct mpc5xxx_spi *spi = (struct mpc5xxx_spi*)MPC5XXX_SPI; spi->dr = data; /* wait for SPI transmission completed */ - while(!(spi->sr & 0x80)) - { - if (spi->sr & 0x40) /* if write collision occured */ - { + while (!(spi->sr & 0x80)) { + if (spi->sr & 0x40) { /* if write collision occured */ + int dummy; + /* do dummy read to clear status register */ dummy = spi->dr; - printf ("SPI write collision\n"); + printf("SPI write collision: dr=0x%x\n", dummy); return -1; } } @@ -172,10 +171,8 @@ static void i2s_init(void) psc->ccr = 0x1F03; /* 16 bit data width; 5.617MHz MCLK */ psc->ctur = 0x0F; /* 16 bit frame width */ - for(i=0;i<128;i++) - { + for (i = 0; i < 128; i++) psc->psc_buffer_32 = 0; /* clear tx fifo */ - } } static int i2s_play_wave(unsigned long addr, unsigned long len) @@ -183,7 +180,6 @@ static int i2s_play_wave(unsigned long addr, unsigned long len) unsigned long i; unsigned char *wave_file = (uchar *)addr + 44; /* quick'n dirty: skip * wav header*/ - unsigned char swapped[4]; struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2; /* @@ -192,11 +188,16 @@ static int i2s_play_wave(unsigned long addr, unsigned long len) psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE); for(i = 0;i < (len / 4); i++) { + unsigned char swapped[4]; + unsigned long *p = (unsigned long*)swapped; + swapped[3] = *wave_file++; swapped[2] = *wave_file++; swapped[1] = *wave_file++; swapped[0] = *wave_file++; - psc->psc_buffer_32 = *((unsigned long*)swapped); + + psc->psc_buffer_32 = *p; + while (psc->tfnum > 400) { if(ctrlc()) return 0; diff --git a/board/tqc/tqm8272/tqm8272.c b/board/tqc/tqm8272/tqm8272.c index 9efb54125e..5aca227789 100644 --- a/board/tqc/tqm8272/tqm8272.c +++ b/board/tqc/tqm8272/tqm8272.c @@ -459,10 +459,9 @@ phys_size_t initdram (int board_type) #ifndef CONFIG_SYS_RAMBOOT long size8, size9; #endif - long psize, lsize; + long psize; psize = 16 * 1024 * 1024; - lsize = 0; memctl->memc_psrt = CONFIG_SYS_PSRT; memctl->memc_mptpr = CONFIG_SYS_MPTPR; diff --git a/boards.cfg b/boards.cfg index e982ec62c5..9978dec9a6 100644 --- a/boards.cfg +++ b/boards.cfg @@ -284,6 +284,19 @@ M5271EVB m68k mcf52x2 m5271evb freesca M5272C3 m68k mcf52x2 m5272c3 freescale M5275EVB m68k mcf52x2 m5275evb freescale M5282EVB m68k mcf52x2 m5282evb freescale +M52277EVB m68k mcf5227x m52277evb freescale - M52277EVB:SYS_SPANSION_BOOT,SYS_TEXT_BASE=0x00000000 +M52277EVB_stmicro m68k mcf5227x m52277evb freescale - M52277EVB:CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x43E00000 +EB-MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS - EB+MCF-EV123:SYS_TEXT_BASE=0xFFE00000 +EB-MCF-EV123_internal m68k mcf52x2 EB+MCF-EV123 BuS - EB+MCF-EV123:SYS_TEXT_BASE=0xF0000000 +M5235EVB m68k mcf523x m5235evb freescale - M5235EVB:SYS_TEXT_BASE=0xFFE00000 +M5235EVB_Flash32 m68k mcf523x m5235evb freescale - M5235EVB:NORFLASH_PS32BIT,SYS_TEXT_BASE=0xFFC00000 +M54455EVB m68k mcf5445x m54455evb freescale - M54455EVB:SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=33333333 +M54455EVB_intel m68k mcf5445x m54455evb freescale - M54455EVB:SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=33333333 +M54455EVB_a66 m68k mcf5445x m54455evb freescale - M54455EVB:SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=66666666 +M54455EVB_i66 m68k mcf5445x m54455evb freescale - M54455EVB:SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=66666666 +M54455EVB_stm33 m68k mcf5445x m54455evb freescale - M54455EVB:SYS_STMICRO_BOOT,CF_SBF,SYS_TEXT_BASE=0x4FE00000,SYS_INPUT_CLKSRC=33333333 +M54451EVB m68k mcf5445x m54451evb freescale - M54451EVB:SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=24000000 +M54451EVB_stmicro m68k mcf5445x m54451evb freescale - M54451EVB:CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x47e00000,SYS_INPUT_CLKSRC=24000000 astro_mcf5373l m68k mcf532x mcf5373l astro M53017EVB m68k mcf532x m53017evb freescale M5329AFEE m68k mcf532x m5329evb freescale - M5329EVB:NANDFLASH_SIZE=0 diff --git a/common/cmd_flash.c b/common/cmd_flash.c index 67653476e2..c6ea25ac5b 100644 --- a/common/cmd_flash.c +++ b/common/cmd_flash.c @@ -324,9 +324,9 @@ int do_flinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { #ifndef CONFIG_SYS_NO_FLASH - flash_info_t *info; + flash_info_t *info = NULL; ulong bank, addr_first, addr_last; - int n, sect_first, sect_last; + int n, sect_first = 0, sect_last = 0; #if defined(CONFIG_CMD_MTDPARTS) struct mtd_device *dev; struct part_info *part; @@ -457,9 +457,9 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int rcode = 0; #ifndef CONFIG_SYS_NO_FLASH - flash_info_t *info; + flash_info_t *info = NULL; ulong bank; - int i, n, sect_first, sect_last; + int i, n, sect_first = 0, sect_last = 0; #if defined(CONFIG_CMD_MTDPARTS) struct mtd_device *dev; struct part_info *part; diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index 3ea75f75fd..a0c5291bff 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -1209,9 +1209,7 @@ static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char * const ar device = device->next; } } else { - I2C_MUX_DEVICE *dev; - - dev = i2c_mux_ident_muxstring ((uchar *)argv[1]); + (void)i2c_mux_ident_muxstring ((uchar *)argv[1]); ret = 0; } return ret; @@ -107,8 +107,24 @@ HOSTCFLAGS += -pedantic # Option checker (courtesy linux kernel) to ensure # only supported compiler options are used # -cc-option = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \ - > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;) +CC_OPTIONS_CACHE_FILE := $(OBJTREE)/include/generated/cc_options.mk + +$(if $(wildcard $(CC_OPTIONS_CACHE_FILE)),,\ + $(shell mkdir -p $(dir $(CC_OPTIONS_CACHE_FILE)))) + +-include $(CC_OPTIONS_CACHE_FILE) + +cc-option-sys = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \ + > /dev/null 2>&1; then \ + echo 'CC_OPTIONS += $(strip $1)' >> $(CC_OPTIONS_CACHE_FILE); \ + echo "$(1)"; fi) + +ifeq ($(CONFIG_CC_OPT_CACHE_DISABLE),y) +cc-option = $(strip $(if $(call cc-option-sys,$1),$1,$2)) +else +cc-option = $(strip $(if $(findstring $1,$(CC_OPTIONS)),$1,\ + $(if $(call cc-option-sys,$1),$1,$2))) +endif # # Include the make variables (CC, etc...) diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index cb13deeea9..258be0a908 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -214,11 +214,20 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev, return speed; } +unsigned int get_i2c_clock(int bus) +{ + if (bus) + return gd->i2c2_clk; /* I2C2 clock */ + else + return gd->i2c1_clk; /* I2C1 clock */ +} + void i2c_init(int speed, int slaveadd) { struct fsl_i2c *dev; unsigned int temp; + int bus_num, i; #ifdef CONFIG_SYS_I2C_INIT_BOARD /* Call board specific i2c bus reset routine before accessing the @@ -227,29 +236,23 @@ i2c_init(int speed, int slaveadd) */ i2c_init_board(); #endif - dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET); - - writeb(0, &dev->cr); /* stop I2C controller */ - udelay(5); /* let it shutdown in peace */ - temp = set_i2c_bus_speed(dev, gd->i2c1_clk, speed); - if (gd->flags & GD_FLG_RELOC) - i2c_bus_speed[0] = temp; - writeb(slaveadd << 1, &dev->adr); /* write slave address */ - writeb(0x0, &dev->sr); /* clear status register */ - writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ - -#ifdef CONFIG_SYS_I2C2_OFFSET - dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET); - - writeb(0, &dev->cr); /* stop I2C controller */ - udelay(5); /* let it shutdown in peace */ - temp = set_i2c_bus_speed(dev, gd->i2c2_clk, speed); - if (gd->flags & GD_FLG_RELOC) - i2c_bus_speed[1] = temp; - writeb(slaveadd << 1, &dev->adr); /* write slave address */ - writeb(0x0, &dev->sr); /* clear status register */ - writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ +#ifdef CONFIG_SYS_I2C2_OFFSET + bus_num = 2; +#else + bus_num = 1; #endif + for (i = 0; i < bus_num; i++) { + dev = i2c_dev[i]; + + writeb(0, &dev->cr); /* stop I2C controller */ + udelay(5); /* let it shutdown in peace */ + temp = set_i2c_bus_speed(dev, get_i2c_clock(i), speed); + if (gd->flags & GD_FLG_RELOC) + i2c_bus_speed[i] = temp; + writeb(slaveadd << 1, &dev->adr);/* write slave address */ + writeb(0x0, &dev->sr); /* clear status register */ + writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ + } #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT /* Call board specific i2c bus reset routine AFTER the bus has been diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c index e994cb6901..45066c8fea 100644 --- a/drivers/net/pcnet.c +++ b/drivers/net/pcnet.c @@ -30,21 +30,12 @@ #include <asm/io.h> #include <pci.h> -#if 0 #define PCNET_DEBUG_LEVEL 0 /* 0=off, 1=init, 2=rx/tx */ -#endif -#if PCNET_DEBUG_LEVEL > 0 -#define PCNET_DEBUG1(fmt,args...) printf (fmt ,##args) -#if PCNET_DEBUG_LEVEL > 1 -#define PCNET_DEBUG2(fmt,args...) printf (fmt ,##args) -#else -#define PCNET_DEBUG2(fmt,args...) -#endif -#else -#define PCNET_DEBUG1(fmt,args...) -#define PCNET_DEBUG2(fmt,args...) -#endif +#define PCNET_DEBUG1(fmt,args...) \ + debug_cond(PCNET_DEBUG_LEVEL > 0, fmt ,##args) +#define PCNET_DEBUG2(fmt,args...) \ + debug_cond(PCNET_DEBUG_LEVEL > 1, fmt ,##args) #if !defined(CONF_PCNET_79C973) && defined(CONF_PCNET_79C975) #error "Macro for PCnet chip version is not defined!" diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c index c2779db0a5..e3feef849c 100644 --- a/drivers/net/rtl8139.c +++ b/drivers/net/rtl8139.c @@ -95,10 +95,9 @@ #define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */ #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) -#undef DEBUG_TX -#undef DEBUG_RX +#define DEBUG_TX 0 /* set to 1 to enable debug code */ +#define DEBUG_RX 0 /* set to 1 to enable debug code */ -#define currticks() get_timer(0) #define bus_to_phys(a) pci_mem_to_phys((pci_dev_t)dev->priv, a) #define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)dev->priv, a) @@ -253,7 +252,6 @@ int rtl8139_initialize(bd_t *bis) static int rtl8139_probe(struct eth_device *dev, bd_t *bis) { int i; - int speed10, fullduplex; int addr_len; unsigned short *ap = (unsigned short *)dev->enetaddr; @@ -266,9 +264,6 @@ static int rtl8139_probe(struct eth_device *dev, bd_t *bis) for (i = 0; i < 3; i++) *ap++ = le16_to_cpu (read_eeprom(i + 7, addr_len)); - speed10 = inb(ioaddr + MediaStatus) & MSRSpeed10; - fullduplex = inw(ioaddr + MII_BMCR) & BMCRDuplex; - rtl_reset(dev); if (inb(ioaddr + MediaStatus) & MSRLinkFail) { @@ -389,9 +384,8 @@ static void rtl_reset(struct eth_device *dev) * from the configuration EEPROM default, because the card manufacturer * should have set that to match the card. */ -#ifdef DEBUG_RX - printf("rx ring address is %X\n",(unsigned long)rx_ring); -#endif + debug_cond(DEBUG_RX, + "rx ring address is %lX\n",(unsigned long)rx_ring); flush_cache((unsigned long)rx_ring, RX_BUF_LEN); outl(phys_to_bus((int)rx_ring), ioaddr + RxBuf); @@ -424,9 +418,7 @@ static int rtl_transmit(struct eth_device *dev, volatile void *packet, int lengt memcpy((char *)tx_buffer, (char *)packet, (int)length); -#ifdef DEBUG_TX - printf("sending %d bytes\n", len); -#endif + debug_cond(DEBUG_TX, "sending %d bytes\n", len); /* Note: RTL8139 doesn't auto-pad, send minimum payload (another 4 * bytes are sent automatically for the FCS, totalling to 64 bytes). */ @@ -453,16 +445,18 @@ static int rtl_transmit(struct eth_device *dev, volatile void *packet, int lengt if (status & TxOK) { cur_tx = (cur_tx + 1) % NUM_TX_DESC; -#ifdef DEBUG_TX - printf("tx done (%d ticks), status %hX txstatus %X\n", - to-currticks(), status, txstatus); -#endif + + debug_cond(DEBUG_TX, + "tx done, status %hX txstatus %lX\n", + status, txstatus); + return length; } else { -#ifdef DEBUG_TX - printf("tx timeout/error (%d usecs), status %hX txstatus %X\n", - 10*i, status, txstatus); -#endif + + debug_cond(DEBUG_TX, + "tx timeout/error (%d usecs), status %hX txstatus %lX\n", + 10*i, status, txstatus); + rtl_reset(dev); return 0; @@ -486,9 +480,7 @@ static int rtl_poll(struct eth_device *dev) /* See below for the rest of the interrupt acknowledges. */ outw(status & ~(RxFIFOOver | RxOverflow | RxOK), ioaddr + IntrStatus); -#ifdef DEBUG_RX - printf("rtl_poll: int %hX ", status); -#endif + debug_cond(DEBUG_RX, "rtl_poll: int %hX ", status); ring_offs = cur_rx % RX_BUF_LEN; /* ring_offs is guaranteed being 4-byte aligned */ @@ -513,14 +505,11 @@ static int rtl_poll(struct eth_device *dev) memcpy(&(rxdata[semi_count]), rx_ring, rx_size-4-semi_count); NetReceive(rxdata, length); -#ifdef DEBUG_RX - printf("rx packet %d+%d bytes", semi_count,rx_size-4-semi_count); -#endif + debug_cond(DEBUG_RX, "rx packet %d+%d bytes", + semi_count, rx_size-4-semi_count); } else { NetReceive(rx_ring + ring_offs + 4, length); -#ifdef DEBUG_RX - printf("rx packet %d bytes", rx_size-4); -#endif + debug_cond(DEBUG_RX, "rx packet %d bytes", rx_size-4); } flush_cache((unsigned long)rx_ring, RX_BUF_LEN); diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index b81dcad2ce..1ad13bddd5 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -739,7 +739,6 @@ INIT - Look for an adapter, this routine's visible to the outside static int rtl_init(struct eth_device *dev, bd_t *bis) { static int board_idx = -1; - static int printed_version = 0; int i, rc; int option = -1, Cap10_100 = 0, Cap1000 = 0; @@ -751,8 +750,6 @@ static int rtl_init(struct eth_device *dev, bd_t *bis) board_idx++; - printed_version = 1; - /* point to private storage */ tpc = &tpx; diff --git a/drivers/pcmcia/mpc8xx_pcmcia.c b/drivers/pcmcia/mpc8xx_pcmcia.c index 74a50f1c74..3732583838 100644 --- a/drivers/pcmcia/mpc8xx_pcmcia.c +++ b/drivers/pcmcia/mpc8xx_pcmcia.c @@ -1,6 +1,7 @@ #include <common.h> #include <mpc8xx.h> #include <pcmcia.h> +#include <linux/compiler.h> #undef CONFIG_PCMCIA @@ -73,8 +74,8 @@ int pcmcia_on (void) { u_long reg, base; pcmcia_win_t *win; - u_int slotbit; u_int rc, slot; + __maybe_unused u_int slotbit; int i; debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n"); diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c index 134a0e4fc2..ae59cfb869 100644 --- a/drivers/rtc/ds3231.c +++ b/drivers/rtc/ds3231.c @@ -35,16 +35,6 @@ #if defined(CONFIG_CMD_DATE) -/*---------------------------------------------------------------------*/ -#undef DEBUG_RTC - -#ifdef DEBUG_RTC -#define DEBUGR(fmt,args...) printf(fmt ,##args) -#else -#define DEBUGR(fmt,args...) -#endif -/*---------------------------------------------------------------------*/ - /* * RTC register addresses */ @@ -99,7 +89,7 @@ int rtc_get (struct rtc_time *tmp) mon_cent = rtc_read (RTC_MON_REG_ADDR); year = rtc_read (RTC_YR_REG_ADDR); - DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " + debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", year, mon_cent, mday, wday, hour, min, sec, control, status); @@ -121,7 +111,7 @@ int rtc_get (struct rtc_time *tmp) tmp->tm_yday = 0; tmp->tm_isdst= 0; - DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); @@ -136,7 +126,7 @@ int rtc_set (struct rtc_time *tmp) { uchar century; - DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); diff --git a/drivers/rtc/rv3029.c b/drivers/rtc/rv3029.c index e01216844a..8033695ba6 100644 --- a/drivers/rtc/rv3029.c +++ b/drivers/rtc/rv3029.c @@ -84,12 +84,10 @@ int rtc_get( struct rtc_time *tmp ) tmp->tm_yday = 0; tmp->tm_isdst = 0; -#ifdef RTC_DEBUG - printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + debug( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec ); -#endif return 0; } @@ -97,11 +95,10 @@ int rtc_set( struct rtc_time *tmp ) { int ret; unsigned char buf[RTC_RV3029_PAGE_LEN]; -#ifdef RTC_DEBUG - printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + + debug( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); -#endif if (tmp->tm_year < 2000) { printf("RTC: year %d < 2000 not possible\n", tmp->tm_year); @@ -122,16 +119,15 @@ int rtc_set( struct rtc_time *tmp ) /* give the RTC some time to update */ udelay(1000); - return 0; + return ret; } /* sets EERE-Bit (automatic EEPROM refresh) */ static void set_eere_bit(int state) { - int ret; unsigned char reg_ctrl1; - ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL1, 1, + (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL1, 1, ®_ctrl1, 1); if (state) @@ -139,18 +135,18 @@ static void set_eere_bit(int state) else reg_ctrl1 &= (~RTC_RV3029_CTRL1_EERE); - ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL1, 1, + (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL1, 1, ®_ctrl1, 1); } /* waits until EEPROM page is no longer busy (times out after 10ms*loops) */ static int wait_eebusy(int loops) { - int i, ret; + int i; unsigned char ctrl_status; for (i = 0; i < loops; i++) { - ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_STATUS, + (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_STATUS, 1, &ctrl_status, 1); if ((ctrl_status & RTC_RV3029_CTRLS_EEBUSY) == 0) @@ -162,11 +158,10 @@ static int wait_eebusy(int loops) void rtc_reset (void) { - int ret; unsigned char buf[RTC_RV3029_PAGE_LEN]; buf[0] = RTC_RV3029_CTRL_SYS_R; - ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_RESET, 1, + (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_RESET, 1, buf, 1); #if defined(CONFIG_SYS_RV3029_TCR) @@ -178,7 +173,7 @@ void rtc_reset (void) set_eere_bit(0); wait_eebusy(100); /* read current trickle charger setting */ - ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_EEPROM_CTRL, + (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_EEPROM_CTRL, 1, buf, 1); /* enable automatic EEPROM refresh again */ set_eere_bit(1); @@ -195,7 +190,7 @@ void rtc_reset (void) */ set_eere_bit(0); wait_eebusy(100); - ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, + (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_EEPROM_CTRL, 1, buf, 1); /* * it is necessary to wait 10ms before EEBUSY-Bit may be read diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index 1863563ce4..561883a1fc 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -101,6 +101,7 @@ #include <common.h> #include <version.h> #include <malloc.h> +#include <linux/compiler.h> /* * Console device defines with SMI graphic @@ -1560,7 +1561,8 @@ void logo_plot(void *screen, int width, int x, int y) static void *video_logo(void) { char info[128]; - int space, len, y_off = 0; + int space, len; + __maybe_unused int y_off = 0; #ifdef CONFIG_SPLASH_SCREEN char *s; diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c index 6fe5811aec..ef9bc4c082 100644 --- a/drivers/video/videomodes.c +++ b/drivers/video/videomodes.c @@ -159,15 +159,18 @@ video_search_param (char *start, char *param) int video_get_params (struct ctfb_res_modes *pPar, char *penv) { char *p, *s, *val_s; - int i = 0, t; + int i = 0; int bpp; int mode; + /* first search for the environment containing the real param string */ s = penv; - if ((p = getenv (s)) != NULL) { + + if ((p = getenv (s)) != NULL) s = p; - } - /* in case of the bootargs line, we have to start + + /* + * in case of the bootargs line, we have to start * after "video=ctfb:" */ i = video_search_param (s, "video=ctfb:"); @@ -177,19 +180,22 @@ int video_get_params (struct ctfb_res_modes *pPar, char *penv) } /* search for mode as a default value */ p = s; - t = 0; mode = 0; /* default */ + while ((i = video_get_param_len (p, ',')) != 0) { GET_OPTION ("mode:", mode) p += i; if (*p != 0) p++; /* skip ',' */ } + if (mode >= RES_MODES_COUNT) mode = 0; + *pPar = res_mode_init[mode]; /* copy default values */ bpp = 24 - ((mode % 3) * 8); p = s; /* restart */ + while ((i = video_get_param_len (p, ',')) != 0) { GET_OPTION ("x:", pPar->xres) GET_OPTION ("y:", pPar->yres) diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 28baa546ab..9a29458c6c 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -71,7 +71,6 @@ static int disk_read (__u32 startblock, __u32 getsize, __u8 * bufptr) int fat_register_device (block_dev_desc_t * dev_desc, int part_no) { unsigned char buffer[dev_desc->blksz]; - disk_partition_t info; if (!dev_desc->block_read) return -1; @@ -95,28 +94,32 @@ int fat_register_device (block_dev_desc_t * dev_desc, int part_no) defined(CONFIG_CMD_USB) || \ defined(CONFIG_MMC) || \ defined(CONFIG_SYSTEMACE) ) - /* First we assume there is a MBR */ - if (!get_partition_info(dev_desc, part_no, &info)) { - part_offset = info.start; - cur_part = part_no; - } else if ((strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET], "FAT", 3) == 0) || - (strncmp((char *)&buffer[DOS_FS32_TYPE_OFFSET], "FAT32", 5) == 0)) { - /* ok, we assume we are on a PBR only */ - cur_part = 1; - part_offset = 0; - } else { - printf("** Partition %d not valid on device %d **\n", - part_no, dev_desc->dev); - return -1; + { + disk_partition_t info; + + /* First we assume there is a MBR */ + if (!get_partition_info(dev_desc, part_no, &info)) { + part_offset = info.start; + cur_part = part_no; + } else if ((strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET], + "FAT", 3) == 0) || + (strncmp((char *)&buffer[DOS_FS32_TYPE_OFFSET], + "FAT32", 5) == 0)) { + /* ok, we assume we are on a PBR only */ + cur_part = 1; + part_offset = 0; + } else { + printf("** Partition %d not valid on device %d **\n", + part_no, dev_desc->dev); + return -1; + } } - #else if ((strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET], "FAT", 3) == 0) || (strncmp((char *)&buffer[DOS_FS32_TYPE_OFFSET], "FAT32", 5) == 0)) { /* ok, we assume we are on a PBR only */ cur_part = 1; part_offset = 0; - info.start = part_offset; } else { /* FIXME we need to determine the start block of the * partition where the DOS FS resides. This can be done diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 57225447fb..bfbb06c008 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -246,7 +246,8 @@ /* * Configuration for environment - * Environment is embedded in u-boot in the second sector of the flash + * Environment is not embedded in u-boot. First time runing may have env + * crc error warning if there is no correct environment on the flash. */ #ifdef CONFIG_CF_SBF # define CONFIG_ENV_IS_IN_SPI_FLASH @@ -261,6 +262,7 @@ */ #ifdef CONFIG_SYS_STMICRO_BOOT # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE # define CONFIG_ENV_OFFSET 0x30000 # define CONFIG_ENV_SIZE 0x1000 # define CONFIG_ENV_SECT_SIZE 0x10000 @@ -268,7 +270,7 @@ #ifdef CONFIG_SYS_SPANSION_BOOT # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000) +# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) # define CONFIG_ENV_SIZE 0x1000 # define CONFIG_ENV_SECT_SIZE 0x8000 #endif diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h index 3b520254a0..911560ce8d 100644 --- a/include/configs/TQM850M.h +++ b/include/configs/TQM850M.h @@ -45,6 +45,8 @@ #define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + #define CONFIG_BOARD_TYPES 1 /* support board types */ #define CONFIG_PREBOOT "echo;echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;echo" @@ -1080,7 +1080,6 @@ CDPHandler(const uchar *pkt, unsigned len) const uchar *t; const ushort *ss; ushort type, tlen; - uchar applid; ushort vlan, nvlan; /* minimum size? */ @@ -1152,11 +1151,10 @@ CDPHandler(const uchar *pkt, unsigned len) if (tlen < 3) goto pkt_short; - applid = t[0]; ss = (const ushort *)(t + 1); #ifdef CONFIG_CDP_APPLIANCE_VLAN_TYPE - if (applid == CONFIG_CDP_APPLIANCE_VLAN_TYPE) + if (t[0] == CONFIG_CDP_APPLIANCE_VLAN_TYPE) vlan = *ss; #else /* XXX will this work; dunno */ |
