diff options
257 files changed, 5075 insertions, 1482 deletions
@@ -5,7 +5,7 @@ VERSION = 2016 PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc3 NAME = # *DOCUMENTATION* @@ -810,7 +810,9 @@ ifeq ($(CONFIG_DM_I2C_COMPAT),y) endif PHONY += dtbs -dtbs dts/dt.dtb: checkdtc u-boot +dtbs: dts/dt.dtb + @: +dts/dt.dtb: checkdtc u-boot $(Q)$(MAKE) $(build)=dts dtbs quiet_cmd_copy = COPY $@ @@ -1269,8 +1271,8 @@ prepare: prepare0 define filechk_version.h (echo \#define PLAIN_VERSION \"$(UBOOTRELEASE)\"; \ echo \#define U_BOOT_VERSION \"U-Boot \" PLAIN_VERSION; \ - echo \#define CC_VERSION_STRING \"$$($(CC) --version | head -n 1)\"; \ - echo \#define LD_VERSION_STRING \"$$($(LD) --version | head -n 1)\"; ) + echo \#define CC_VERSION_STRING \"$$(LC_ALL=C $(CC) --version | head -n 1)\"; \ + echo \#define LD_VERSION_STRING \"$$(LC_ALL=C $(LD) --version | head -n 1)\"; ) endef # The SOURCE_DATE_EPOCH mechanism requires a date that behaves like GNU date. @@ -890,23 +890,6 @@ The following options need to be configured: 'Sane' compilers will generate smaller code if CONFIG_PRE_CON_BUF_SZ is a power of 2 -- Boot Delay: CONFIG_BOOTDELAY - in seconds - Delay before automatically booting the default image; - set to -1 to disable autoboot. - set to -2 to autoboot with no delay and not check for abort - (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined). - - See doc/README.autoboot for these options that - work with CONFIG_BOOTDELAY. None are required. - CONFIG_BOOT_RETRY_TIME - CONFIG_BOOT_RETRY_MIN - CONFIG_AUTOBOOT_KEYED - CONFIG_AUTOBOOT_PROMPT - CONFIG_AUTOBOOT_DELAY_STR - CONFIG_AUTOBOOT_STOP_STR - CONFIG_ZERO_BOOTDELAY_CHECK - CONFIG_RESET_TO_RETRY - - Autoboot Command: CONFIG_BOOTCOMMAND Only needed when CONFIG_BOOTDELAY is enabled; diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e9d2fc9845..3237a74f72 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -304,13 +304,13 @@ config TARGET_VEXPRESS_CA9X4 bool "Support vexpress_ca9x4" select CPU_V7 -config TARGET_KWB - bool "Support kwb" +config TARGET_BRXRE1 + bool "Support BRXRE1" select CPU_V7 select SUPPORT_SPL -config TARGET_TSERIES - bool "Support tseries" +config TARGET_BRPPT1 + bool "Support BRPPT1" select CPU_V7 select SUPPORT_SPL @@ -908,8 +908,8 @@ source "arch/arm/cpu/armv8/Kconfig" source "arch/arm/imx-common/Kconfig" source "board/bosch/shc/Kconfig" -source "board/BuR/kwb/Kconfig" -source "board/BuR/tseries/Kconfig" +source "board/BuR/brxre1/Kconfig" +source "board/BuR/brppt1/Kconfig" source "board/CarMediaLab/flea3/Kconfig" source "board/Marvell/aspenite/Kconfig" source "board/Marvell/gplugd/Kconfig" diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index bc98edda7a..068d93eeec 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -526,7 +526,7 @@ u32 spl_boot_device(void) } #ifdef CONFIG_SPL_BUILD -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { switch (spl_boot_device()) { case BOOT_DEVICE_MMC1: diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 0a5ac97df0..ddd8d12d51 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -18,15 +18,8 @@ obj-y += lowlevel_init.o endif endif -ifneq ($(CONFIG_ARMV7_NONSEC),) -obj-y += nonsec_virt.o -obj-y += virt-v7.o -obj-y += virt-dt.o -endif - -ifneq ($(CONFIG_ARMV7_PSCI),) -obj-y += psci.o -endif +obj-$(CONFIG_ARMV7_NONSEC) += nonsec_virt.o virt-v7.o virt-dt.o +obj-$(CONFIG_ARMV7_PSCI) += psci.o obj-$(CONFIG_IPROC) += iproc-common/ obj-$(CONFIG_KONA) += kona-common/ diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c index ce3d019125..80187e3eca 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c @@ -292,7 +292,7 @@ static struct ccu_clock kps_ccu_clk = { .ops = &ccu_clk_ops, .ccu_clk_mgr_base = KONA_SLV_CLK_BASE_ADDR, }, - .num_policy_masks = 2, + .num_policy_masks = 1, .policy_freq_offset = 0x00000008, .freq_bit_shift = 8, .policy_ctl_offset = 0x0000000c, @@ -300,10 +300,6 @@ static struct ccu_clock kps_ccu_clk = { .policy1_mask_offset = 0x00000014, .policy2_mask_offset = 0x00000018, .policy3_mask_offset = 0x0000001c, - .policy0_mask2_offset = 0x00000048, - .policy1_mask2_offset = 0x0000004c, - .policy2_mask2_offset = 0x00000050, - .policy3_mask2_offset = 0x00000054, .lvm_en_offset = 0x00000034, .freq_id = 2, .freq_tbl = slave_axi_freq_tbl, diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c index 2b5da6bb6b..a326dfea6c 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c @@ -449,10 +449,9 @@ int clk_enable(struct clk *c) if (ret) return ret; - if (!c->use_cnt) { - c->use_cnt++; + if (!c->use_cnt) ret = c->ops->enable(c, 1); - } + c->use_cnt++; return ret; } @@ -464,9 +463,10 @@ void clk_disable(struct clk *c) if (!c->ops || !c->ops->enable) return; - if (c->use_cnt) { + if (c->use_cnt > 0) { c->use_cnt--; - c->ops->enable(c, 0); + if (c->use_cnt == 0) + c->ops->enable(c, 0); } /* disable parent */ diff --git a/arch/arm/cpu/armv7/ls102xa/spl.c b/arch/arm/cpu/armv7/ls102xa/spl.c index 02890584a5..1246eed2ca 100644 --- a/arch/arm/cpu/armv7/ls102xa/spl.c +++ b/arch/arm/cpu/armv7/ls102xa/spl.c @@ -15,7 +15,7 @@ u32 spl_boot_device(void) return BOOT_DEVICE_NAND; } -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { switch (spl_boot_device()) { case BOOT_DEVICE_MMC1: diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c index 8333b20001..60c367a202 100644 --- a/arch/arm/cpu/armv7/omap-common/boot-common.c +++ b/arch/arm/cpu/armv7/omap-common/boot-common.c @@ -166,7 +166,7 @@ u32 spl_boot_device(void) return gd->arch.omap_boot_device; } -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { return gd->arch.omap_boot_mode; } diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 032bd2c24f..49e3a971d9 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -77,7 +77,7 @@ ulong get_timer_masked(void) /* move stamp fordward with absoulte diff ticks */ gd->arch.tbl += (now - gd->arch.lastinc); } else { /* we have rollover of incrementer */ - gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK / + gd->arch.tbl += ((TIMER_OVERFLOW_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) - gd->arch.lastinc) + now; } gd->arch.lastinc = now; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 3a77b21d0a..d0dc58d181 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -11,6 +11,7 @@ #include <asm/arch/clock.h> #include <asm/arch/soc.h> #include <fsl_ifc.h> +#include "cpu.h" DECLARE_GLOBAL_DATA_PTR; @@ -47,7 +48,7 @@ void get_sys_info(struct sys_info *sys_info) [5] = 2, /* CC2 PPL / 2 */ }; - uint i; + uint i, cluster; uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; unsigned long sysclk = CONFIG_SYS_CLK_FREQ; @@ -80,8 +81,9 @@ void get_sys_info(struct sys_info *sys_info) freq_c_pll[i] = sys_info->freq_systembus * ratio[i]; } - for (cpu = 0; cpu < CONFIG_MAX_CPUS; cpu++) { - u32 c_pll_sel = (in_be32(&clk->clkcsr[cpu].clkcncsr) >> 27) + for_each_cpu(i, cpu, cpu_numcores(), cpu_mask()) { + cluster = fsl_qoriq_core_to_cluster(cpu); + u32 c_pll_sel = (in_be32(&clk->clkcsr[cluster].clkcncsr) >> 27) & 0xf; u32 cplx_pll = core_cplx_pll[c_pll_sel]; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index d8ec426ce2..f62b78d102 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -28,7 +28,7 @@ bool soc_has_dp_ddr(void) u32 svr = gur_in32(&gur->svr); /* LS2085A has DP_DDR */ - if (SVR_SOC_VER(svr) == SVR_LS2085) + if (SVR_SOC_VER(svr) == SVR_LS2085A) return true; return false; @@ -40,7 +40,7 @@ bool soc_has_aiop(void) u32 svr = gur_in32(&gur->svr); /* LS2085A has AIOP */ - if (SVR_SOC_VER(svr) == SVR_LS2085) + if (SVR_SOC_VER(svr) == SVR_LS2085A) return true; return false; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 5883c002be..19e34fade2 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -24,7 +24,7 @@ u32 spl_boot_device(void) return 0; } -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { switch (spl_boot_device()) { case BOOT_DEVICE_MMC1: diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index c1a2f456d5..670e323b61 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -258,12 +258,10 @@ ENDPROC(lowlevel_init) WEAK(smp_kick_all_cpus) /* Kick secondary cpus up by SGI 0 interrupt */ - mov x29, lr /* Save LR */ #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) ldr x0, =GICD_BASE - bl gic_kick_secondary_cpus + b gic_kick_secondary_cpus #endif - mov lr, x29 /* Restore LR */ ret ENDPROC(smp_kick_all_cpus) diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c index e3e2a4fb5a..867d2b25a8 100644 --- a/arch/arm/cpu/armv8/zynqmp/spl.c +++ b/arch/arm/cpu/armv8/zynqmp/spl.c @@ -68,7 +68,7 @@ u32 spl_boot_device(void) return 0; } -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { switch (spl_boot_device()) { case BOOT_DEVICE_RAM: diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index de75e24d1b..5d463cea4a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -2,7 +2,11 @@ # SPDX-License-Identifier: GPL-2.0+ # -dtb-$(CONFIG_AT91FAMILY) += at91sam9g45-gurnard.dtb +dtb-$(CONFIG_AT91FAMILY) += at91sam9260-smartweb.dtb \ + at91sam9g20-taurus.dtb \ + at91sam9g45-corvus.dtb \ + at91sam9g45-gurnard.dtb + dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ diff --git a/arch/arm/dts/at91sam9260-smartweb.dts b/arch/arm/dts/at91sam9260-smartweb.dts new file mode 100644 index 0000000000..faed763e43 --- /dev/null +++ b/arch/arm/dts/at91sam9260-smartweb.dts @@ -0,0 +1,110 @@ +/* + * at91sam9260-smartweb.dts + * (C) Copyright 2016 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board + * + * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Licensed under GPLv2. + */ +/dts-v1/; +#include "at91sam9260.dtsi" + +/ { + model = "Siemens smartweb"; + compatible = "atmel,at91sam9260", "atmel,at91sam9"; + + chosen { + stdout-path = &dbgu; + }; + + memory { + reg = <0x20000000 0x4000000>; + }; + + clocks { + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <18432000>; + }; + }; + + ahb { + apb { + pinctrl@fffff400 { + board { + pinctrl_pck0_as_mck: pck0_as_mck { + atmel,pins = + <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */ + }; + + }; + }; + + dbgu: serial@fffff200 { + status = "okay"; + }; + + usart0: serial@fffb0000 { + pinctrl-0 = + <&pinctrl_usart0 + &pinctrl_usart0_rts + &pinctrl_usart0_cts + &pinctrl_usart0_dtr_dsr + &pinctrl_usart0_dcd + &pinctrl_usart0_ri>; + status = "okay"; + }; + + usart1: serial@fffb4000 { + status = "okay"; + }; + + macb0: ethernet@fffc4000 { + phy-mode = "rmii"; + status = "okay"; + }; + + usb1: gadget@fffa4000 { + atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + ssc0: ssc@fffbc000 { + status = "okay"; + pinctrl-0 = <&pinctrl_ssc0_tx>; + }; + + rtc@fffffd20 { + atmel,rtt-rtc-time-reg = <&gpbr 0x0>; + status = "okay"; + }; + + watchdog@fffffd40 { + status = "okay"; + }; + + gpbr: syscon@fffffd50 { + status = "okay"; + }; + }; + + nand0: nand@40000000 { + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + status = "okay"; + }; + + usb0: ohci@00500000 { + num-ports = <2>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm/dts/at91sam9260.dtsi b/arch/arm/dts/at91sam9260.dtsi new file mode 100644 index 0000000000..d4884dd1c2 --- /dev/null +++ b/arch/arm/dts/at91sam9260.dtsi @@ -0,0 +1,1034 @@ +/* + * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC + * + * Copyright (C) 2011 Atmel, + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, + * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Licensed under GPLv2 or later. + */ + +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/at91.h> + +/ { + model = "Atmel AT91SAM9260 family SoC"; + compatible = "atmel,at91sam9260"; + interrupt-parent = <&aic>; + + aliases { + serial0 = &dbgu; + serial1 = &usart0; + serial2 = &usart1; + serial3 = &usart2; + serial4 = &usart3; + serial5 = &uart0; + serial6 = &uart1; + gpio0 = &pioA; + gpio1 = &pioB; + gpio2 = &pioC; + tcb0 = &tcb0; + tcb1 = &tcb1; + i2c0 = &i2c0; + ssc0 = &ssc0; + }; + cpus { + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; + }; + }; + + memory { + reg = <0x20000000 0x04000000>; + }; + + clocks { + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + adc_op_clk: adc_op_clk{ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <5000000>; + }; + }; + + sram0: sram@002ff000 { + compatible = "mmio-sram"; + reg = <0x002ff000 0x2000>; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + aic: interrupt-controller@fffff000 { + #interrupt-cells = <3>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; + atmel,external-irqs = <29 30 31>; + }; + + ramc0: ramc@ffffea00 { + compatible = "atmel,at91sam9260-sdramc"; + reg = <0xffffea00 0x200>; + }; + + pmc: pmc@fffffc00 { + compatible = "atmel,at91sam9260-pmc", "syscon"; + reg = <0xfffffc00 0x100>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCS>; + clocks = <&main_xtal>; + }; + + main: mainck { + compatible = "atmel,at91rm9200-clk-main"; + #clock-cells = <0>; + clocks = <&main_osc>; + }; + + slow_rc_osc: slow_rc_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + }; + + clk32k: slck { + compatible = "atmel,at91sam9260-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc>, <&slow_xtal>; + }; + + plla: pllack { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKA>; + clocks = <&main>; + reg = <0>; + atmel,clk-input-range = <1000000 32000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <80000000 160000000 0 1>, + <150000000 240000000 2 1>; + }; + + pllb: pllbck { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKB>; + clocks = <&main>; + reg = <1>; + atmel,clk-input-range = <1000000 5000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; + }; + + mck: masterck { + compatible = "atmel,at91rm9200-clk-master"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MCKRDY>; + clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; + atmel,clk-output-range = <0 105000000>; + atmel,clk-divisors = <1 2 4 0>; + }; + + usb: usbck { + compatible = "atmel,at91rm9200-clk-usb"; + #clock-cells = <0>; + atmel,clk-divisors = <1 2 4 0>; + clocks = <&pllb>; + }; + + prog: progck { + compatible = "atmel,at91rm9200-clk-programmable"; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&pmc>; + clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; + + prog0: prog0 { + #clock-cells = <0>; + reg = <0>; + interrupts = <AT91_PMC_PCKRDY(0)>; + }; + + prog1: prog1 { + #clock-cells = <0>; + reg = <1>; + interrupts = <AT91_PMC_PCKRDY(1)>; + }; + }; + + systemck { + compatible = "atmel,at91rm9200-clk-system"; + #address-cells = <1>; + #size-cells = <0>; + + uhpck: uhpck { + #clock-cells = <0>; + reg = <6>; + clocks = <&usb>; + }; + + udpck: udpck { + #clock-cells = <0>; + reg = <7>; + clocks = <&usb>; + }; + + pck0: pck0 { + #clock-cells = <0>; + reg = <8>; + clocks = <&prog0>; + }; + + pck1: pck1 { + #clock-cells = <0>; + reg = <9>; + clocks = <&prog1>; + }; + }; + + periphck { + compatible = "atmel,at91rm9200-clk-peripheral"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mck>; + + pioA_clk: pioA_clk { + #clock-cells = <0>; + reg = <2>; + }; + + pioB_clk: pioB_clk { + #clock-cells = <0>; + reg = <3>; + }; + + pioC_clk: pioC_clk { + #clock-cells = <0>; + reg = <4>; + }; + + adc_clk: adc_clk { + #clock-cells = <0>; + reg = <5>; + }; + + usart0_clk: usart0_clk { + #clock-cells = <0>; + reg = <6>; + }; + + usart1_clk: usart1_clk { + #clock-cells = <0>; + reg = <7>; + }; + + usart2_clk: usart2_clk { + #clock-cells = <0>; + reg = <8>; + }; + + mci0_clk: mci0_clk { + #clock-cells = <0>; + reg = <9>; + }; + + udc_clk: udc_clk { + #clock-cells = <0>; + reg = <10>; + }; + + twi0_clk: twi0_clk { + reg = <11>; + #clock-cells = <0>; + }; + + spi0_clk: spi0_clk { + #clock-cells = <0>; + reg = <12>; + }; + + spi1_clk: spi1_clk { + #clock-cells = <0>; + reg = <13>; + }; + + ssc0_clk: ssc0_clk { + #clock-cells = <0>; + reg = <14>; + }; + + tc0_clk: tc0_clk { + #clock-cells = <0>; + reg = <17>; + }; + + tc1_clk: tc1_clk { + #clock-cells = <0>; + reg = <18>; + }; + + tc2_clk: tc2_clk { + #clock-cells = <0>; + reg = <19>; + }; + + ohci_clk: ohci_clk { + #clock-cells = <0>; + reg = <20>; + }; + + macb0_clk: macb0_clk { + #clock-cells = <0>; + reg = <21>; + }; + + isi_clk: isi_clk { + #clock-cells = <0>; + reg = <22>; + }; + + usart3_clk: usart3_clk { + #clock-cells = <0>; + reg = <23>; + }; + + uart0_clk: uart0_clk { + #clock-cells = <0>; + reg = <24>; + }; + + uart1_clk: uart1_clk { + #clock-cells = <0>; + reg = <25>; + }; + + tc3_clk: tc3_clk { + #clock-cells = <0>; + reg = <26>; + }; + + tc4_clk: tc4_clk { + #clock-cells = <0>; + reg = <27>; + }; + + tc5_clk: tc5_clk { + #clock-cells = <0>; + reg = <28>; + }; + }; + }; + + rstc@fffffd00 { + compatible = "atmel,at91sam9260-rstc"; + reg = <0xfffffd00 0x10>; + clocks = <&clk32k>; + }; + + shdwc@fffffd10 { + compatible = "atmel,at91sam9260-shdwc"; + reg = <0xfffffd10 0x10>; + clocks = <&clk32k>; + }; + + pit: timer@fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&mck>; + }; + + tcb0: timer@fffa0000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfffa0000 0x100>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 + 18 IRQ_TYPE_LEVEL_HIGH 0 + 19 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>; + clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; + }; + + tcb1: timer@fffdc000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfffdc000 0x100>; + interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 + 27 IRQ_TYPE_LEVEL_HIGH 0 + 28 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>; + clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; + }; + + pinctrl@fffff400 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; + ranges = <0xfffff400 0xfffff400 0x600>; + + atmel,mux-mask = < + /* A B */ + 0xffffffff 0xffc00c3b /* pioA */ + 0xffffffff 0x7fff3ccf /* pioB */ + 0xffffffff 0x007fffff /* pioC */ + >; + + /* shared pinctrl settings */ + dbgu { + pinctrl_dbgu: dbgu-0 { + atmel,pins = + <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */ + }; + }; + + usart0 { + pinctrl_usart0: usart0-0 { + atmel,pins = + <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ + }; + + pinctrl_usart0_rts: usart0_rts-0 { + atmel,pins = + <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ + }; + + pinctrl_usart0_cts: usart0_cts-0 { + atmel,pins = + <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */ + }; + + pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { + atmel,pins = + <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */ + AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */ + }; + + pinctrl_usart0_dcd: usart0_dcd-0 { + atmel,pins = + <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ + }; + + pinctrl_usart0_ri: usart0_ri-0 { + atmel,pins = + <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ + }; + }; + + usart1 { + pinctrl_usart1: usart1-0 { + atmel,pins = + <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ + }; + + pinctrl_usart1_rts: usart1_rts-0 { + atmel,pins = + <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */ + }; + + pinctrl_usart1_cts: usart1_cts-0 { + atmel,pins = + <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */ + }; + }; + + usart2 { + pinctrl_usart2: usart2-0 { + atmel,pins = + <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */ + }; + + pinctrl_usart2_rts: usart2_rts-0 { + atmel,pins = + <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ + }; + + pinctrl_usart2_cts: usart2_cts-0 { + atmel,pins = + <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ + }; + }; + + usart3 { + pinctrl_usart3: usart3-0 { + atmel,pins = + <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ + }; + + pinctrl_usart3_rts: usart3_rts-0 { + atmel,pins = + <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_usart3_cts: usart3_cts-0 { + atmel,pins = + <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + uart0 { + pinctrl_uart0: uart0-0 { + atmel,pins = + <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */ + AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ + }; + }; + + uart1 { + pinctrl_uart1: uart1-0 { + atmel,pins = + <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ + }; + }; + + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */ + AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ + }; + }; + + macb { + pinctrl_macb_rmii: macb_rmii-0 { + atmel,pins = + <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ + AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ + AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ + AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ + AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */ + AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ + }; + + pinctrl_macb_rmii_mii: macb_rmii_mii-0 { + atmel,pins = + <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ + AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */ + AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ + AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ + AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ + AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ + AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ + AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ + }; + + pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { + atmel,pins = + <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */ + AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */ + AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ + AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ + AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ + AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ + AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ + AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ + }; + }; + + mmc0 { + pinctrl_mmc0_clk: mmc0_clk-0 { + atmel,pins = + <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ + }; + + pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { + atmel,pins = + <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ + AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */ + }; + + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { + atmel,pins = + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ + }; + + pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { + atmel,pins = + <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */ + AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */ + }; + + pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { + atmel,pins = + <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ + AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */ + AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */ + }; + }; + + ssc0 { + pinctrl_ssc0_tx: ssc0_tx-0 { + atmel,pins = + <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */ + AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ + }; + + pinctrl_ssc0_rx: ssc0_rx-0 { + atmel,pins = + <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ + AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */ + AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ + }; + }; + + spi0 { + pinctrl_spi0: spi0-0 { + atmel,pins = + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */ + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */ + AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */ + }; + }; + + spi1 { + pinctrl_spi1: spi1-0 { + atmel,pins = + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */ + }; + }; + + i2c_gpio0 { + pinctrl_i2c_gpio0: i2c_gpio0-0 { + atmel,pins = + <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE + AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + tcb1 { + pinctrl_tcb1_tclk0: tcb1_tclk0-0 { + atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk1: tcb1_tclk1-0 { + atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk2: tcb1_tclk2-0 { + atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa0: tcb1_tioa0-0 { + atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa1: tcb1_tioa1-0 { + atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa2: tcb1_tioa2-0 { + atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob0: tcb1_tiob0-0 { + atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob1: tcb1_tiob1-0 { + atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob2: tcb1_tiob2-0 { + atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + pioA: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x200>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioA_clk>; + }; + + pioB: gpio@fffff600 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x200>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioB_clk>; + }; + + pioC: gpio@fffff800 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x200>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioC_clk>; + }; + }; + + dbgu: serial@fffff200 { + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; + reg = <0xfffff200 0x200>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dbgu>; + clocks = <&mck>; + clock-names = "usart"; + status = "disabled"; + }; + + usart0: serial@fffb0000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb0000 0x200>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart0>; + clocks = <&usart0_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + usart1: serial@fffb4000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb4000 0x200>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart1>; + clocks = <&usart1_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + usart2: serial@fffb8000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb8000 0x200>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart2>; + clocks = <&usart2_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + usart3: serial@fffd0000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd0000 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart3>; + clocks = <&usart3_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + uart0: serial@fffd4000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd4000 0x200>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + clocks = <&uart0_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + uart1: serial@fffd8000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd8000 0x200>; + interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + clocks = <&uart1_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + macb0: ethernet@fffc4000 { + compatible = "cdns,at91sam9260-macb", "cdns,macb"; + reg = <0xfffc4000 0x100>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb_rmii>; + clocks = <&macb0_clk>, <&macb0_clk>; + clock-names = "hclk", "pclk"; + status = "disabled"; + }; + + usb1: gadget@fffa4000 { + compatible = "atmel,at91sam9260-udc"; + reg = <0xfffa4000 0x4000>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&udc_clk>, <&udpck>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; + + i2c0: i2c@fffac000 { + compatible = "atmel,at91sam9260-i2c"; + reg = <0xfffac000 0x100>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&twi0_clk>; + status = "disabled"; + }; + + mmc0: mmc@fffa8000 { + compatible = "atmel,hsmci"; + reg = <0xfffa8000 0x600>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + clocks = <&mci0_clk>; + clock-names = "mci_clk"; + status = "disabled"; + }; + + ssc0: ssc@fffbc000 { + compatible = "atmel,at91rm9200-ssc"; + reg = <0xfffbc000 0x4000>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + clocks = <&ssc0_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + + spi0: spi@fffc8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91rm9200-spi"; + reg = <0xfffc8000 0x200>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0>; + clocks = <&spi0_clk>; + clock-names = "spi_clk"; + status = "disabled"; + }; + + spi1: spi@fffcc000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91rm9200-spi"; + reg = <0xfffcc000 0x200>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1>; + clocks = <&spi1_clk>; + clock-names = "spi_clk"; + status = "disabled"; + }; + + adc0: adc@fffe0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91sam9260-adc"; + reg = <0xfffe0000 0x100>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&adc_clk>, <&adc_op_clk>; + clock-names = "adc_clk", "adc_op_clk"; + atmel,adc-use-external-triggers; + atmel,adc-channels-used = <0xf>; + atmel,adc-vref = <3300>; + atmel,adc-startup-time = <15>; + atmel,adc-res = <8 10>; + atmel,adc-res-names = "lowres", "highres"; + atmel,adc-use-res = "highres"; + + trigger@0 { + reg = <0>; + trigger-name = "timer-counter-0"; + trigger-value = <0x1>; + }; + trigger@1 { + reg = <1>; + trigger-name = "timer-counter-1"; + trigger-value = <0x3>; + }; + + trigger@2 { + reg = <2>; + trigger-name = "timer-counter-2"; + trigger-value = <0x5>; + }; + + trigger@3 { + reg = <3>; + trigger-name = "external"; + trigger-value = <0xd>; + trigger-external; + }; + }; + + rtc@fffffd20 { + compatible = "atmel,at91sam9260-rtt"; + reg = <0xfffffd20 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&clk32k>; + status = "disabled"; + }; + + watchdog@fffffd40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffd40 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&clk32k>; + atmel,watchdog-type = "hardware"; + atmel,reset-type = "all"; + atmel,dbg-halt; + status = "disabled"; + }; + + gpbr: syscon@fffffd50 { + compatible = "atmel,at91sam9260-gpbr", "syscon"; + reg = <0xfffffd50 0x10>; + status = "disabled"; + }; + }; + + nand0: nand@40000000 { + compatible = "atmel,at91rm9200-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x40000000 0x10000000 + 0xffffe800 0x200 + >; + atmel,nand-addr-offset = <21>; + atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; + gpios = <&pioC 13 GPIO_ACTIVE_HIGH + &pioC 14 GPIO_ACTIVE_HIGH + 0 + >; + status = "disabled"; + }; + + usb0: ohci@00500000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00500000 0x100000>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; + clock-names = "ohci_clk", "hclk", "uhpck"; + status = "disabled"; + }; + }; + + i2c@0 { + compatible = "i2c-gpio"; + gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */ + &pioA 24 GPIO_ACTIVE_HIGH /* scl */ + >; + i2c-gpio,sda-open-drain; + i2c-gpio,scl-open-drain; + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_gpio0>; + status = "disabled"; + }; +}; diff --git a/arch/arm/dts/at91sam9261.dtsi b/arch/arm/dts/at91sam9261.dtsi new file mode 100644 index 0000000000..5e09de4eb9 --- /dev/null +++ b/arch/arm/dts/at91sam9261.dtsi @@ -0,0 +1,876 @@ +/* + * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC + * + * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> + * + * Licensed under GPLv2 only. + */ + +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/at91.h> + +/ { + model = "Atmel AT91SAM9261 family SoC"; + compatible = "atmel,at91sam9261"; + interrupt-parent = <&aic>; + + aliases { + serial0 = &dbgu; + serial1 = &usart0; + serial2 = &usart1; + serial3 = &usart2; + gpio0 = &pioA; + gpio1 = &pioB; + gpio2 = &pioC; + tcb0 = &tcb0; + i2c0 = &i2c0; + ssc0 = &ssc0; + ssc1 = &ssc1; + ssc2 = &ssc2; + }; + + cpus { + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; + }; + }; + + memory { + reg = <0x20000000 0x08000000>; + }; + + clocks { + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + }; + + sram: sram@00300000 { + compatible = "mmio-sram"; + reg = <0x00300000 0x28000>; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usb0: ohci@00500000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00500000 0x100000>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&ohci_clk>, <&hclk0>, <&uhpck>; + clock-names = "ohci_clk", "hclk", "uhpck"; + status = "disabled"; + }; + + fb0: fb@0x00600000 { + compatible = "atmel,at91sam9261-lcdc"; + reg = <0x00600000 0x1000>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fb>; + clocks = <&lcd_clk>, <&hclk1>; + clock-names = "lcdc_clk", "hclk"; + status = "disabled"; + }; + + nand0: nand@40000000 { + compatible = "atmel,at91rm9200-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x40000000 0x10000000>; + atmel,nand-addr-offset = <22>; + atmel,nand-cmd-offset = <21>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; + + gpios = <&pioC 15 GPIO_ACTIVE_HIGH>, + <&pioC 14 GPIO_ACTIVE_HIGH>, + <0>; + status = "disabled"; + }; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + tcb0: timer@fffa0000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfffa0000 0x100>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, + <18 IRQ_TYPE_LEVEL_HIGH 0>, + <19 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>; + clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; + }; + + usb1: gadget@fffa4000 { + compatible = "atmel,at91sam9261-udc"; + reg = <0xfffa4000 0x4000>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&udc_clk>, <&udpck>; + clock-names = "pclk", "hclk"; + atmel,matrix = <&matrix>; + status = "disabled"; + }; + + mmc0: mmc@fffa8000 { + compatible = "atmel,hsmci"; + reg = <0xfffa8000 0x600>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mci0_clk>; + clock-names = "mci_clk"; + status = "disabled"; + }; + + i2c0: i2c@fffac000 { + compatible = "atmel,at91sam9261-i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_twi>; + reg = <0xfffac000 0x100>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&twi0_clk>; + status = "disabled"; + }; + + usart0: serial@fffb0000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb0000 0x200>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart0>; + clocks = <&usart0_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + usart1: serial@fffb4000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb4000 0x200>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart1>; + clocks = <&usart1_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + usart2: serial@fffb8000{ + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb8000 0x200>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart2>; + clocks = <&usart2_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + ssc0: ssc@fffbc000 { + compatible = "atmel,at91rm9200-ssc"; + reg = <0xfffbc000 0x4000>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + clocks = <&ssc0_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + + ssc1: ssc@fffc0000 { + compatible = "atmel,at91rm9200-ssc"; + reg = <0xfffc0000 0x4000>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; + clocks = <&ssc1_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + + ssc2: ssc@fffc4000 { + compatible = "atmel,at91rm9200-ssc"; + reg = <0xfffc4000 0x4000>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; + clocks = <&ssc2_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + + spi0: spi@fffc8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91rm9200-spi"; + reg = <0xfffc8000 0x200>; + cs-gpios = <0>, <0>, <0>, <0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0>; + clocks = <&spi0_clk>; + clock-names = "spi_clk"; + status = "disabled"; + }; + + spi1: spi@fffcc000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91rm9200-spi"; + reg = <0xfffcc000 0x200>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1>; + clocks = <&spi1_clk>; + clock-names = "spi_clk"; + status = "disabled"; + }; + + ramc: ramc@ffffea00 { + compatible = "atmel,at91sam9260-sdramc"; + reg = <0xffffea00 0x200>; + }; + + matrix: matrix@ffffee00 { + compatible = "atmel,at91sam9260-bus-matrix", "syscon"; + reg = <0xffffee00 0x200>; + }; + + aic: interrupt-controller@fffff000 { + #interrupt-cells = <3>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; + atmel,external-irqs = <29 30 31>; + }; + + dbgu: serial@fffff200 { + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; + reg = <0xfffff200 0x200>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dbgu>; + clocks = <&mck>; + clock-names = "usart"; + status = "disabled"; + }; + + pinctrl@fffff400 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; + ranges = <0xfffff400 0xfffff400 0x600>; + + atmel,mux-mask = + /* A B */ + <0xffffffff 0xfffffff7>, /* pioA */ + <0xffffffff 0xfffffff4>, /* pioB */ + <0xffffffff 0xffffff07>; /* pioC */ + + /* shared pinctrl settings */ + dbgu { + pinctrl_dbgu: dbgu-0 { + atmel,pins = + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; + }; + }; + + usart0 { + pinctrl_usart0: usart0-0 { + atmel,pins = + <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, + <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_usart0_rts: usart0_rts-0 { + atmel,pins = + <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_usart0_cts: usart0_cts-0 { + atmel,pins = + <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + usart1 { + pinctrl_usart1: usart1-0 { + atmel,pins = + <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, + <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_usart1_rts: usart1_rts-0 { + atmel,pins = + <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_usart1_cts: usart1_cts-0 { + atmel,pins = + <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + usart2 { + pinctrl_usart2: usart2-0 { + atmel,pins = + <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, + <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_usart2_rts: usart2_rts-0 { + atmel,pins = + <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_usart2_cts: usart2_cts-0 { + atmel,pins = + <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, + <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + }; + }; + + mmc0 { + pinctrl_mmc0_clk: mmc0_clk-0 { + atmel,pins = + <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { + atmel,pins = + <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, + <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; + }; + + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { + atmel,pins = + <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, + <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, + <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; + }; + }; + + ssc0 { + pinctrl_ssc0_tx: ssc0_tx-0 { + atmel,pins = + <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_ssc0_rx: ssc0_rx-0 { + atmel,pins = + <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + ssc1 { + pinctrl_ssc1_tx: ssc1_tx-0 { + atmel,pins = + <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_ssc1_rx: ssc1_rx-0 { + atmel,pins = + <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + ssc2 { + pinctrl_ssc2_tx: ssc2_tx-0 { + atmel,pins = + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_ssc2_rx: ssc2_rx-0 { + atmel,pins = + <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + spi0 { + pinctrl_spi0: spi0-0 { + atmel,pins = + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + spi1 { + pinctrl_spi1: spi1-0 { + atmel,pins = + <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + i2c0 { + pinctrl_i2c_bitbang: i2c-0-bitbang { + atmel,pins = + <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>, + <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_i2c_twi: i2c-0-twi { + atmel,pins = + <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + fb { + pinctrl_fb: fb-0 { + atmel,pins = + <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + pioA: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x200>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioA_clk>; + }; + + pioB: gpio@fffff600 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x200>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioB_clk>; + }; + + pioC: gpio@fffff800 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x200>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioC_clk>; + }; + }; + + pmc: pmc@fffffc00 { + compatible = "atmel,at91rm9200-pmc", "syscon"; + reg = <0xfffffc00 0x100>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCS>; + clocks = <&main_xtal>; + }; + + main: mainck { + compatible = "atmel,at91rm9200-clk-main"; + #clock-cells = <0>; + clocks = <&main_osc>; + }; + + plla: pllack { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKA>; + clocks = <&main>; + reg = <0>; + atmel,clk-input-range = <1000000 32000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, + <190000000 240000000 2 1>; + }; + + pllb: pllbck { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKB>; + clocks = <&main>; + reg = <1>; + atmel,clk-input-range = <1000000 5000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; + }; + + mck: masterck { + compatible = "atmel,at91rm9200-clk-master"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MCKRDY>; + clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; + atmel,clk-output-range = <0 94000000>; + atmel,clk-divisors = <1 2 4 0>; + }; + + usb: usbck { + compatible = "atmel,at91rm9200-clk-usb"; + #clock-cells = <0>; + atmel,clk-divisors = <1 2 4 0>; + clocks = <&pllb>; + }; + + prog: progck { + compatible = "atmel,at91rm9200-clk-programmable"; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&pmc>; + clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; + + prog0: prog0 { + #clock-cells = <0>; + reg = <0>; + interrupts = <AT91_PMC_PCKRDY(0)>; + }; + + prog1: prog1 { + #clock-cells = <0>; + reg = <1>; + interrupts = <AT91_PMC_PCKRDY(1)>; + }; + + prog2: prog2 { + #clock-cells = <0>; + reg = <2>; + interrupts = <AT91_PMC_PCKRDY(2)>; + }; + + prog3: prog3 { + #clock-cells = <0>; + reg = <3>; + interrupts = <AT91_PMC_PCKRDY(3)>; + }; + }; + + systemck { + compatible = "atmel,at91rm9200-clk-system"; + #address-cells = <1>; + #size-cells = <0>; + + uhpck: uhpck { + #clock-cells = <0>; + reg = <6>; + clocks = <&usb>; + }; + + udpck: udpck { + #clock-cells = <0>; + reg = <7>; + clocks = <&usb>; + }; + + pck0: pck0 { + #clock-cells = <0>; + reg = <8>; + clocks = <&prog0>; + }; + + pck1: pck1 { + #clock-cells = <0>; + reg = <9>; + clocks = <&prog1>; + }; + + pck2: pck2 { + #clock-cells = <0>; + reg = <10>; + clocks = <&prog2>; + }; + + pck3: pck3 { + #clock-cells = <0>; + reg = <11>; + clocks = <&prog3>; + }; + + hclk0: hclk0 { + #clock-cells = <0>; + reg = <16>; + clocks = <&mck>; + }; + + hclk1: hclk1 { + #clock-cells = <0>; + reg = <17>; + clocks = <&mck>; + }; + }; + + periphck { + compatible = "atmel,at91rm9200-clk-peripheral"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mck>; + + pioA_clk: pioA_clk { + #clock-cells = <0>; + reg = <2>; + }; + + pioB_clk: pioB_clk { + #clock-cells = <0>; + reg = <3>; + }; + + pioC_clk: pioC_clk { + #clock-cells = <0>; + reg = <4>; + }; + + usart0_clk: usart0_clk { + #clock-cells = <0>; + reg = <6>; + }; + + usart1_clk: usart1_clk { + #clock-cells = <0>; + reg = <7>; + }; + + usart2_clk: usart2_clk { + #clock-cells = <0>; + reg = <8>; + }; + + mci0_clk: mci0_clk { + #clock-cells = <0>; + reg = <9>; + }; + + udc_clk: udc_clk { + #clock-cells = <0>; + reg = <10>; + }; + + twi0_clk: twi0_clk { + reg = <11>; + #clock-cells = <0>; + }; + + spi0_clk: spi0_clk { + #clock-cells = <0>; + reg = <12>; + }; + + spi1_clk: spi1_clk { + #clock-cells = <0>; + reg = <13>; + }; + + ssc0_clk: ssc0_clk { + #clock-cells = <0>; + reg = <14>; + }; + + ssc1_clk: ssc1_clk { + #clock-cells = <0>; + reg = <15>; + }; + + ssc2_clk: ssc2_clk { + #clock-cells = <0>; + reg = <16>; + }; + + tc0_clk: tc0_clk { + #clock-cells = <0>; + reg = <17>; + }; + + tc1_clk: tc1_clk { + #clock-cells = <0>; + reg = <18>; + }; + + tc2_clk: tc2_clk { + #clock-cells = <0>; + reg = <19>; + }; + + ohci_clk: ohci_clk { + #clock-cells = <0>; + reg = <20>; + }; + + lcd_clk: lcd_clk { + #clock-cells = <0>; + reg = <21>; + }; + }; + }; + + rstc@fffffd00 { + compatible = "atmel,at91sam9260-rstc"; + reg = <0xfffffd00 0x10>; + clocks = <&slow_xtal>; + }; + + shdwc@fffffd10 { + compatible = "atmel,at91sam9260-shdwc"; + reg = <0xfffffd10 0x10>; + clocks = <&slow_xtal>; + }; + + pit: timer@fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&mck>; + }; + + rtc@fffffd20 { + compatible = "atmel,at91sam9260-rtt"; + reg = <0xfffffd20 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&slow_xtal>; + status = "disabled"; + }; + + watchdog@fffffd40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffd40 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&slow_xtal>; + status = "disabled"; + }; + + gpbr: syscon@fffffd50 { + compatible = "atmel,at91sam9260-gpbr", "syscon"; + reg = <0xfffffd50 0x10>; + status = "disabled"; + }; + }; + }; + + i2c@0 { + compatible = "i2c-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_bitbang>; + gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */ + <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */ + i2c-gpio,sda-open-drain; + i2c-gpio,scl-open-drain; + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; +}; diff --git a/arch/arm/dts/at91sam9263.dtsi b/arch/arm/dts/at91sam9263.dtsi new file mode 100644 index 0000000000..93446420af --- /dev/null +++ b/arch/arm/dts/at91sam9263.dtsi @@ -0,0 +1,1034 @@ +/* + * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC + * + * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Licensed under GPLv2 only. + */ + +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/at91.h> + +/ { + model = "Atmel AT91SAM9263 family SoC"; + compatible = "atmel,at91sam9263"; + interrupt-parent = <&aic>; + + aliases { + serial0 = &dbgu; + serial1 = &usart0; + serial2 = &usart1; + serial3 = &usart2; + gpio0 = &pioA; + gpio1 = &pioB; + gpio2 = &pioC; + gpio3 = &pioD; + gpio4 = &pioE; + tcb0 = &tcb0; + i2c0 = &i2c0; + ssc0 = &ssc0; + ssc1 = &ssc1; + pwm0 = &pwm0; + }; + + cpus { + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; + }; + }; + + memory { + reg = <0x20000000 0x08000000>; + }; + + clocks { + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + }; + + sram0: sram@00300000 { + compatible = "mmio-sram"; + reg = <0x00300000 0x14000>; + }; + + sram1: sram@00500000 { + compatible = "mmio-sram"; + reg = <0x00500000 0x4000>; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + aic: interrupt-controller@fffff000 { + #interrupt-cells = <3>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; + atmel,external-irqs = <30 31>; + }; + + pmc: pmc@fffffc00 { + compatible = "atmel,at91rm9200-pmc", "syscon"; + reg = <0xfffffc00 0x100>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCS>; + clocks = <&main_xtal>; + }; + + main: mainck { + compatible = "atmel,at91rm9200-clk-main"; + #clock-cells = <0>; + clocks = <&main_osc>; + }; + + plla: pllack { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKA>; + clocks = <&main>; + reg = <0>; + atmel,clk-input-range = <1000000 32000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, + <190000000 240000000 2 1>; + }; + + pllb: pllbck { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKB>; + clocks = <&main>; + reg = <1>; + atmel,clk-input-range = <1000000 32000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, + <190000000 240000000 2 1>; + }; + + mck: masterck { + compatible = "atmel,at91rm9200-clk-master"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MCKRDY>; + clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; + atmel,clk-output-range = <0 120000000>; + atmel,clk-divisors = <1 2 4 0>; + }; + + usb: usbck { + compatible = "atmel,at91rm9200-clk-usb"; + #clock-cells = <0>; + atmel,clk-divisors = <1 2 4 0>; + clocks = <&pllb>; + }; + + prog: progck { + compatible = "atmel,at91rm9200-clk-programmable"; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&pmc>; + clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; + + prog0: prog0 { + #clock-cells = <0>; + reg = <0>; + interrupts = <AT91_PMC_PCKRDY(0)>; + }; + + prog1: prog1 { + #clock-cells = <0>; + reg = <1>; + interrupts = <AT91_PMC_PCKRDY(1)>; + }; + + prog2: prog2 { + #clock-cells = <0>; + reg = <2>; + interrupts = <AT91_PMC_PCKRDY(2)>; + }; + + prog3: prog3 { + #clock-cells = <0>; + reg = <3>; + interrupts = <AT91_PMC_PCKRDY(3)>; + }; + }; + + systemck { + compatible = "atmel,at91rm9200-clk-system"; + #address-cells = <1>; + #size-cells = <0>; + + uhpck: uhpck { + #clock-cells = <0>; + reg = <6>; + clocks = <&usb>; + }; + + udpck: udpck { + #clock-cells = <0>; + reg = <7>; + clocks = <&usb>; + }; + + pck0: pck0 { + #clock-cells = <0>; + reg = <8>; + clocks = <&prog0>; + }; + + pck1: pck1 { + #clock-cells = <0>; + reg = <9>; + clocks = <&prog1>; + }; + + pck2: pck2 { + #clock-cells = <0>; + reg = <10>; + clocks = <&prog2>; + }; + + pck3: pck3 { + #clock-cells = <0>; + reg = <11>; + clocks = <&prog3>; + }; + }; + + periphck { + compatible = "atmel,at91rm9200-clk-peripheral"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mck>; + + pioA_clk: pioA_clk { + #clock-cells = <0>; + reg = <2>; + }; + + pioB_clk: pioB_clk { + #clock-cells = <0>; + reg = <3>; + }; + + pioCDE_clk: pioCDE_clk { + #clock-cells = <0>; + reg = <4>; + }; + + usart0_clk: usart0_clk { + #clock-cells = <0>; + reg = <7>; + }; + + usart1_clk: usart1_clk { + #clock-cells = <0>; + reg = <8>; + }; + + usart2_clk: usart2_clk { + #clock-cells = <0>; + reg = <9>; + }; + + mci0_clk: mci0_clk { + #clock-cells = <0>; + reg = <10>; + }; + + mci1_clk: mci1_clk { + #clock-cells = <0>; + reg = <11>; + }; + + can_clk: can_clk { + #clock-cells = <0>; + reg = <12>; + }; + + twi0_clk: twi0_clk { + #clock-cells = <0>; + reg = <13>; + }; + + spi0_clk: spi0_clk { + #clock-cells = <0>; + reg = <14>; + }; + + spi1_clk: spi1_clk { + #clock-cells = <0>; + reg = <15>; + }; + + ssc0_clk: ssc0_clk { + #clock-cells = <0>; + reg = <16>; + }; + + ssc1_clk: ssc1_clk { + #clock-cells = <0>; + reg = <17>; + }; + + ac97_clk: ac97_clk { + #clock-cells = <0>; + reg = <18>; + }; + + tcb_clk: tcb_clk { + #clock-cells = <0>; + reg = <19>; + }; + + pwm_clk: pwm_clk { + #clock-cells = <0>; + reg = <20>; + }; + + macb0_clk: macb0_clk { + #clock-cells = <0>; + reg = <21>; + }; + + g2de_clk: g2de_clk { + #clock-cells = <0>; + reg = <23>; + }; + + udc_clk: udc_clk { + #clock-cells = <0>; + reg = <24>; + }; + + isi_clk: isi_clk { + #clock-cells = <0>; + reg = <25>; + }; + + lcd_clk: lcd_clk { + #clock-cells = <0>; + reg = <26>; + }; + + dma_clk: dma_clk { + #clock-cells = <0>; + reg = <27>; + }; + + ohci_clk: ohci_clk { + #clock-cells = <0>; + reg = <29>; + }; + }; + }; + + ramc0: ramc@ffffe200 { + compatible = "atmel,at91sam9260-sdramc"; + reg = <0xffffe200 0x200>; + }; + + ramc1: ramc@ffffe800 { + compatible = "atmel,at91sam9260-sdramc"; + reg = <0xffffe800 0x200>; + }; + + pit: timer@fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&mck>; + }; + + tcb0: timer@fff7c000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfff7c000 0x100>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tcb_clk>, <&slow_xtal>; + clock-names = "t0_clk", "slow_clk"; + }; + + rstc@fffffd00 { + compatible = "atmel,at91sam9260-rstc"; + reg = <0xfffffd00 0x10>; + clocks = <&slow_xtal>; + }; + + shdwc@fffffd10 { + compatible = "atmel,at91sam9260-shdwc"; + reg = <0xfffffd10 0x10>; + clocks = <&slow_xtal>; + }; + + pinctrl@fffff200 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; + ranges = <0xfffff200 0xfffff200 0xa00>; + + atmel,mux-mask = < + /* A B */ + 0xfffffffb 0xffffe07f /* pioA */ + 0x0007ffff 0x39072fff /* pioB */ + 0xffffffff 0x3ffffff8 /* pioC */ + 0xfffffbff 0xffffffff /* pioD */ + 0xffe00fff 0xfbfcff00 /* pioE */ + >; + + /* shared pinctrl settings */ + dbgu { + pinctrl_dbgu: dbgu-0 { + atmel,pins = + <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */ + AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */ + }; + }; + + usart0 { + pinctrl_usart0: usart0-0 { + atmel,pins = + <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ + AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ + }; + + pinctrl_usart0_rts: usart0_rts-0 { + atmel,pins = + <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ + }; + + pinctrl_usart0_cts: usart0_cts-0 { + atmel,pins = + <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ + }; + }; + + usart1 { + pinctrl_usart1: usart1-0 { + atmel,pins = + <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ + AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ + }; + + pinctrl_usart1_rts: usart1_rts-0 { + atmel,pins = + <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ + }; + + pinctrl_usart1_cts: usart1_cts-0 { + atmel,pins = + <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ + }; + }; + + usart2 { + pinctrl_usart2: usart2-0 { + atmel,pins = + <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ + AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ + }; + + pinctrl_usart2_rts: usart2_rts-0 { + atmel,pins = + <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ + }; + + pinctrl_usart2_cts: usart2_cts-0 { + atmel,pins = + <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ + }; + }; + + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/ + AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */ + }; + }; + + macb { + pinctrl_macb_rmii: macb_rmii-0 { + atmel,pins = + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ + AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ + AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ + AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ + AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ + AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ + AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ + AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ + AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ + AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ + }; + + pinctrl_macb_rmii_mii: macb_rmii_mii-0 { + atmel,pins = + <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ + AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ + AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ + AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ + AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ + AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ + AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ + AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ + }; + }; + + mmc0 { + pinctrl_mmc0_clk: mmc0_clk-0 { + atmel,pins = + <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ + }; + + pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { + atmel,pins = + <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ + AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ + }; + + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { + atmel,pins = + <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ + AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ + AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ + }; + + pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { + atmel,pins = + <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ + AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ + }; + + pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { + atmel,pins = + <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ + }; + }; + + mmc1 { + pinctrl_mmc1_clk: mmc1_clk-0 { + atmel,pins = + <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ + }; + + pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { + atmel,pins = + <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ + AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ + }; + + pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { + atmel,pins = + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ + }; + + pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { + atmel,pins = + <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ + AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ + }; + + pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { + atmel,pins = + <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ + AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ + AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ + }; + }; + + ssc0 { + pinctrl_ssc0_tx: ssc0_tx-0 { + atmel,pins = + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ + AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ + AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ + }; + + pinctrl_ssc0_rx: ssc0_rx-0 { + atmel,pins = + <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ + AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ + AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ + }; + }; + + ssc1 { + pinctrl_ssc1_tx: ssc1_tx-0 { + atmel,pins = + <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ + AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ + }; + + pinctrl_ssc1_rx: ssc1_rx-0 { + atmel,pins = + <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ + }; + }; + + spi0 { + pinctrl_spi0: spi0-0 { + atmel,pins = + <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ + AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ + AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ + }; + }; + + spi1 { + pinctrl_spi1: spi1-0 { + atmel,pins = + <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ + AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + fb { + pinctrl_fb: fb-0 { + atmel,pins = + <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ + AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ + AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ + AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ + AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ + AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ + AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ + AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ + AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ + AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ + AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ + AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ + AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ + AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ + AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ + AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ + AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ + AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ + AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ + AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ + AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ + AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ + }; + }; + + can { + pinctrl_can_rx_tx: can_rx_tx { + atmel,pins = + <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ + }; + }; + + ac97 { + pinctrl_ac97: ac97-0 { + atmel,pins = + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */ + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */ + }; + }; + + pioA: gpio@fffff200 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff200 0x200>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioA_clk>; + }; + + pioB: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x200>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioB_clk>; + }; + + pioC: gpio@fffff600 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x200>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioCDE_clk>; + }; + + pioD: gpio@fffff800 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x200>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioCDE_clk>; + }; + + pioE: gpio@fffffa00 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x200>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioCDE_clk>; + }; + }; + + dbgu: serial@ffffee00 { + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; + reg = <0xffffee00 0x200>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dbgu>; + clocks = <&mck>; + clock-names = "usart"; + status = "disabled"; + }; + + usart0: serial@fff8c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff8c000 0x200>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart0>; + clocks = <&usart0_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + usart1: serial@fff90000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff90000 0x200>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart1>; + clocks = <&usart1_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + usart2: serial@fff94000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff94000 0x200>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart2>; + clocks = <&usart2_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + ssc0: ssc@fff98000 { + compatible = "atmel,at91rm9200-ssc"; + reg = <0xfff98000 0x4000>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + clocks = <&ssc0_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + + ssc1: ssc@fff9c000 { + compatible = "atmel,at91rm9200-ssc"; + reg = <0xfff9c000 0x4000>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; + clocks = <&ssc1_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + + ac97: sound@fffa0000 { + compatible = "atmel,at91sam9263-ac97c"; + reg = <0xfffa0000 0x4000>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ac97>; + clocks = <&ac97_clk>; + clock-names = "ac97_clk"; + status = "disabled"; + }; + + macb0: ethernet@fffbc000 { + compatible = "cdns,at91sam9260-macb", "cdns,macb"; + reg = <0xfffbc000 0x100>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb_rmii>; + clocks = <&macb0_clk>, <&macb0_clk>; + clock-names = "hclk", "pclk"; + status = "disabled"; + }; + + usb1: gadget@fff78000 { + compatible = "atmel,at91sam9263-udc"; + reg = <0xfff78000 0x4000>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&udc_clk>, <&udpck>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; + + i2c0: i2c@fff88000 { + compatible = "atmel,at91sam9260-i2c"; + reg = <0xfff88000 0x100>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&twi0_clk>; + status = "disabled"; + }; + + mmc0: mmc@fff80000 { + compatible = "atmel,hsmci"; + reg = <0xfff80000 0x600>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mci0_clk>; + clock-names = "mci_clk"; + status = "disabled"; + }; + + mmc1: mmc@fff84000 { + compatible = "atmel,hsmci"; + reg = <0xfff84000 0x600>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mci1_clk>; + clock-names = "mci_clk"; + status = "disabled"; + }; + + watchdog@fffffd40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffd40 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&slow_xtal>; + atmel,watchdog-type = "hardware"; + atmel,reset-type = "all"; + atmel,dbg-halt; + status = "disabled"; + }; + + spi0: spi@fffa4000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91rm9200-spi"; + reg = <0xfffa4000 0x200>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0>; + clocks = <&spi0_clk>; + clock-names = "spi_clk"; + status = "disabled"; + }; + + spi1: spi@fffa8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91rm9200-spi"; + reg = <0xfffa8000 0x200>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1>; + clocks = <&spi1_clk>; + clock-names = "spi_clk"; + status = "disabled"; + }; + + pwm0: pwm@fffb8000 { + compatible = "atmel,at91sam9rl-pwm"; + reg = <0xfffb8000 0x300>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; + #pwm-cells = <3>; + clocks = <&pwm_clk>; + clock-names = "pwm_clk"; + status = "disabled"; + }; + + can: can@fffac000 { + compatible = "atmel,at91sam9263-can"; + reg = <0xfffac000 0x300>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_rx_tx>; + clocks = <&can_clk>; + clock-names = "can_clk"; + }; + + rtc@fffffd20 { + compatible = "atmel,at91sam9260-rtt"; + reg = <0xfffffd20 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&slow_xtal>; + status = "disabled"; + }; + + rtc@fffffd50 { + compatible = "atmel,at91sam9260-rtt"; + reg = <0xfffffd50 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&slow_xtal>; + status = "disabled"; + }; + + gpbr: syscon@fffffd60 { + compatible = "atmel,at91sam9260-gpbr", "syscon"; + reg = <0xfffffd60 0x50>; + status = "disabled"; + }; + }; + + fb0: fb@0x00700000 { + compatible = "atmel,at91sam9263-lcdc"; + reg = <0x00700000 0x1000>; + interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fb>; + clocks = <&lcd_clk>, <&lcd_clk>; + clock-names = "lcdc_clk", "hclk"; + status = "disabled"; + }; + + nand0: nand@40000000 { + compatible = "atmel,at91rm9200-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x40000000 0x10000000 + 0xffffe000 0x200 + >; + atmel,nand-addr-offset = <21>; + atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; + gpios = <&pioA 22 GPIO_ACTIVE_HIGH + &pioD 15 GPIO_ACTIVE_HIGH + 0 + >; + status = "disabled"; + }; + + usb0: ohci@00a00000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00a00000 0x100000>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; + clock-names = "ohci_clk", "hclk", "uhpck"; + status = "disabled"; + }; + }; + + i2c@0 { + compatible = "i2c-gpio"; + gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ + &pioB 5 GPIO_ACTIVE_HIGH /* scl */ + >; + i2c-gpio,sda-open-drain; + i2c-gpio,scl-open-drain; + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; +}; diff --git a/arch/arm/dts/at91sam9g20-taurus.dts b/arch/arm/dts/at91sam9g20-taurus.dts new file mode 100644 index 0000000000..f27d77279f --- /dev/null +++ b/arch/arm/dts/at91sam9g20-taurus.dts @@ -0,0 +1,119 @@ +/* + * at91sam9g20-taurus.dts + * (C) Copyright 2016 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board + * + * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Licensed under GPLv2. + */ +/dts-v1/; +#include "at91sam9g20.dtsi" + +/ { + model = "Siemens taurus"; + compatible = "atmel,at91sam9g20ek", "atmel,at91sam9g20", "atmel,at91sam9"; + + chosen { + stdout-path = &dbgu; + }; + + memory { + reg = <0x20000000 0x4000000>; + }; + + clocks { + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <18432000>; + }; + }; + + ahb { + apb { + pinctrl@fffff400 { + board { + pinctrl_pck0_as_mck: pck0_as_mck { + atmel,pins = + <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */ + }; + + }; + }; + + dbgu: serial@fffff200 { + status = "okay"; + }; + + usart0: serial@fffb0000 { + pinctrl-0 = + <&pinctrl_usart0 + &pinctrl_usart0_rts + &pinctrl_usart0_cts + &pinctrl_usart0_dtr_dsr + &pinctrl_usart0_dcd + &pinctrl_usart0_ri>; + status = "okay"; + }; + + usart1: serial@fffb4000 { + status = "okay"; + }; + + macb0: ethernet@fffc4000 { + phy-mode = "rmii"; + status = "okay"; + }; + + usb1: gadget@fffa4000 { + atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + ssc0: ssc@fffbc000 { + status = "okay"; + pinctrl-0 = <&pinctrl_ssc0_tx>; + }; + + spi0: spi@fffc8000 { + cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; + mtd_dataflash@0 { + compatible = "atmel,at45", "atmel,dataflash"; + spi-max-frequency = <50000000>; + reg = <1>; + }; + }; + + rtc@fffffd20 { + atmel,rtt-rtc-time-reg = <&gpbr 0x0>; + status = "okay"; + }; + + watchdog@fffffd40 { + status = "okay"; + }; + + gpbr: syscon@fffffd50 { + status = "okay"; + }; + }; + + nand0: nand@40000000 { + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + status = "okay"; + }; + + usb0: ohci@00500000 { + num-ports = <2>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm/dts/at91sam9g20.dtsi b/arch/arm/dts/at91sam9g20.dtsi new file mode 100644 index 0000000000..f593016181 --- /dev/null +++ b/arch/arm/dts/at91sam9g20.dtsi @@ -0,0 +1,68 @@ +/* + * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC + * + * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Licensed under GPLv2. + */ + +#include "at91sam9260.dtsi" + +/ { + model = "Atmel AT91SAM9G20 family SoC"; + compatible = "atmel,at91sam9g20"; + + memory { + reg = <0x20000000 0x08000000>; + }; + + sram0: sram@002ff000 { + status = "disabled"; + }; + + sram1: sram@002fc000 { + compatible = "mmio-sram"; + reg = <0x002fc000 0x8000>; + }; + + ahb { + apb { + i2c0: i2c@fffac000 { + compatible = "atmel,at91sam9g20-i2c"; + }; + + ssc0: ssc@fffbc000 { + compatible = "atmel,at91sam9rl-ssc"; + }; + + adc0: adc@fffe0000 { + atmel,adc-startup-time = <40>; + }; + + pmc: pmc@fffffc00 { + plla: pllack { + atmel,clk-input-range = <2000000 32000000>; + atmel,pll-clk-output-ranges = <745000000 800000000 0 0>, + <695000000 750000000 1 0>, + <645000000 700000000 2 0>, + <595000000 650000000 3 0>, + <545000000 600000000 0 1>, + <495000000 550000000 1 1>, + <445000000 500000000 2 1>, + <400000000 450000000 3 1>; + }; + + pllb: pllbck { + compatible = "atmel,at91sam9g20-clk-pllb"; + atmel,clk-input-range = <2000000 32000000>; + atmel,pll-clk-output-ranges = <30000000 100000000 0 0>; + }; + + mck: masterck { + atmel,clk-output-range = <0 133000000>; + atmel,clk-divisors = <1 2 4 6>; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/at91sam9g45-corvus.dts b/arch/arm/dts/at91sam9g45-corvus.dts new file mode 100644 index 0000000000..c207c02858 --- /dev/null +++ b/arch/arm/dts/at91sam9g45-corvus.dts @@ -0,0 +1,108 @@ +/* + * at91sam9g45-corvus.dts Device Tree file fir Siemens corvus board + * (C) Copyright 2016 Heiko Schocher <hs@denx.de> + * + * based on: + * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board + * + * Copyright (C) 2011 Atmel, + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "at91sam9g45.dtsi" + +/ { + model = "Siemens corvus"; + compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9"; + + chosen { + stdout-path = &dbgu; + }; + + memory { + reg = <0x70000000 0x8000000>; + }; + + clocks { + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <12000000>; + }; + }; + + ahb { + apb { + dbgu: serial@ffffee00 { + status = "okay"; + }; + + usart1: serial@fff90000 { + pinctrl-0 = + <&pinctrl_usart1 + &pinctrl_usart1_rts + &pinctrl_usart1_cts>; + status = "okay"; + }; + + macb0: ethernet@fffbc000 { + phy-mode = "rmii"; + status = "okay"; + }; + + watchdog@fffffd40 { + status = "okay"; + }; + + spi0: spi@fffa4000{ + status = "okay"; + cs-gpios = <&pioB 3 0>, <0>, <0>, <0>; + mtd_dataflash@0 { + compatible = "atmel,at45", "atmel,dataflash"; + spi-max-frequency = <13000000>; + reg = <0>; + }; + }; + + usb2: gadget@fff78000 { + atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + rtc@fffffd20 { + atmel,rtt-rtc-time-reg = <&gpbr 0x0>; + status = "okay"; + }; + + gpbr: syscon@fffffd60 { + status = "okay"; + }; + + rtc@fffffdb0 { + status = "okay"; + }; + }; + + nand0: nand@40000000 { + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + status = "okay"; + }; + + usb0: ohci@00700000 { + status = "okay"; + num-ports = <2>; + atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW + &pioD 3 GPIO_ACTIVE_LOW>; + }; + + usb1: ehci@00800000 { + status = "okay"; + }; + }; +}; diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi index 546a87a0a5..024527e815 100644 --- a/arch/arm/dts/fsl-ls1012a.dtsi +++ b/arch/arm/dts/fsl-ls1012a.dtsi @@ -9,18 +9,6 @@ / { compatible = "fsl,ls1012a"; interrupt-parent = <&gic>; - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x0>; - clocks = <&clockgen 1 0>; - }; - - }; sysclk: sysclk { compatible = "fixed-clock"; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index bf1dfe6db6..a8bffbafa7 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -15,38 +15,6 @@ / { compatible = "fsl,ls1043a"; interrupt-parent = <&gic>; - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x0>; - clocks = <&clockgen 1 0>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x1>; - clocks = <&clockgen 1 0>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x2>; - clocks = <&clockgen 1 0>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x3>; - clocks = <&clockgen 1 0>; - }; - }; sysclk: sysclk { compatible = "fixed-clock"; diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi index 68ed133853..b308c8b982 100644 --- a/arch/arm/dts/fsl-ls2080a.dtsi +++ b/arch/arm/dts/fsl-ls2080a.dtsi @@ -12,67 +12,6 @@ #address-cells = <2>; #size-cells = <2>; - cpus { - #address-cells = <2>; - #size-cells = <0>; - - /* - * We expect the enable-method for cpu's to be "psci", but this - * is dependent on the SoC FW, which will fill this in. - * - * Currently supported enable-method is psci v0.2 - */ - - /* We have 4 clusters having 2 Cortex-A57 cores each */ - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x1>; - }; - - cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x100>; - }; - - cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x101>; - }; - - cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x200>; - }; - - cpu@201 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x201>; - }; - - cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x300>; - }; - - cpu@301 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x301>; - }; - }; - memory@80000000 { device_type = "memory"; reg = <0x00000000 0x80000000 0 0x80000000>; diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi index 7d59112ddd..b0b2b57bb9 100644 --- a/arch/arm/dts/uniphier-common32.dtsi +++ b/arch/arm/dts/uniphier-common32.dtsi @@ -22,6 +22,7 @@ #size-cells = <1>; ranges; interrupt-parent = <&intc>; + u-boot,dm-pre-reloc; serial0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -65,9 +66,12 @@ system_bus: system-bus@58c00000 { compatible = "socionext,uniphier-system-bus"; + status = "disabled"; reg = <0x58c00000 0x400>; #address-cells = <2>; #size-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_system_bus>; }; smpctrl@59800000 { @@ -109,9 +113,15 @@ interrupt-controller; }; - pinctrl: pinctrl@5f801000 { - /* specify compatible in each SoC DTSI */ - reg = <0x5f801000 0xe00>; + soc-glue@5f800000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + u-boot,dm-pre-reloc; + + pinctrl: pinctrl { + /* specify compatible in each SoC DTSI */ + u-boot,dm-pre-reloc; + }; }; sysctrl: sysctrl@61840000 { @@ -124,8 +134,12 @@ nand: nand@68000000 { compatible = "denali,denali-nand-dt"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; + status = "disabled"; reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; }; }; }; diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts index b148e9fbd9..4eb7664a9e 100644 --- a/arch/arm/dts/uniphier-ph1-ld11-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts @@ -1,7 +1,8 @@ /* * Device Tree Source for UniPhier PH1-LD11 Reference Board * - * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ X11 */ @@ -62,20 +63,10 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial0 { u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-ld11.dtsi b/arch/arm/dts/uniphier-ph1-ld11.dtsi index e485f90a97..ffe04f5cb6 100644 --- a/arch/arm/dts/uniphier-ph1-ld11.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld11.dtsi @@ -1,11 +1,14 @@ /* * Device Tree Source for UniPhier PH1-LD11 SoC * - * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ X11 */ +/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */ + / { compatible = "socionext,ph1-ld11"; #address-cells = <2>; @@ -16,24 +19,41 @@ #address-cells = <2>; #size-cells = <0>; - cpu@0 { + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x000>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; - cpu@1 { + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x001>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; }; clocks { + refclk: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + uart_clk: uart_clk { #clock-cells = <0>; compatible = "fixed-clock"; @@ -60,6 +80,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0 0xffffffff>; + u-boot,dm-pre-reloc; serial0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -183,6 +204,8 @@ reg = <0x58c00000 0x400>; #address-cells = <2>; #size-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_system_bus>; }; smpctrl@59800000 { @@ -226,9 +249,20 @@ #clock-cells = <1>; }; - pinctrl: pinctrl@5f801000 { - compatible = "socionext,ph1-ld11-pinctrl", "syscon"; - reg = <0x5f801000 0xe00>; + soc-glue@5f800000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + u-boot,dm-pre-reloc; + + pinctrl: pinctrl { + compatible = "socionext,uniphier-ld11-pinctrl"; + u-boot,dm-pre-reloc; + }; + }; + + aidet@5fc20000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5fc20000 0x200>; }; gic: interrupt-controller@5fe00000 { diff --git a/arch/arm/dts/uniphier-ph1-ld20-ref.dts b/arch/arm/dts/uniphier-ph1-ld20-ref.dts index 3049016cc7..90c8705fff 100644 --- a/arch/arm/dts/uniphier-ph1-ld20-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld20-ref.dts @@ -51,20 +51,10 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial0 { u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi index f9cc3c4bdb..7497539467 100644 --- a/arch/arm/dts/uniphier-ph1-ld20.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi @@ -6,6 +6,8 @@ * SPDX-License-Identifier: GPL-2.0+ X11 */ +/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */ + / { compatible = "socionext,ph1-ld20"; #address-cells = <2>; @@ -41,7 +43,7 @@ compatible = "arm,cortex-a72", "arm,armv8"; reg = <0 0x000>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; cpu1: cpu@1 { @@ -49,7 +51,7 @@ compatible = "arm,cortex-a72", "arm,armv8"; reg = <0 0x001>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; cpu2: cpu@100 { @@ -57,7 +59,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x100>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; cpu3: cpu@101 { @@ -65,11 +67,17 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x101>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; }; clocks { + refclk: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + uart_clk: uart_clk { #clock-cells = <0>; compatible = "fixed-clock"; @@ -96,6 +104,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0 0xffffffff>; + u-boot,dm-pre-reloc; serial0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -219,6 +228,8 @@ reg = <0x58c00000 0x400>; #address-cells = <2>; #size-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_system_bus>; }; smpctrl@59800000 { @@ -243,9 +254,20 @@ bus-width = <4>; }; - pinctrl: pinctrl@5f801000 { - compatible = "socionext,ph1-ld20-pinctrl", "syscon"; - reg = <0x5f801000 0xe00>; + soc-glue@5f800000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + u-boot,dm-pre-reloc; + + pinctrl: pinctrl { + compatible = "socionext,uniphier-ld20-pinctrl"; + u-boot,dm-pre-reloc; + }; + }; + + aidet@5fc20000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5fc20000 0x200>; }; gic: interrupt-controller@5fe00000 { diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts index 6cae452d7d..36de7e3a0f 100644 --- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts @@ -69,20 +69,10 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial0 { u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index 5ae029ea97..07f315a2b7 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -274,6 +274,11 @@ pinctrl-0 = <&pinctrl_usb2>; clocks = <&mio 5>, <&mio 6>; }; + + aidet@61830000 { + compatible = "simple-mfd", "syscon"; + reg = <0x61830000 0x200>; + }; }; &refclk { @@ -310,7 +315,7 @@ }; &pinctrl { - compatible = "socionext,ph1-ld4-pinctrl", "syscon"; + compatible = "socionext,uniphier-ld4-pinctrl"; }; &sysctrl { diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts index e2a2a8c5ce..e29a6ea841 100644 --- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts @@ -71,20 +71,10 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial0 { u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-ld6b.dtsi b/arch/arm/dts/uniphier-ph1-ld6b.dtsi index cf02e62021..e8110eefce 100644 --- a/arch/arm/dts/uniphier-ph1-ld6b.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld6b.dtsi @@ -17,7 +17,7 @@ compatible = "socionext,ph1-ld6b"; }; -/* UART3 unavilable: the pads are not wired to the package balls */ +/* UART3 unavailable: the pads are not wired to the package balls */ &serial3 { status = "disabled"; }; @@ -27,5 +27,5 @@ * which makes the pinctrl driver unshareable. */ &pinctrl { - compatible = "socionext,ph1-ld6b-pinctrl", "syscon"; + compatible = "socionext,uniphier-ld6b-pinctrl"; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4-ace.dts b/arch/arm/dts/uniphier-ph1-pro4-ace.dts index 37e0853365..d8740cc9d3 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ace.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ace.dts @@ -90,20 +90,10 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial0 { u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index 5be76e2d66..4a2de08e06 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -80,20 +80,10 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial0 { u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts index 82e2bd02c7..965fe08e38 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts @@ -85,12 +85,6 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial0 { u-boot,dm-pre-reloc; }; @@ -103,10 +97,6 @@ u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index d5767b6252..e0b28b8291 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -400,6 +400,11 @@ clocks = <&mio 4>, <&mio 6>; }; + aidet@5fc20000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5fc20000 0x200>; + }; + usb0: usb@65a00000 { compatible = "socionext,uniphier-xhci", "generic-xhci"; status = "disabled"; @@ -452,7 +457,7 @@ }; &pinctrl { - compatible = "socionext,ph1-pro4-pinctrl", "syscon"; + compatible = "socionext,uniphier-pro4-pinctrl"; }; &sysctrl { diff --git a/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts b/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts index cbdc3ebbff..682b7958fa 100644 --- a/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts +++ b/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts @@ -56,20 +56,10 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial1 { u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart1 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi index bd1b4b1b66..05f961f588 100644 --- a/arch/arm/dts/uniphier-ph1-pro5.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi @@ -355,6 +355,11 @@ clock-frequency = <400000>; }; + aidet@5fc20000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5fc20000 0x200>; + }; + emmc: sdhc@68400000 { compatible = "socionext,uniphier-sdhc"; status = "disabled"; @@ -431,7 +436,7 @@ }; &pinctrl { - compatible = "socionext,ph1-pro5-pinctrl", "syscon"; + compatible = "socionext,uniphier-pro5-pinctrl"; }; &sysctrl { diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi index 789713db12..c3adaf170b 100644 --- a/arch/arm/dts/uniphier-ph1-sld3.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi @@ -349,6 +349,11 @@ clocks = <&mio 7>, <&mio 6>; }; + aidet@f1830000 { + compatible = "simple-mfd", "syscon"; + reg = <0xf1830000 0x200>; + }; + sysctrl: sysctrl@f1840000 { compatible = "socionext,ph1-sld3-sysctrl"; reg = <0xf1840000 0x4000>; diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts index 8ceb93e9f5..9af012cab7 100644 --- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts @@ -73,20 +73,10 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial0 { u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi index 61e0b45781..e0376a1e96 100644 --- a/arch/arm/dts/uniphier-ph1-sld8.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi @@ -274,6 +274,11 @@ pinctrl-0 = <&pinctrl_usb2>; clocks = <&mio 5>, <&mio 6>; }; + + aidet@61830000 { + compatible = "simple-mfd", "syscon"; + reg = <0x61830000 0x200>; + }; }; &refclk { @@ -310,7 +315,7 @@ }; &pinctrl { - compatible = "socionext,ph1-sld8-pinctrl", "syscon"; + compatible = "socionext,uniphier-sld8-pinctrl"; }; &sysctrl { diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index 2d36f98514..2810f3b3e1 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -47,6 +47,11 @@ function = "nand"; }; + pinctrl_nand2cs: nand2cs_grp { + groups = "nand", "nand_cs1"; + function = "nand"; + }; + pinctrl_sd: sd_grp { groups = "sd"; function = "sd"; @@ -67,6 +72,11 @@ function = "sd1"; }; + pinctrl_system_bus: system_bus_grp { + groups = "system_bus", "system_bus_cs1"; + function = "system_bus"; + }; + pinctrl_uart0: uart0_grp { groups = "uart0"; function = "uart0"; diff --git a/arch/arm/dts/uniphier-proxstream2-gentil.dts b/arch/arm/dts/uniphier-proxstream2-gentil.dts index eb1d2bcc63..61f61641af 100644 --- a/arch/arm/dts/uniphier-proxstream2-gentil.dts +++ b/arch/arm/dts/uniphier-proxstream2-gentil.dts @@ -65,12 +65,6 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial2 { u-boot,dm-pre-reloc; }; @@ -83,10 +77,6 @@ u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart2 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-proxstream2-vodka.dts b/arch/arm/dts/uniphier-proxstream2-vodka.dts index e7d5db8894..3d5b300716 100644 --- a/arch/arm/dts/uniphier-proxstream2-vodka.dts +++ b/arch/arm/dts/uniphier-proxstream2-vodka.dts @@ -50,12 +50,6 @@ }; /* for U-Boot only */ -/ { - soc { - u-boot,dm-pre-reloc; - }; -}; - &serial2 { u-boot,dm-pre-reloc; }; @@ -68,10 +62,6 @@ u-boot,dm-pre-reloc; }; -&pinctrl { - u-boot,dm-pre-reloc; -}; - &pinctrl_uart2 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi index 12968bdd17..23a6bfac87 100644 --- a/arch/arm/dts/uniphier-proxstream2.dtsi +++ b/arch/arm/dts/uniphier-proxstream2.dtsi @@ -383,6 +383,11 @@ bus-width = <4>; }; + aidet@5fc20000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5fc20000 0x200>; + }; + usb0: usb@65a00000 { compatible = "socionext,uniphier-xhci", "generic-xhci"; status = "disabled"; @@ -435,7 +440,7 @@ }; &pinctrl { - compatible = "socionext,proxstream2-pinctrl", "syscon"; + compatible = "socionext,uniphier-pxs2-pinctrl"; }; &sysctrl { diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi b/arch/arm/dts/uniphier-ref-daughter.dtsi index b8960fdc58..6d25104281 100644 --- a/arch/arm/dts/uniphier-ref-daughter.dtsi +++ b/arch/arm/dts/uniphier-ref-daughter.dtsi @@ -7,7 +7,7 @@ */ &i2c0 { - eeprom { + eeprom@50 { compatible = "microchip,24lc128", "i2c-eeprom"; reg = <0x50>; u-boot,i2c-offset-len = <2>; diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index caa45cfabf..bdcda7de93 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -70,7 +70,7 @@ u32 spl_boot_device(void) #if defined(CONFIG_SPL_MMC_SUPPORT) /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */ -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { switch (spl_boot_device()) { /* for MMC return either RAW or FAT mode */ diff --git a/arch/arm/include/asm/arch-bcm235xx/boot0.h b/arch/arm/include/asm/arch-bcm235xx/boot0.h new file mode 100644 index 0000000000..7e72882725 --- /dev/null +++ b/arch/arm/include/asm/arch-bcm235xx/boot0.h @@ -0,0 +1,15 @@ +/* + * Copyright 2016 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BOOT0_H +#define __BOOT0_H + +/* BOOT0 header information */ +#define ARM_SOC_BOOT0_HOOK \ + .word 0xbabeface; \ + .word _end - _start + +#endif /* __BOOT0_H */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index df877ddc7d..197b0eb5a5 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -8,13 +8,13 @@ #define _FSL_LAYERSCAPE_CPU_H static struct cpu_type cpu_type_list[] = { - CPU_TYPE_ENTRY(LS2080, LS2080, 8), - CPU_TYPE_ENTRY(LS2085, LS2085, 8), - CPU_TYPE_ENTRY(LS2045, LS2045, 4), - CPU_TYPE_ENTRY(LS1043, LS1043, 4), - CPU_TYPE_ENTRY(LS1023, LS1023, 2), - CPU_TYPE_ENTRY(LS2040, LS2040, 4), - CPU_TYPE_ENTRY(LS1012, LS1012, 1), + CPU_TYPE_ENTRY(LS2080A, LS2080A, 8), + CPU_TYPE_ENTRY(LS2085A, LS2085A, 8), + CPU_TYPE_ENTRY(LS2045A, LS2045A, 4), + CPU_TYPE_ENTRY(LS1043A, LS1043A, 4), + CPU_TYPE_ENTRY(LS1023A, LS1023A, 2), + CPU_TYPE_ENTRY(LS2040A, LS2040A, 4), + CPU_TYPE_ENTRY(LS1012A, LS1012A, 1), }; #ifndef CONFIG_SYS_DCACHE_OFF diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 2cb6c5430e..39e8c7a17c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -41,13 +41,13 @@ struct cpu_type { { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)} #define SVR_WO_E 0xFFFFFE -#define SVR_LS1012 0x870400 -#define SVR_LS1043 0x879200 -#define SVR_LS1023 0x879208 -#define SVR_LS2045 0x870120 -#define SVR_LS2080 0x870110 -#define SVR_LS2085 0x870100 -#define SVR_LS2040 0x870130 +#define SVR_LS1012A 0x870400 +#define SVR_LS1043A 0x879200 +#define SVR_LS1023A 0x879208 +#define SVR_LS2045A 0x870120 +#define SVR_LS2080A 0x870110 +#define SVR_LS2085A 0x870100 +#define SVR_LS2040A 0x870130 #define SVR_MAJ(svr) (((svr) >> 4) & 0xf) #define SVR_MIN(svr) (((svr) >> 0) & 0xf) diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index 7677358742..76b75d8e46 100644 --- a/arch/arm/lib/bootm-fdt.c +++ b/arch/arm/lib/bootm-fdt.c @@ -42,11 +42,14 @@ int arch_fixup_fdt(void *blob) } ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); -#ifdef CONFIG_ARMV7_NONSEC if (ret) return ret; +#ifdef CONFIG_ARMV7_NONSEC ret = psci_update_dt(blob); + if (ret) + return ret; #endif - return ret; + + return 0; } diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 6180699fed..13e19ba2fe 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -122,16 +122,28 @@ config TARGET_CORVUS bool "Support corvus" select CPU_ARM926EJS select SUPPORT_SPL + select DM + select DM_SERIAL + select DM_GPIO + select DM_ETH config TARGET_TAURUS bool "Support taurus" select CPU_ARM926EJS select SUPPORT_SPL + select DM + select DM_SERIAL + select DM_GPIO + select DM_ETH config TARGET_SMARTWEB bool "Support smartweb" select CPU_ARM926EJS select SUPPORT_SPL + select DM + select DM_SERIAL + select DM_GPIO + select DM_ETH config TARGET_VINCO bool "Support VINCO" diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h index 2379dd40f8..61e36c46fb 100644 --- a/arch/arm/mach-at91/include/mach/at91_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91_matrix.h @@ -15,7 +15,7 @@ #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x30) #elif defined(CONFIG_AT91SAM9263) #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x120) -#elif defined(CONFIG_AT91SAM9G45) +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x128) #else #error AT91_ASM_MATRIX_CSA0 is not definied for current CPU @@ -33,7 +33,7 @@ #elif defined(CONFIG_AT91SAM9263) #define AT91_MATRIX_MASTERS 9 #define AT91_MATRIX_SLAVES 7 -#elif defined(CONFIG_AT91SAM9G45) +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #define AT91_MATRIX_MASTERS 11 #define AT91_MATRIX_SLAVES 8 #else @@ -63,7 +63,7 @@ typedef struct at91_matrix { u32 reserve3[32 - (2 * AT91_MATRIX_SLAVES)]; u32 mrcr; /* 0x100 Master Remap Control */ u32 reserve4[3]; -#if defined(CONFIG_AT91SAM9G45) +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) u32 ccr[52]; /* 0x110 - 0x1E0 Chip Configuration */ u32 womr; /* 0x1E4 Write Protect Mode */ u32 wpsr; /* 0x1E8 Write Protect Status */ @@ -106,14 +106,14 @@ typedef struct at91_matrix { /* Undefined Length Burst Type */ #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \ - defined(CONFIG_AT91SAM9G45) + defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #define AT91_MATRIX_MCFG_ULBT_INFINITE 0x00000000 #define AT91_MATRIX_MCFG_ULBT_SINGLE 0x00000001 #define AT91_MATRIX_MCFG_ULBT_FOUR 0x00000002 #define AT91_MATRIX_MCFG_ULBT_EIGHT 0x00000003 #define AT91_MATRIX_MCFG_ULBT_SIXTEEN 0x00000004 #endif -#if defined(CONFIG_AT91SAM9G45) +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #define AT91_MATRIX_MCFG_ULBT_THIRTYTWO 0x00000005 #define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR 0x00000006 #define AT91_MATRIX_MCFG_ULBT_128 0x00000007 @@ -125,14 +125,15 @@ typedef struct at91_matrix { #define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED 0x00020000 /* Fixed Index of Default Master */ -#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) || \ + defined(CONFIG_AT91SAM9M10G45) #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18) #elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18) #endif /* Maximum Number of Allowed Cycles for a Burst */ -#if defined(CONFIG_AT91SAM9G45) +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0) #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ defined(CONFIG_AT91SAM9263) @@ -147,13 +148,14 @@ typedef struct at91_matrix { /* Master Remap Control Register */ #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \ - defined(CONFIG_AT91SAM9G45) + defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ #define AT91_MATRIX_MRCR_RCB0 (1 << 0) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ #define AT91_MATRIX_MRCR_RCB1 (1 << 1) #endif -#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) +#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) || \ + defined(CONFIG_AT91SAM9M10G45) #define AT91_MATRIX_MRCR_RCB2 0x00000004 #define AT91_MATRIX_MRCR_RCB3 0x00000008 #define AT91_MATRIX_MRCR_RCB4 0x00000010 @@ -162,14 +164,14 @@ typedef struct at91_matrix { #define AT91_MATRIX_MRCR_RCB7 0x00000080 #define AT91_MATRIX_MRCR_RCB8 0x00000100 #endif -#if defined(CONFIG_AT91SAM9G45) +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #define AT91_MATRIX_MRCR_RCB9 0x00000200 #define AT91_MATRIX_MRCR_RCB10 0x00000400 #define AT91_MATRIX_MRCR_RCB11 0x00000800 #endif /* TCM Configuration Register */ -#if defined(CONFIG_AT91SAM9G45) +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) /* Size of ITCM enabled memory block */ #define AT91_MATRIX_TCMR_ITCM_0 0x00000000 #define AT91_MATRIX_TCMR_ITCM_32 0x00000040 @@ -204,7 +206,7 @@ typedef struct at91_matrix { #define AT91_MATRIX_TCMR_DTCM_64 0x00000070 #endif -#if defined(CONFIG_AT91SAM9G45) +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) /* Video Mode Configuration Register */ #define AT91C_MATRIX_VDEC_SEL_OFF 0x00000000 #define AT91C_MATRIX_VDEC_SEL_ON 0x00000001 diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c index f255b59195..98f280cbf7 100644 --- a/arch/arm/mach-at91/spl.c +++ b/arch/arm/mach-at91/spl.c @@ -75,9 +75,9 @@ u32 spl_boot_device(void) } #endif -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { - switch (spl_boot_device()) { + switch (boot_device) { #ifdef CONFIG_SYS_USE_MMC case BOOT_DEVICE_MMC1: case BOOT_DEVICE_MMC2: diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c index 49349da179..0aeaa7d8b7 100644 --- a/arch/arm/mach-davinci/spl.c +++ b/arch/arm/mach-davinci/spl.c @@ -45,7 +45,7 @@ void spl_board_init(void) preloader_console_init(); } -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { return MMCSD_MODE_RAW; } diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index 77d3cfec59..af3be59097 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -26,6 +26,6 @@ config SYS_SOC config SYS_MALLOC_F_LEN default 0x1000 -source "board/hardkernel/odroid-c2/Kconfig" +source "board/amlogic/odroid-c2/Kconfig" endif diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index ac5bb2c209..e1c9cdba50 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -57,7 +57,7 @@ u32 spl_boot_device(void) } #ifdef CONFIG_SPL_MMC_SUPPORT -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { return MMCSD_MODE_RAW; } diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index e133cca57a..15f1266a7b 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -66,7 +66,7 @@ fallback: return BOOT_DEVICE_MMC1; } -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { return MMCSD_MODE_RAW; } diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c index 98c16a000d..fec4c7a991 100644 --- a/arch/arm/mach-socfpga/spl.c +++ b/arch/arm/mach-socfpga/spl.c @@ -58,7 +58,7 @@ u32 spl_boot_device(void) } #ifdef CONFIG_SPL_MMC_SUPPORT -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) return MMCSD_MODE_FS; diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index bd15b9bfb0..66e028ec14 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -257,7 +257,7 @@ void spl_board_announce_boot_device(void) } /* No confirmation data available in SPL yet. Hardcode bootmode */ -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { return MMCSD_MODE_RAW; } diff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S index e2bb1fcb44..cc34116baa 100644 --- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S @@ -29,7 +29,7 @@ ENTRY(lowlevel_init) bl debug_ll_init #endif - bl setup_init_ram @ RAM area for stack and page talbe + bl setup_init_ram @ RAM area for stack and page table /* * Now we are using the page table embedded in the Boot ROM. diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index f853701f44..d35d38dcbf 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -4,10 +4,47 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> +#include <libfdt.h> +#include <linux/io.h> + #include "init.h" #include "micro-support-card.h" #include "soc-info.h" +DECLARE_GLOBAL_DATA_PTR; + +static void uniphier_setup_xirq(void) +{ + const void *fdt = gd->fdt_blob; + int soc_node, aidet_node; + const u32 *val; + unsigned long aidet_base; + u32 tmp; + + soc_node = fdt_path_offset(fdt, "/soc"); + if (soc_node < 0) + return; + + aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5); + if (aidet_node < 0) + return; + + val = fdt_getprop(fdt, aidet_node, "reg", NULL); + if (!val) + return; + + aidet_base = fdt32_to_cpu(*val); + + tmp = readl(aidet_base + 8); /* AIDET DETCONFR2 */ + tmp |= 0x00ff0000; /* Set XIRQ0-7 low active */ + writel(tmp, aidet_base + 8); + + tmp = readl(0x55000090); /* IRQCTL */ + tmp |= 0x000000ff; + writel(tmp, 0x55000090); +} + int board_early_init_f(void) { led_puts("U0"); @@ -81,6 +118,8 @@ int board_early_init_f(void) break; } + uniphier_setup_xirq(); + led_puts("U2"); return 0; diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index d34b9af9a1..1d531402d5 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -77,7 +77,7 @@ u32 spl_boot_device(void) return mode; } -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { struct mmc *mmc; diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c index 6066b169cf..645b90151c 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c @@ -43,4 +43,9 @@ void uniphier_ld20_pin_init(void) sg_set_pinsel(53, 0, 8, 4); /* USB3OD -> USB3OD */ sg_set_iectrl_range(46, 53); #endif + + sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */ + sg_set_iectrl(149); + sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */ + sg_set_iectrl(153); } diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c index 6c5415ac8f..e8added155 100644 --- a/arch/arm/mach-zynq/spl.c +++ b/arch/arm/mach-zynq/spl.c @@ -69,7 +69,7 @@ u32 spl_boot_device(void) } #ifdef CONFIG_SPL_MMC_SUPPORT -u32 spl_boot_mode(void) +u32 spl_boot_mode(const u32 boot_device) { return MMCSD_MODE_FS; } diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile index b6e870a7cb..d663656bf9 100644 --- a/arch/x86/cpu/coreboot/Makefile +++ b/arch/x86/cpu/coreboot/Makefile @@ -18,4 +18,3 @@ obj-y += coreboot.o obj-y += tables.o obj-y += sdram.o obj-y += timestamp.o -obj-$(CONFIG_PCI) += pci.o diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c deleted file mode 100644 index 7f5087a918..0000000000 --- a/arch/x86/cpu/coreboot/pci.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2008,2009 - * Graeme Russ, <graeme.russ@gmail.com> - * - * (C) Copyright 2002 - * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <dm.h> -#include <pci.h> - -static const struct udevice_id generic_pch_ids[] = { - { .compatible = "intel,pch7" }, - { .compatible = "intel,pch9" }, - { } -}; - -U_BOOT_DRIVER(generic_pch_drv) = { - .name = "pch", - .id = UCLASS_PCH, - .of_match = generic_pch_ids, -}; diff --git a/board/BuR/kwb/Kconfig b/board/BuR/brppt1/Kconfig index 4beefbf771..e006c80e6e 100644 --- a/board/BuR/kwb/Kconfig +++ b/board/BuR/brppt1/Kconfig @@ -1,7 +1,7 @@ -if TARGET_KWB +if TARGET_BRPPT1 config SYS_BOARD - default "kwb" + default "brppt1" config SYS_VENDOR default "BuR" @@ -10,6 +10,6 @@ config SYS_SOC default "am33xx" config SYS_CONFIG_NAME - default "kwb" + default "brppt1" endif diff --git a/board/BuR/brppt1/MAINTAINERS b/board/BuR/brppt1/MAINTAINERS new file mode 100644 index 0000000000..9eddab4208 --- /dev/null +++ b/board/BuR/brppt1/MAINTAINERS @@ -0,0 +1,8 @@ +BRPPT1 BOARD +M: Hannes Schmelzer <hannes.schmelzer@br-automation.com> +S: Maintained +F: board/BuR/brppt1/ +F: include/configs/brppt1.h +F: configs/brppt1_mmc_defconfig +F: configs/brppt1_nand_defconfig +F: configs/brppt1_spi_defconfig diff --git a/board/BuR/tseries/Makefile b/board/BuR/brppt1/Makefile index 43945d285d..43945d285d 100644 --- a/board/BuR/tseries/Makefile +++ b/board/BuR/brppt1/Makefile diff --git a/board/BuR/tseries/board.c b/board/BuR/brppt1/board.c index bc119e6973..a22722122b 100644 --- a/board/BuR/tseries/board.c +++ b/board/BuR/brppt1/board.c @@ -1,7 +1,7 @@ /* * board.c * - * Board functions for B&R LEIT Board + * Board functions for B&R BRPPT1 * * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com diff --git a/board/BuR/tseries/mux.c b/board/BuR/brppt1/mux.c index 349788a835..ab3788fc6b 100644 --- a/board/BuR/tseries/mux.c +++ b/board/BuR/brppt1/mux.c @@ -1,7 +1,7 @@ /* * mux.c * - * Pinmux Setting for B&R LEIT Board(s) + * Pinmux Setting for B&R BRPPT1 Board(s) * * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com diff --git a/board/BuR/tseries/Kconfig b/board/BuR/brxre1/Kconfig index ed48300c0a..389e523f60 100644 --- a/board/BuR/tseries/Kconfig +++ b/board/BuR/brxre1/Kconfig @@ -1,7 +1,7 @@ -if TARGET_TSERIES +if TARGET_BRXRE1 config SYS_BOARD - default "tseries" + default "brxre1" config SYS_VENDOR default "BuR" @@ -10,6 +10,6 @@ config SYS_SOC default "am33xx" config SYS_CONFIG_NAME - default "tseries" + default "brxre1" endif diff --git a/board/BuR/brxre1/MAINTAINERS b/board/BuR/brxre1/MAINTAINERS new file mode 100644 index 0000000000..a10d9c1d71 --- /dev/null +++ b/board/BuR/brxre1/MAINTAINERS @@ -0,0 +1,6 @@ +BRXRE1 BOARD +M: Hannes Schmelzer <hannes.schmelzer@br-automation.com> +S: Maintained +F: board/BuR/brxre1/ +F: include/configs/brxre1.h +F: configs/brxre1_defconfig diff --git a/board/BuR/kwb/Makefile b/board/BuR/brxre1/Makefile index 782664c36e..782664c36e 100644 --- a/board/BuR/kwb/Makefile +++ b/board/BuR/brxre1/Makefile diff --git a/board/BuR/kwb/board.c b/board/BuR/brxre1/board.c index ad74ff299c..f4bfa410cc 100644 --- a/board/BuR/kwb/board.c +++ b/board/BuR/brxre1/board.c @@ -1,7 +1,7 @@ /* * board.c * - * Board functions for B&R KWB Board + * Board functions for B&R BRXRE1 Board * * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com @@ -101,7 +101,7 @@ void am33xx_spl_board_init(void) */ u32 *const clk_domains[] = { 0 }; - u32 *const clk_modules_kwbspecific[] = { + u32 *const clk_modules_xre1specific[] = { &cmwkup->wkup_adctscctrl, &cmper->spi1clkctrl, &cmper->dcan0clkctrl, @@ -113,7 +113,7 @@ void am33xx_spl_board_init(void) &cmper->lcdcclkstctrl, 0 }; - do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1); + do_enable_clocks(clk_domains, clk_modules_xre1specific, 1); /* setup LCD-Pixel Clock */ writel(0x2, CM_DPLL + 0x34); /* power-OFF LCD-Display */ diff --git a/board/BuR/kwb/mux.c b/board/BuR/brxre1/mux.c index 40224f76f6..40224f76f6 100644 --- a/board/BuR/kwb/mux.c +++ b/board/BuR/brxre1/mux.c diff --git a/board/BuR/kwb/MAINTAINERS b/board/BuR/kwb/MAINTAINERS deleted file mode 100644 index ca7d329144..0000000000 --- a/board/BuR/kwb/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -KWB BOARD -M: Hannes Schmelzer <hannes.schmelzer@br-automation.com> -S: Maintained -F: board/BuR/kwb/ -F: include/configs/kwb.h -F: configs/kwb_defconfig diff --git a/board/BuR/tseries/MAINTAINERS b/board/BuR/tseries/MAINTAINERS deleted file mode 100644 index e2e67e6bbf..0000000000 --- a/board/BuR/tseries/MAINTAINERS +++ /dev/null @@ -1,8 +0,0 @@ -TSERIES BOARD -M: Hannes Schmelzer <hannes.schmelzer@br-automation.com> -S: Maintained -F: board/BuR/tseries/ -F: include/configs/tseries.h -F: configs/tseries_mmc_defconfig -F: configs/tseries_nand_defconfig -F: configs/tseries_spi_defconfig diff --git a/board/hardkernel/odroid-c2/Kconfig b/board/amlogic/odroid-c2/Kconfig index 687d9c6d28..2b16889b07 100644 --- a/board/hardkernel/odroid-c2/Kconfig +++ b/board/amlogic/odroid-c2/Kconfig @@ -4,7 +4,7 @@ config SYS_BOARD default "odroid-c2" config SYS_VENDOR - default "hardkernel" + default "amlogic" config SYS_CONFIG_NAME default "odroid-c2" diff --git a/board/hardkernel/odroid-c2/MAINTAINERS b/board/amlogic/odroid-c2/MAINTAINERS index 23ae1e7cbc..699850fd0c 100644 --- a/board/hardkernel/odroid-c2/MAINTAINERS +++ b/board/amlogic/odroid-c2/MAINTAINERS @@ -1,6 +1,6 @@ ODROID-C2 M: Beniamino Galvani <b.galvani@gmail.com> S: Maintained -F: board/hardkernel/odroid-c2/ +F: board/amlogic/odroid-c2/ F: include/configs/odroid-c2.h F: configs/odroid-c2_defconfig diff --git a/board/hardkernel/odroid-c2/Makefile b/board/amlogic/odroid-c2/Makefile index 571044b66a..571044b66a 100644 --- a/board/hardkernel/odroid-c2/Makefile +++ b/board/amlogic/odroid-c2/Makefile diff --git a/board/hardkernel/odroid-c2/README b/board/amlogic/odroid-c2/README index d6d266a5ce..d6d266a5ce 100644 --- a/board/hardkernel/odroid-c2/README +++ b/board/amlogic/odroid-c2/README diff --git a/board/hardkernel/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c index bd72100e09..bd72100e09 100644 --- a/board/hardkernel/odroid-c2/odroid-c2.c +++ b/board/amlogic/odroid-c2/odroid-c2.c diff --git a/board/broadcom/bcm11130/MAINTAINERS b/board/broadcom/bcm11130/MAINTAINERS index b22e86f6b1..54783501e6 100644 --- a/board/broadcom/bcm11130/MAINTAINERS +++ b/board/broadcom/bcm11130/MAINTAINERS @@ -1,5 +1,5 @@ BCM11130 BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcm28155_ap/ F: include/configs/bcm_ep_board.h diff --git a/board/broadcom/bcm11130_nand/MAINTAINERS b/board/broadcom/bcm11130_nand/MAINTAINERS index 881db5bf78..4cf66b7e4a 100644 --- a/board/broadcom/bcm11130_nand/MAINTAINERS +++ b/board/broadcom/bcm11130_nand/MAINTAINERS @@ -1,5 +1,5 @@ BCM11130_NAND BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcm28155_ap/ F: include/configs/bcm_ep_board.h diff --git a/board/broadcom/bcm23550_w1d/MAINTAINERS b/board/broadcom/bcm23550_w1d/MAINTAINERS index fdaa5393e4..bde6337ce3 100644 --- a/board/broadcom/bcm23550_w1d/MAINTAINERS +++ b/board/broadcom/bcm23550_w1d/MAINTAINERS @@ -1,5 +1,5 @@ BCM23550_W1D BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcm23550_w1d/ F: include/configs/bcm23550_w1d.h diff --git a/board/broadcom/bcm28155_ap/MAINTAINERS b/board/broadcom/bcm28155_ap/MAINTAINERS index a74c3941b2..e1e99d0784 100644 --- a/board/broadcom/bcm28155_ap/MAINTAINERS +++ b/board/broadcom/bcm28155_ap/MAINTAINERS @@ -1,5 +1,5 @@ BCM28155_AP BOARD -M: Tim Kryger <tim.kryger@linaro.org> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcm28155_ap/ F: include/configs/bcm28155_ap.h diff --git a/board/broadcom/bcm28155_w1d/MAINTAINERS b/board/broadcom/bcm28155_w1d/MAINTAINERS index a436490555..c0558e7f25 100644 --- a/board/broadcom/bcm28155_w1d/MAINTAINERS +++ b/board/broadcom/bcm28155_w1d/MAINTAINERS @@ -1,5 +1,5 @@ BCM28155_W1D BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcm28155_ap/ F: include/configs/bcm28155_ap.h diff --git a/board/broadcom/bcm911360_entphn-ns/MAINTAINERS b/board/broadcom/bcm911360_entphn-ns/MAINTAINERS index b5f0207140..8b831d8cb7 100644 --- a/board/broadcom/bcm911360_entphn-ns/MAINTAINERS +++ b/board/broadcom/bcm911360_entphn-ns/MAINTAINERS @@ -1,5 +1,5 @@ BCM911360_ENTPHN-NS BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcmcygnus/ F: include/configs/bcm_ep_board.h diff --git a/board/broadcom/bcm911360_entphn/MAINTAINERS b/board/broadcom/bcm911360_entphn/MAINTAINERS index fb7ee2bbc6..d4f6aefe48 100644 --- a/board/broadcom/bcm911360_entphn/MAINTAINERS +++ b/board/broadcom/bcm911360_entphn/MAINTAINERS @@ -1,5 +1,5 @@ BCM911360_ENTPHN BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcmcygnus/ F: include/configs/bcm_ep_board.h diff --git a/board/broadcom/bcm911360k/MAINTAINERS b/board/broadcom/bcm911360k/MAINTAINERS index 754a15f0c7..32e60327cf 100644 --- a/board/broadcom/bcm911360k/MAINTAINERS +++ b/board/broadcom/bcm911360k/MAINTAINERS @@ -1,5 +1,5 @@ BCM911360K BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcmcygnus/ F: include/configs/bcm_ep_board.h diff --git a/board/broadcom/bcm958300k-ns/MAINTAINERS b/board/broadcom/bcm958300k-ns/MAINTAINERS index 763401a3f1..237d344629 100644 --- a/board/broadcom/bcm958300k-ns/MAINTAINERS +++ b/board/broadcom/bcm958300k-ns/MAINTAINERS @@ -1,5 +1,5 @@ BCM958300K-NS BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcmcygnus/ F: include/configs/bcm_ep_board.h diff --git a/board/broadcom/bcm958300k/MAINTAINERS b/board/broadcom/bcm958300k/MAINTAINERS index 8afc728a25..bbb6d64e1f 100644 --- a/board/broadcom/bcm958300k/MAINTAINERS +++ b/board/broadcom/bcm958300k/MAINTAINERS @@ -1,5 +1,5 @@ BCM958300K BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcmcygnus/ F: include/configs/bcm_ep_board.h diff --git a/board/broadcom/bcm958305k/MAINTAINERS b/board/broadcom/bcm958305k/MAINTAINERS index 179fd4ee9e..5ca0effc00 100644 --- a/board/broadcom/bcm958305k/MAINTAINERS +++ b/board/broadcom/bcm958305k/MAINTAINERS @@ -1,5 +1,5 @@ BCM958305K BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcmcygnus/ F: include/configs/bcm_ep_board.h diff --git a/board/broadcom/bcm958622hr/MAINTAINERS b/board/broadcom/bcm958622hr/MAINTAINERS index d08aded83f..de44dd1159 100644 --- a/board/broadcom/bcm958622hr/MAINTAINERS +++ b/board/broadcom/bcm958622hr/MAINTAINERS @@ -1,5 +1,5 @@ BCM958622HR BOARD -M: Steve Rae <srae@broadcom.com> +M: Steve Rae <steve.rae@raedomain.com> S: Maintained F: board/broadcom/bcmnsp/ F: include/configs/bcm_ep_board.h diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 7e47ef0d82..b7e9c21727 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -47,7 +47,7 @@ enum { int checkboard(void) { char buf[64]; -#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT) +#ifndef CONFIG_SD_BOOT u8 sw; #endif @@ -55,8 +55,6 @@ int checkboard(void) #ifdef CONFIG_SD_BOOT puts("SD\n"); -#elif defined(CONFIG_QSPI_BOOT) - puts("QSPI\n"); #else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -67,8 +65,8 @@ int checkboard(void) puts("PromJet\n"); else if (sw == 0x9) puts("NAND\n"); - else if (sw == 0x15) - printf("IFCCard\n"); + else if (sw == 0xF) + printf("QSPI\n"); else printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); #endif @@ -232,6 +230,10 @@ int board_early_init_f(void) #ifdef CONFIG_LPUART u8 uart; #endif + +#ifdef CONFIG_SYS_I2C_EARLY_INIT + i2c_early_init_f(); +#endif fsl_lsch2_early_init_f(); #ifdef CONFIG_HAS_FSL_XHCI_USB diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c index 9d5266151b..d4416e6468 100644 --- a/board/siemens/corvus/board.c +++ b/board/siemens/corvus/board.c @@ -11,21 +11,23 @@ * SPDX-License-Identifier: GPL-2.0+ */ - #include <common.h> +#include <dm.h> #include <asm/io.h> #include <asm/arch/at91sam9g45_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_rstc.h> +#include <asm/arch/atmel_serial.h> #include <asm/arch/gpio.h> +#include <asm/gpio.h> #include <asm/arch/clk.h> -#include <lcd.h> -#include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include <net.h> #endif +#ifndef CONFIG_DM_ETH #include <netdev.h> +#endif #include <spi.h> #ifdef CONFIG_USB_GADGET_ATMEL_USBA @@ -34,6 +36,24 @@ DECLARE_GLOBAL_DATA_PTR; +static void corvus_request_gpio(void) +{ + gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena"); + gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy"); + gpio_request(AT91_PIN_PD7, "d0"); + gpio_request(AT91_PIN_PD8, "d1"); + gpio_request(AT91_PIN_PA12, "d2"); + gpio_request(AT91_PIN_PA13, "d3"); + gpio_request(AT91_PIN_PA15, "d4"); + gpio_request(AT91_PIN_PB7, "recovery button"); + gpio_request(AT91_PIN_PD1, "USB0"); + gpio_request(AT91_PIN_PD3, "USB1"); + gpio_request(AT91_PIN_PB18, "SPICS1"); + gpio_request(AT91_PIN_PB3, "SPICS0"); + gpio_request(CONFIG_RED_LED, "red led"); + gpio_request(CONFIG_GREEN_LED, "green led"); +} + static void corvus_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; @@ -78,6 +98,7 @@ static void corvus_nand_hw_init(void) void spl_board_init(void) { + corvus_request_gpio(); /* * For on the sam9m10g45ek board, the chip wm9711 stay in the test * mode, so it need do some action to exit mode. @@ -200,6 +221,7 @@ static void corvus_macb_hw_init(void) int board_early_init_f(void) { at91_seriald_hw_init(); + corvus_request_gpio(); return 0; } @@ -220,6 +242,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + /* we have to request the gpios again after relocation */ + corvus_request_gpio(); #ifdef CONFIG_CMD_NAND corvus_nand_hw_init(); #endif @@ -249,6 +273,7 @@ int dram_init(void) return 0; } +#ifndef CONFIG_DM_ETH int board_eth_init(bd_t *bis) { int rc = 0; @@ -257,6 +282,7 @@ int board_eth_init(bd_t *bis) #endif return rc; } +#endif /* SPI chip select control */ int spi_cs_is_valid(unsigned int bus, unsigned int cs) @@ -289,3 +315,12 @@ void spi_cs_deactivate(struct spi_slave *slave) break; } } + +static struct atmel_serial_platdata at91sam9260_serial_plat = { + .base_addr = ATMEL_BASE_DBGU, +}; + +U_BOOT_DEVICE(at91sam9260_serial) = { + .name = "serial_atmel", + .platdata = &at91sam9260_serial_plat, +}; diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c index 47a60a72ac..78a7946836 100644 --- a/board/siemens/smartweb/smartweb.c +++ b/board/siemens/smartweb/smartweb.c @@ -17,23 +17,33 @@ */ #include <common.h> +#include <dm.h> #include <asm/io.h> #include <asm/arch/at91sam9_sdramc.h> #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> +#include <asm/arch/atmel_serial.h> #include <asm/arch/at91_spi.h> #include <spi.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> +#include <asm/gpio.h> #include <watchdog.h> -#ifdef CONFIG_MACB # include <net.h> +#ifndef CONFIG_DM_ETH # include <netdev.h> #endif DECLARE_GLOBAL_DATA_PTR; +static void smartweb_request_gpio(void) +{ + gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena"); + gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy"); + gpio_request(AT91_PIN_PA26, "ena PHY"); +} + static void smartweb_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; @@ -65,7 +75,6 @@ static void smartweb_nand_hw_init(void) at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); } -#ifdef CONFIG_MACB static void smartweb_macb_hw_init(void) { struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; @@ -108,7 +117,6 @@ static void smartweb_macb_hw_init(void) /* Initialize EMAC=MACB hardware */ at91_macb_hw_init(); } -#endif /* CONFIG_MACB */ #ifdef CONFIG_USB_GADGET_AT91 #include <linux/usb/at91_udc.h> @@ -133,11 +141,13 @@ int board_early_init_f(void) { /* enable this here, as we have SPL without serial support */ at91_seriald_hw_init(); + smartweb_request_gpio(); return 0; } int board_init(void) { + smartweb_request_gpio(); /* power LED red */ at91_set_gpio_output(AT91_PIN_PC6, 0); at91_set_gpio_output(AT91_PIN_PC7, 1); @@ -157,9 +167,7 @@ int board_init(void) gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; smartweb_nand_hw_init(); -#ifdef CONFIG_MACB smartweb_macb_hw_init(); -#endif return 0; } @@ -171,12 +179,14 @@ int dram_init(void) return 0; } +#ifndef CONFIG_DM_ETH #ifdef CONFIG_MACB int board_eth_init(bd_t *bis) { return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); } #endif /* CONFIG_MACB */ +#endif #if defined(CONFIG_SPL_BUILD) #include <spl.h> @@ -192,8 +202,9 @@ void matrix_init(void) &mat->scfg[3]); } -void spl_board_init(void) +void at91_spl_board_init(void) { + smartweb_request_gpio(); /* power LED orange */ at91_set_gpio_output(AT91_PIN_PC6, 1); at91_set_gpio_output(AT91_PIN_PC7, 1); @@ -245,3 +256,12 @@ void mem_init(void) sdramc_initialize(ATMEL_BASE_CS1, &setting); } #endif + +static struct atmel_serial_platdata at91sam9260_serial_plat = { + .base_addr = ATMEL_BASE_DBGU, +}; + +U_BOOT_DEVICE(at91sam9260_serial) = { + .name = "serial_atmel", + .platdata = &at91sam9260_serial_plat, +}; diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c index b0385d8a6e..8da24be568 100644 --- a/board/siemens/taurus/taurus.c +++ b/board/siemens/taurus/taurus.c @@ -14,6 +14,7 @@ #include <command.h> #include <common.h> +#include <dm.h> #include <asm/io.h> #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> @@ -21,17 +22,28 @@ #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/at91sam9_sdramc.h> +#include <asm/arch/atmel_serial.h> #include <asm/arch/clk.h> +#include <asm/gpio.h> #include <linux/mtd/nand.h> #include <atmel_mci.h> #include <asm/arch/at91_spi.h> #include <spi.h> #include <net.h> +#ifndef CONFIG_DM_ETH #include <netdev.h> +#endif DECLARE_GLOBAL_DATA_PTR; +static void taurus_request_gpio(void) +{ + gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena"); + gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy"); + gpio_request(AT91_PIN_PA25, "ena PHY"); +} + static void taurus_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; @@ -265,6 +277,7 @@ int board_early_init_f(void) at91_periph_clk_enable(ATMEL_ID_PIOC); at91_seriald_hw_init(); + taurus_request_gpio(); return 0; } @@ -308,6 +321,7 @@ int board_init(void) /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + taurus_request_gpio(); #ifdef CONFIG_CMD_NAND taurus_nand_hw_init(); #endif @@ -330,6 +344,7 @@ int dram_init(void) return 0; } +#ifndef CONFIG_DM_ETH int board_eth_init(bd_t *bis) { int rc = 0; @@ -338,6 +353,7 @@ int board_eth_init(bd_t *bis) #endif return rc; } +#endif #if !defined(CONFIG_SPL_BUILD) #if defined(CONFIG_BOARD_AXM) @@ -432,3 +448,12 @@ U_BOOT_CMD( ); #endif #endif + +static struct atmel_serial_platdata at91sam9260_serial_plat = { + .base_addr = ATMEL_BASE_DBGU, +}; + +U_BOOT_DEVICE(at91sam9260_serial) = { + .name = "serial_atmel", + .platdata = &at91sam9260_serial_plat, +}; diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig index 11ef3caf39..97374bdc12 100644 --- a/board/ti/am335x/Kconfig +++ b/board/ti/am335x/Kconfig @@ -29,15 +29,6 @@ config NOR In practice this is seen as a NOR flash module connected to the "memory cape" for the BeagleBone family. -config NOR_BOOT - bool "Support for booting from NOR flash" - depends on NOR - help - Enabling this will make a U-Boot binary that is capable of being - booted via NOR. In this case we will enable certain pinmux early - as the ROM only partially sets up pinmux. We also default to using - NOR for environment. - source "board/ti/common/Kconfig" endif diff --git a/board/ti/am43xx/MAINTAINERS b/board/ti/am43xx/MAINTAINERS index 3d40b171d2..83645acff4 100644 --- a/board/ti/am43xx/MAINTAINERS +++ b/board/ti/am43xx/MAINTAINERS @@ -4,6 +4,7 @@ S: Maintained F: board/ti/am43xx/ F: include/configs/am43xx_evm.h F: configs/am43xx_evm_defconfig -F: configs/am43xx_evm_qspiboot_defconfig F: configs/am43xx_evm_ethboot_defconfig +F: configs/am43xx_evm_qspiboot_defconfig F: configs/am43xx_evm_usbhost_boot_defconfig +F: configs/am43xx_hs_evm_defconfig diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 0394e4ee57..6a4d02769e 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -413,10 +413,14 @@ int board_late_init(void) #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG char *name = "unknown"; - if (is_dra72x()) - name = "dra72x"; - else + if (is_dra72x()) { + if (board_is_dra72x_revc_or_later()) + name = "dra72x-revc"; + else + name = "dra72x"; + } else { name = "dra7xx"; + } set_board_info_env(name); diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c index c8b10131f9..3d7438e527 100644 --- a/board/work-microwave/work_92105/work_92105_display.c +++ b/board/work-microwave/work_92105/work_92105_display.c @@ -311,8 +311,8 @@ U_BOOT_CMD( * only HUSH can understand them. */ -#if !defined(CONFIG_SYS_HUSH_PARSER) -#error CONFIG_CMD_HD44760 requires CONFIG_SYS_HUSH_PARSER +#if !defined(CONFIG_HUSH_PARSER) +#error CONFIG_CMD_HD44760 requires CONFIG_HUSH_PARSER #endif static int do_hd44780(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/Kconfig b/cmd/Kconfig index 42e0e39e75..d69b817c82 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -13,7 +13,6 @@ config CMDLINE config HUSH_PARSER bool "Use hush shell" - select SYS_HUSH_PARSER depends on CMDLINE help This option enables the "hush" shell (from Busybox) as command line @@ -24,11 +23,6 @@ config HUSH_PARSER If disabled, you get the old, much simpler behaviour with a somewhat smaller memory footprint. -config SYS_HUSH_PARSER - bool - help - Backward compatibility. - config SYS_PROMPT string "Shell prompt" default "=> " diff --git a/cmd/Makefile b/cmd/Makefile index 9ce7861f82..a1731be701 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -49,7 +49,7 @@ obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o obj-$(CONFIG_CMD_EEPROM) += eeprom.o obj-$(CONFIG_EFI_STUB) += efi.o obj-$(CONFIG_CMD_ELF) += elf.o -obj-$(CONFIG_SYS_HUSH_PARSER) += exit.o +obj-$(CONFIG_HUSH_PARSER) += exit.o obj-$(CONFIG_CMD_EXT4) += ext4.o obj-$(CONFIG_CMD_EXT2) += ext2.o obj-$(CONFIG_CMD_FAT) += fat.o @@ -123,7 +123,7 @@ obj-$(CONFIG_CMD_STRINGS) += strings.o obj-$(CONFIG_CMD_TERMINAL) += terminal.o obj-$(CONFIG_CMD_TIME) += time.o obj-$(CONFIG_CMD_TRACE) += trace.o -obj-$(CONFIG_SYS_HUSH_PARSER) += test.o +obj-$(CONFIG_HUSH_PARSER) += test.o obj-$(CONFIG_CMD_TPM) += tpm.o obj-$(CONFIG_CMD_TPM_TEST) += tpm_test.o obj-$(CONFIG_CMD_TSI148) += tsi148.o diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 216906527f..011f62c5b1 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -255,7 +255,7 @@ static char bootefi_help_text[] = U_BOOT_CMD( bootefi, 3, 0, do_bootefi, - "Boots an EFI payload from memory\n", + "Boots an EFI payload from memory", bootefi_help_text ); diff --git a/cmd/bootm.c b/cmd/bootm.c index f5e91f40a9..16fdea5507 100644 --- a/cmd/bootm.c +++ b/cmd/bootm.c @@ -275,6 +275,12 @@ static int image_info(ulong addr) puts("OK\n"); return 0; #endif +#if defined(CONFIG_ANDROID_BOOT_IMAGE) + case IMAGE_FORMAT_ANDROID: + puts(" Android image found\n"); + android_print_contents(hdr); + return 0; +#endif #if defined(CONFIG_FIT) case IMAGE_FORMAT_FIT: puts(" FIT image found\n"); diff --git a/common/Kconfig b/common/Kconfig index ada4ddbe2c..8adc821ae0 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -97,15 +97,78 @@ config BOOTSTAGE_STASH_SIZE endmenu +menu "Boot media" + +config NOR_BOOT + bool "Support for booting from NOR flash" + depends on NOR + help + Enabling this will make a U-Boot binary that is capable of being + booted via NOR. In this case we will enable certain pinmux early + as the ROM only partially sets up pinmux. We also default to using + NOR for environment. + +config NAND_BOOT + bool "Support for booting from NAND flash" + default n + help + Enabling this will make a U-Boot binary that is capable of being + booted via NAND flash. This is not a must, some SoCs need this, + somes not. + +config ONENAND_BOOT + bool "Support for booting from ONENAND" + default n + help + Enabling this will make a U-Boot binary that is capable of being + booted via ONENAND. This is not a must, some SoCs need this, + somes not. + +config QSPI_BOOT + bool "Support for booting from QSPI flash" + default n + help + Enabling this will make a U-Boot binary that is capable of being + booted via QSPI flash. This is not a must, some SoCs need this, + somes not. + +config SATA_BOOT + bool "Support for booting from SATA" + default n + help + Enabling this will make a U-Boot binary that is capable of being + booted via SATA. This is not a must, some SoCs need this, + somes not. + +config SD_BOOT + bool "Support for booting from SD/EMMC" + default n + help + Enabling this will make a U-Boot binary that is capable of being + booted via SD/EMMC. This is not a must, some SoCs need this, + somes not. + +config SPI_BOOT + bool "Support for booting from SPI flash" + default n + help + Enabling this will make a U-Boot binary that is capable of being + booted via SPI flash. This is not a must, some SoCs need this, + somes not. + +endmenu + config BOOTDELAY int "delay in seconds before automatically booting" default 2 depends on AUTOBOOT help Delay before automatically running bootcmd; + set to 0 to autoboot with no delay, but you can stop it by key input. set to -1 to disable autoboot. set to -2 to autoboot with no delay and not check for abort - (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined). + + See doc/README.autoboot for details. config CONSOLE_RECORD bool "Console recording" diff --git a/common/Makefile b/common/Makefile index 34cb8987eb..e08cd3e74d 100644 --- a/common/Makefile +++ b/common/Makefile @@ -11,10 +11,7 @@ obj-y += init/ obj-y += main.o obj-y += exports.o obj-y += hash.o -ifdef CONFIG_SYS_HUSH_PARSER -obj-y += cli_hush.o -endif - +obj-$(CONFIG_HUSH_PARSER) += cli_hush.o obj-$(CONFIG_AUTOBOOT) += autoboot.o # This option is not just y/n - it can have a numeric value diff --git a/common/autoboot.c b/common/autoboot.c index 223e062740..c52bad84a4 100644 --- a/common/autoboot.c +++ b/common/autoboot.c @@ -182,16 +182,11 @@ static int passwd_abort(uint64_t etime) * Watch for 'delay' seconds for autoboot stop or autoboot delay string. * returns: 0 - no key string, allow autoboot 1 - got key string, abort */ -static int abortboot_keyed(int bootdelay) +static int __abortboot(int bootdelay) { int abort; uint64_t etime = endtick(bootdelay); -#ifndef CONFIG_ZERO_BOOTDELAY_CHECK - if (bootdelay == 0) - return 0; -#endif - # ifdef CONFIG_AUTOBOOT_PROMPT /* * CONFIG_AUTOBOOT_PROMPT includes the %d for all boards. @@ -204,11 +199,6 @@ static int abortboot_keyed(int bootdelay) if (!abort) debug_bootkeys("key timeout\n"); -#ifdef CONFIG_SILENT_CONSOLE - if (abort) - gd->flags &= ~GD_FLG_SILENT; -#endif - return abort; } @@ -218,7 +208,7 @@ static int abortboot_keyed(int bootdelay) static int menukey; #endif -static int abortboot_normal(int bootdelay) +static int __abortboot(int bootdelay) { int abort = 0; unsigned long ts; @@ -226,23 +216,17 @@ static int abortboot_normal(int bootdelay) #ifdef CONFIG_MENUPROMPT printf(CONFIG_MENUPROMPT); #else - if (bootdelay >= 0) - printf("Hit any key to stop autoboot: %2d ", bootdelay); + printf("Hit any key to stop autoboot: %2d ", bootdelay); #endif -#if defined CONFIG_ZERO_BOOTDELAY_CHECK /* * Check if key already pressed - * Don't check if bootdelay < 0 */ - if (bootdelay >= 0) { - if (tstc()) { /* we got a key press */ - (void) getc(); /* consume input */ - puts("\b\b\b 0"); - abort = 1; /* don't auto boot */ - } + if (tstc()) { /* we got a key press */ + (void) getc(); /* consume input */ + puts("\b\b\b 0"); + abort = 1; /* don't auto boot */ } -#endif while ((bootdelay > 0) && (!abort)) { --bootdelay; @@ -267,22 +251,23 @@ static int abortboot_normal(int bootdelay) putc('\n'); -#ifdef CONFIG_SILENT_CONSOLE - if (abort) - gd->flags &= ~GD_FLG_SILENT; -#endif - return abort; } # endif /* CONFIG_AUTOBOOT_KEYED */ static int abortboot(int bootdelay) { -#ifdef CONFIG_AUTOBOOT_KEYED - return abortboot_keyed(bootdelay); -#else - return abortboot_normal(bootdelay); + int abort = 0; + + if (bootdelay >= 0) + abort = __abortboot(bootdelay); + +#ifdef CONFIG_SILENT_CONSOLE + if (abort) + gd->flags &= ~GD_FLG_SILENT; #endif + + return abort; } static void process_fdt_options(const void *blob) diff --git a/common/cli.c b/common/cli.c index 18d7e198a8..a433ef2166 100644 --- a/common/cli.c +++ b/common/cli.c @@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; */ int run_command(const char *cmd, int flag) { -#ifndef CONFIG_SYS_HUSH_PARSER +#ifndef CONFIG_HUSH_PARSER /* * cli_run_command can return 0 or 1 for success, so clean up * its result. @@ -55,7 +55,7 @@ int run_command(const char *cmd, int flag) */ int run_command_repeatable(const char *cmd, int flag) { -#ifndef CONFIG_SYS_HUSH_PARSER +#ifndef CONFIG_HUSH_PARSER return cli_simple_run_command(cmd, flag); #else /* @@ -79,7 +79,7 @@ int run_command_list(const char *cmd, int len, int flag) if (len == -1) { len = strlen(cmd); -#ifdef CONFIG_SYS_HUSH_PARSER +#ifdef CONFIG_HUSH_PARSER /* hush will never change our string */ need_buff = 0; #else @@ -94,7 +94,7 @@ int run_command_list(const char *cmd, int len, int flag) memcpy(buff, cmd, len); buff[len] = '\0'; } -#ifdef CONFIG_SYS_HUSH_PARSER +#ifdef CONFIG_HUSH_PARSER rcode = parse_string_outer(buff, FLAG_PARSE_SEMICOLON); #else /* @@ -214,7 +214,7 @@ err: void cli_loop(void) { -#ifdef CONFIG_SYS_HUSH_PARSER +#ifdef CONFIG_HUSH_PARSER parse_file_outer(); /* This point is never reached */ for (;;); @@ -222,12 +222,12 @@ void cli_loop(void) cli_simple_loop(); #else printf("## U-Boot command line is disabled. Please enable CONFIG_CMDLINE\n"); -#endif /*CONFIG_SYS_HUSH_PARSER*/ +#endif /*CONFIG_HUSH_PARSER*/ } void cli_init(void) { -#ifdef CONFIG_SYS_HUSH_PARSER +#ifdef CONFIG_HUSH_PARSER u_boot_hush_start(); #endif diff --git a/common/env_ext4.c b/common/env_ext4.c index ce748ed8c7..adefa7dc99 100644 --- a/common/env_ext4.c +++ b/common/env_ext4.c @@ -25,6 +25,7 @@ #include <environment.h> #include <linux/stddef.h> #include <malloc.h> +#include <memalign.h> #include <search.h> #include <errno.h> #include <ext4fs.h> @@ -49,7 +50,7 @@ int env_init(void) int saveenv(void) { env_t env_new; - block_dev_desc_t *dev_desc = NULL; + struct blk_desc *dev_desc = NULL; disk_partition_t info; int dev, part; int err; @@ -58,13 +59,13 @@ int saveenv(void) if (err) return err; - part = get_device_and_partition(EXT4_ENV_INTERFACE, + part = blk_get_device_part_str(EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART, &dev_desc, &info, 1); if (part < 0) return 1; - dev = dev_desc->dev; + dev = dev_desc->devnum; ext4fs_set_blk_dev(dev_desc, &info); if (!ext4fs_mount(info.size)) { @@ -90,18 +91,19 @@ int saveenv(void) void env_relocate_spec(void) { ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE); - block_dev_desc_t *dev_desc = NULL; + struct blk_desc *dev_desc = NULL; disk_partition_t info; int dev, part; int err; + loff_t off; - part = get_device_and_partition(EXT4_ENV_INTERFACE, + part = blk_get_device_part_str(EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART, &dev_desc, &info, 1); if (part < 0) goto err_env_relocate; - dev = dev_desc->dev; + dev = dev_desc->devnum; ext4fs_set_blk_dev(dev_desc, &info); if (!ext4fs_mount(info.size)) { @@ -110,7 +112,7 @@ void env_relocate_spec(void) goto err_env_relocate; } - err = ext4_read_file(EXT4_ENV_FILE, buf, 0, CONFIG_ENV_SIZE); + err = ext4_read_file(EXT4_ENV_FILE, buf, 0, CONFIG_ENV_SIZE, &off); ext4fs_close(); if (err == -1) { diff --git a/common/fb_mmc.c b/common/fb_mmc.c index e3abcc85be..c739651009 100644 --- a/common/fb_mmc.c +++ b/common/fb_mmc.c @@ -7,12 +7,10 @@ #include <config.h> #include <common.h> #include <blk.h> -#include <errno.h> #include <fastboot.h> #include <fb_mmc.h> #include <image-sparse.h> #include <part.h> -#include <sparse_format.h> #include <mmc.h> #include <div64.h> @@ -20,8 +18,6 @@ #define CONFIG_FASTBOOT_GPT_NAME GPT_ENTRY_NAME #endif -static char *response_str; - struct fb_mmc_sparse { struct blk_desc *dev_desc; }; @@ -48,22 +44,19 @@ static int part_get_info_efi_by_name_or_alias(struct blk_desc *dev_desc, return ret; } - -static int fb_mmc_sparse_write(struct sparse_storage *storage, - void *priv, - unsigned int offset, - unsigned int size, - char *data) +static lbaint_t fb_mmc_sparse_write(struct sparse_storage *info, + lbaint_t blk, lbaint_t blkcnt, const void *buffer) { - struct fb_mmc_sparse *sparse = priv; + struct fb_mmc_sparse *sparse = info->priv; struct blk_desc *dev_desc = sparse->dev_desc; - int ret; - ret = blk_dwrite(dev_desc, offset, size, data); - if (!ret) - return -EIO; + return blk_dwrite(dev_desc, blk, blkcnt, buffer); +} - return ret; +static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info, + lbaint_t blk, lbaint_t blkcnt) +{ + return blkcnt; } static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info, @@ -79,7 +72,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info, if (blkcnt > info->size) { error("too large for partition: '%s'\n", part_name); - fastboot_fail(response_str, "too large for partition"); + fastboot_fail("too large for partition"); return; } @@ -88,29 +81,25 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info, blks = blk_dwrite(dev_desc, info->start, blkcnt, buffer); if (blks != blkcnt) { error("failed writing to device %d\n", dev_desc->devnum); - fastboot_fail(response_str, "failed writing to device"); + fastboot_fail("failed writing to device"); return; } printf("........ wrote " LBAFU " bytes to '%s'\n", blkcnt * info->blksz, part_name); - fastboot_okay(response_str, ""); + fastboot_okay(""); } -void fb_mmc_flash_write(const char *cmd, unsigned int session_id, - void *download_buffer, unsigned int download_bytes, - char *response) +void fb_mmc_flash_write(const char *cmd, void *download_buffer, + unsigned int download_bytes) { struct blk_desc *dev_desc; disk_partition_t info; - /* initialize the response buffer */ - response_str = response; - dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { error("invalid mmc device\n"); - fastboot_fail(response_str, "invalid mmc device"); + fastboot_fail("invalid mmc device"); return; } @@ -120,50 +109,49 @@ void fb_mmc_flash_write(const char *cmd, unsigned int session_id, if (is_valid_gpt_buf(dev_desc, download_buffer)) { printf("%s: invalid GPT - refusing to write to flash\n", __func__); - fastboot_fail(response_str, "invalid GPT partition"); + fastboot_fail("invalid GPT partition"); return; } if (write_mbr_and_gpt_partitions(dev_desc, download_buffer)) { printf("%s: writing GPT partitions failed\n", __func__); - fastboot_fail(response_str, + fastboot_fail( "writing GPT partitions failed"); return; } printf("........ success\n"); - fastboot_okay(response_str, ""); + fastboot_okay(""); return; } else if (part_get_info_efi_by_name_or_alias(dev_desc, cmd, &info)) { error("cannot find partition: '%s'\n", cmd); - fastboot_fail(response_str, "cannot find partition"); + fastboot_fail("cannot find partition"); return; } if (is_sparse_image(download_buffer)) { struct fb_mmc_sparse sparse_priv; - sparse_storage_t sparse; + struct sparse_storage sparse; sparse_priv.dev_desc = dev_desc; - sparse.block_sz = info.blksz; + sparse.blksz = info.blksz; sparse.start = info.start; sparse.size = info.size; - sparse.name = cmd; sparse.write = fb_mmc_sparse_write; + sparse.reserve = fb_mmc_sparse_reserve; printf("Flashing sparse image at offset " LBAFU "\n", - info.start); + sparse.start); - store_sparse_image(&sparse, &sparse_priv, session_id, - download_buffer); + sparse.priv = &sparse_priv; + write_sparse_image(&sparse, cmd, download_buffer, + download_bytes); } else { write_raw_image(dev_desc, &info, cmd, download_buffer, download_bytes); } - - fastboot_okay(response_str, ""); } -void fb_mmc_erase(const char *cmd, char *response) +void fb_mmc_erase(const char *cmd) { int ret; struct blk_desc *dev_desc; @@ -173,24 +161,21 @@ void fb_mmc_erase(const char *cmd, char *response) if (mmc == NULL) { error("invalid mmc device"); - fastboot_fail(response_str, "invalid mmc device"); + fastboot_fail("invalid mmc device"); return; } - /* initialize the response buffer */ - response_str = response; - dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { error("invalid mmc device"); - fastboot_fail(response_str, "invalid mmc device"); + fastboot_fail("invalid mmc device"); return; } ret = part_get_info_efi_by_name_or_alias(dev_desc, cmd, &info); if (ret) { error("cannot find partition: '%s'", cmd); - fastboot_fail(response_str, "cannot find partition"); + fastboot_fail("cannot find partition"); return; } @@ -209,11 +194,11 @@ void fb_mmc_erase(const char *cmd, char *response) blks = dev_desc->block_erase(dev_desc, blks_start, blks_size); if (blks != blks_size) { error("failed erasing from device %d", dev_desc->devnum); - fastboot_fail(response_str, "failed erasing from device"); + fastboot_fail("failed erasing from device"); return; } printf("........ erased " LBAFU " bytes from '%s'\n", blks_size * info.blksz, cmd); - fastboot_okay(response_str, ""); + fastboot_okay(""); } diff --git a/common/fb_nand.c b/common/fb_nand.c index ae34f4891b..c8c79e9238 100644 --- a/common/fb_nand.c +++ b/common/fb_nand.c @@ -10,16 +10,13 @@ #include <fastboot.h> #include <image-sparse.h> -#include <sparse_format.h> #include <linux/mtd/mtd.h> #include <jffs2/jffs2.h> #include <nand.h> -static char *response_str; - struct fb_nand_sparse { - struct mtd_info *nand; + struct mtd_info *mtd; struct part_info *part; }; @@ -33,7 +30,7 @@ __weak int board_fastboot_write_partition_setup(char *name) return 0; } -static int fb_nand_lookup(const char *partname, char *response, +static int fb_nand_lookup(const char *partname, struct mtd_info **mtd, struct part_info **part) { @@ -44,21 +41,21 @@ static int fb_nand_lookup(const char *partname, char *response, ret = mtdparts_init(); if (ret) { error("Cannot initialize MTD partitions\n"); - fastboot_fail(response_str, "cannot init mtdparts"); + fastboot_fail("cannot init mtdparts"); return ret; } ret = find_dev_and_part(partname, &dev, &pnum, part); if (ret) { error("cannot find partition: '%s'", partname); - fastboot_fail(response_str, "cannot find partition"); + fastboot_fail("cannot find partition"); return ret; } if (dev->id->type != MTD_DEV_TYPE_NAND) { error("partition '%s' is not stored on a NAND device", partname); - fastboot_fail(response_str, "not a NAND device"); + fastboot_fail("not a NAND device"); return -EINVAL; } @@ -105,42 +102,60 @@ static int _fb_nand_write(struct mtd_info *mtd, struct part_info *part, buffer, flags); } -static int fb_nand_sparse_write(struct sparse_storage *storage, - void *priv, - unsigned int offset, - unsigned int size, - char *data) +static lbaint_t fb_nand_sparse_write(struct sparse_storage *info, + lbaint_t blk, lbaint_t blkcnt, const void *buffer) { - struct fb_nand_sparse *sparse = priv; + struct fb_nand_sparse *sparse = info->priv; size_t written; int ret; - ret = _fb_nand_write(sparse->nand, sparse->part, data, - offset * storage->block_sz, - size * storage->block_sz, &written); + ret = _fb_nand_write(sparse->mtd, sparse->part, (void *)buffer, + blk * info->blksz, + blkcnt * info->blksz, &written); if (ret < 0) { printf("Failed to write sparse chunk\n"); return ret; } - return written / storage->block_sz; +/* TODO - verify that the value "written" includes the "bad-blocks" ... */ + + /* + * the return value must be 'blkcnt' ("good-blocks") plus the + * number of "bad-blocks" encountered within this space... + */ + return written / info->blksz; +} + +static lbaint_t fb_nand_sparse_reserve(struct sparse_storage *info, + lbaint_t blk, lbaint_t blkcnt) +{ + int bad_blocks = 0; + +/* + * TODO - implement a function to determine the total number + * of blocks which must be used in order to reserve the specified + * number ("blkcnt") of "good-blocks", starting at "blk"... + * ( possibly something like the "check_skip_len()" function ) + */ + + /* + * the return value must be 'blkcnt' ("good-blocks") plus the + * number of "bad-blocks" encountered within this space... + */ + return blkcnt + bad_blocks; } -void fb_nand_flash_write(const char *partname, unsigned int session_id, - void *download_buffer, unsigned int download_bytes, - char *response) +void fb_nand_flash_write(const char *cmd, void *download_buffer, + unsigned int download_bytes) { struct part_info *part; struct mtd_info *mtd = NULL; int ret; - /* initialize the response buffer */ - response_str = response; - - ret = fb_nand_lookup(partname, response, &mtd, &part); + ret = fb_nand_lookup(cmd, &mtd, &part); if (ret) { error("invalid NAND device"); - fastboot_fail(response_str, "invalid NAND device"); + fastboot_fail("invalid NAND device"); return; } @@ -150,19 +165,23 @@ void fb_nand_flash_write(const char *partname, unsigned int session_id, if (is_sparse_image(download_buffer)) { struct fb_nand_sparse sparse_priv; - sparse_storage_t sparse; + struct sparse_storage sparse; - sparse_priv.nand = mtd; + sparse_priv.mtd = mtd; sparse_priv.part = part; - sparse.block_sz = mtd->writesize; - sparse.start = part->offset / sparse.block_sz; - sparse.size = part->size / sparse.block_sz; - sparse.name = part->name; + sparse.blksz = mtd->writesize; + sparse.start = part->offset / sparse.blksz; + sparse.size = part->size / sparse.blksz; sparse.write = fb_nand_sparse_write; + sparse.reserve = fb_nand_sparse_reserve; + + printf("Flashing sparse image at offset " LBAFU "\n", + sparse.start); - ret = store_sparse_image(&sparse, &sparse_priv, session_id, - download_buffer); + sparse.priv = &sparse_priv; + write_sparse_image(&sparse, cmd, download_buffer, + download_bytes); } else { printf("Flashing raw image at offset 0x%llx\n", part->offset); @@ -175,26 +194,23 @@ void fb_nand_flash_write(const char *partname, unsigned int session_id, } if (ret) { - fastboot_fail(response_str, "error writing the image"); + fastboot_fail("error writing the image"); return; } - fastboot_okay(response_str, ""); + fastboot_okay(""); } -void fb_nand_erase(const char *partname, char *response) +void fb_nand_erase(const char *cmd) { struct part_info *part; struct mtd_info *mtd = NULL; int ret; - /* initialize the response buffer */ - response_str = response; - - ret = fb_nand_lookup(partname, response, &mtd, &part); + ret = fb_nand_lookup(cmd, &mtd, &part); if (ret) { error("invalid NAND device"); - fastboot_fail(response_str, "invalid NAND device"); + fastboot_fail("invalid NAND device"); return; } @@ -205,9 +221,9 @@ void fb_nand_erase(const char *partname, char *response) ret = _fb_nand_erase(mtd, part); if (ret) { error("failed erasing from device %s", mtd->name); - fastboot_fail(response_str, "failed erasing from device"); + fastboot_fail("failed erasing from device"); return; } - fastboot_okay(response_str, ""); + fastboot_okay(""); } diff --git a/common/image-android.c b/common/image-android.c index b6a94b3a30..ee03b96aaa 100644 --- a/common/image-android.c +++ b/common/image-android.c @@ -145,3 +145,32 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr, *rd_len = hdr->ramdisk_size; return 0; } + +#if !defined(CONFIG_SPL_BUILD) +/** + * android_print_contents - prints out the contents of the Android format image + * @hdr: pointer to the Android format image header + * + * android_print_contents() formats a multi line Android image contents + * description. + * The routine prints out Android image properties + * + * returns: + * no returned results + */ +void android_print_contents(const struct andr_img_hdr *hdr) +{ + const char * const p = IMAGE_INDENT_STRING; + + printf("%skernel size: %x\n", p, hdr->kernel_size); + printf("%skernel address: %x\n", p, hdr->kernel_addr); + printf("%sramdisk size: %x\n", p, hdr->ramdisk_size); + printf("%sramdisk addrress: %x\n", p, hdr->ramdisk_addr); + printf("%ssecond size: %x\n", p, hdr->second_size); + printf("%ssecond address: %x\n", p, hdr->second_addr); + printf("%stags address: %x\n", p, hdr->tags_addr); + printf("%spage size: %x\n", p, hdr->page_size); + printf("%sname: %s\n", p, hdr->name); + printf("%scmdline: %s\n", p, hdr->cmdline); +} +#endif diff --git a/common/image-sparse.c b/common/image-sparse.c index 2bf737b46c..ddf5772cf8 100644 --- a/common/image-sparse.c +++ b/common/image-sparse.c @@ -36,56 +36,52 @@ #include <config.h> #include <common.h> -#include <div64.h> -#include <errno.h> #include <image-sparse.h> +#include <div64.h> #include <malloc.h> #include <part.h> #include <sparse_format.h> +#include <fastboot.h> #include <linux/math64.h> -typedef struct sparse_buffer { - void *data; - u32 length; - u32 repeat; - u16 type; -} sparse_buffer_t; - -static uint32_t last_offset; - -static unsigned int sparse_get_chunk_data_size(sparse_header_t *sparse, - chunk_header_t *chunk) -{ - return chunk->total_sz - sparse->chunk_hdr_sz; -} +#ifndef CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE +#define CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE (1024 * 512) +#endif -static unsigned int sparse_block_size_to_storage(unsigned int size, - sparse_storage_t *storage, - sparse_header_t *sparse) +void write_sparse_image( + struct sparse_storage *info, const char *part_name, + void *data, unsigned sz) { - return (unsigned int)lldiv((uint64_t)size * sparse->blk_sz, - storage->block_sz); -} + lbaint_t blk; + lbaint_t blkcnt; + lbaint_t blks; + uint32_t bytes_written = 0; + unsigned int chunk; + unsigned int offset; + unsigned int chunk_data_sz; + uint32_t *fill_buf = NULL; + uint32_t fill_val; + sparse_header_t *sparse_header; + chunk_header_t *chunk_header; + uint32_t total_blocks = 0; + int fill_buf_num_blks; + int i; + int j; -static bool sparse_chunk_has_buffer(chunk_header_t *chunk) -{ - switch (chunk->chunk_type) { - case CHUNK_TYPE_RAW: - case CHUNK_TYPE_FILL: - return true; + fill_buf_num_blks = CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE / info->blksz; - default: - return false; - } -} - -static sparse_header_t *sparse_parse_header(void **data) -{ /* Read and skip over sparse image header */ - sparse_header_t *sparse_header = (sparse_header_t *) *data; + sparse_header = (sparse_header_t *)data; - *data += sparse_header->file_hdr_sz; + data += sparse_header->file_hdr_sz; + if (sparse_header->file_hdr_sz > sizeof(sparse_header_t)) { + /* + * Skip the remaining bytes in a header that is longer than + * we expected. + */ + data += (sparse_header->file_hdr_sz - sizeof(sparse_header_t)); + } debug("=== Sparse Image Header ===\n"); debug("magic: 0x%x\n", sparse_header->magic); @@ -97,300 +93,172 @@ static sparse_header_t *sparse_parse_header(void **data) debug("total_blks: %d\n", sparse_header->total_blks); debug("total_chunks: %d\n", sparse_header->total_chunks); - return sparse_header; -} - -static int sparse_parse_fill_chunk(sparse_header_t *sparse, - chunk_header_t *chunk) -{ - unsigned int chunk_data_sz = sparse_get_chunk_data_size(sparse, chunk); - - if (chunk_data_sz != sizeof(uint32_t)) - return -EINVAL; - - return 0; -} - -static int sparse_parse_raw_chunk(sparse_header_t *sparse, - chunk_header_t *chunk) -{ - unsigned int chunk_data_sz = sparse_get_chunk_data_size(sparse, chunk); - - /* Check if the data size is a multiple of the main block size */ - if (chunk_data_sz % sparse->blk_sz) - return -EINVAL; - - /* Check that the chunk size is consistent */ - if ((chunk_data_sz / sparse->blk_sz) != chunk->chunk_sz) - return -EINVAL; - - return 0; -} - -static chunk_header_t *sparse_parse_chunk(sparse_header_t *sparse, - void **image) -{ - chunk_header_t *chunk = (chunk_header_t *) *image; - int ret; - - debug("=== Chunk Header ===\n"); - debug("chunk_type: 0x%x\n", chunk->chunk_type); - debug("chunk_data_sz: 0x%x\n", chunk->chunk_sz); - debug("total_size: 0x%x\n", chunk->total_sz); - - switch (chunk->chunk_type) { - case CHUNK_TYPE_RAW: - ret = sparse_parse_raw_chunk(sparse, chunk); - if (ret) - return NULL; - break; - - case CHUNK_TYPE_FILL: - ret = sparse_parse_fill_chunk(sparse, chunk); - if (ret) - return NULL; - break; - - case CHUNK_TYPE_DONT_CARE: - case CHUNK_TYPE_CRC32: - debug("Ignoring chunk\n"); - break; - - default: - printf("%s: Unknown chunk type: %x\n", __func__, - chunk->chunk_type); - return NULL; - } - - *image += sparse->chunk_hdr_sz; - - return chunk; -} - -static int sparse_get_fill_buffer(sparse_header_t *sparse, - chunk_header_t *chunk, - sparse_buffer_t *buffer, - unsigned int blk_sz, - void *data) -{ - int i; - - buffer->type = CHUNK_TYPE_FILL; - - /* - * We create a buffer of one block, and ask it to be - * repeated as many times as needed. - */ - buffer->length = blk_sz; - buffer->repeat = (chunk->chunk_sz * sparse->blk_sz) / blk_sz; - - buffer->data = memalign(ARCH_DMA_MINALIGN, - ROUNDUP(blk_sz, - ARCH_DMA_MINALIGN)); - if (!buffer->data) - return -ENOMEM; - - for (i = 0; i < (buffer->length / sizeof(uint32_t)); i++) - ((uint32_t *)buffer->data)[i] = *(uint32_t *)(data); - - return 0; -} - -static int sparse_get_raw_buffer(sparse_header_t *sparse, - chunk_header_t *chunk, - sparse_buffer_t *buffer, - unsigned int blk_sz, - void *data) -{ - unsigned int chunk_data_sz = sparse_get_chunk_data_size(sparse, chunk); - - buffer->type = CHUNK_TYPE_RAW; - buffer->length = chunk_data_sz; - buffer->data = data; - buffer->repeat = 1; - - return 0; -} - -static sparse_buffer_t *sparse_get_data_buffer(sparse_header_t *sparse, - chunk_header_t *chunk, - unsigned int blk_sz, - void **image) -{ - unsigned int chunk_data_sz = sparse_get_chunk_data_size(sparse, chunk); - sparse_buffer_t *buffer; - void *data = *image; - int ret; - - *image += chunk_data_sz; - - if (!sparse_chunk_has_buffer(chunk)) - return NULL; - - buffer = calloc(sizeof(sparse_buffer_t), 1); - if (!buffer) - return NULL; - - switch (chunk->chunk_type) { - case CHUNK_TYPE_RAW: - ret = sparse_get_raw_buffer(sparse, chunk, buffer, blk_sz, - data); - if (ret) - return NULL; - break; - - case CHUNK_TYPE_FILL: - ret = sparse_get_fill_buffer(sparse, chunk, buffer, blk_sz, - data); - if (ret) - return NULL; - break; - - default: - return NULL; - } - - debug("=== Buffer ===\n"); - debug("length: 0x%x\n", buffer->length); - debug("repeat: 0x%x\n", buffer->repeat); - debug("type: 0x%x\n", buffer->type); - debug("data: 0x%p\n", buffer->data); - - return buffer; -} - -static void sparse_put_data_buffer(sparse_buffer_t *buffer) -{ - if (buffer->type == CHUNK_TYPE_FILL) - free(buffer->data); - - free(buffer); -} - -int store_sparse_image(sparse_storage_t *storage, void *storage_priv, - unsigned int session_id, void *data) -{ - unsigned int chunk, offset; - sparse_header_t *sparse_header; - chunk_header_t *chunk_header; - sparse_buffer_t *buffer; - uint32_t start; - uint32_t total_blocks = 0; - int i; - - debug("=== Storage ===\n"); - debug("name: %s\n", storage->name); - debug("block_size: 0x%x\n", storage->block_sz); - debug("start: 0x%x\n", storage->start); - debug("size: 0x%x\n", storage->size); - debug("write: 0x%p\n", storage->write); - debug("priv: 0x%p\n", storage_priv); - - sparse_header = sparse_parse_header(&data); - if (!sparse_header) { - printf("sparse header issue\n"); - return -EINVAL; - } - /* * Verify that the sparse block size is a multiple of our * storage backend block size */ - div_u64_rem(sparse_header->blk_sz, storage->block_sz, &offset); + div_u64_rem(sparse_header->blk_sz, info->blksz, &offset); if (offset) { printf("%s: Sparse image block size issue [%u]\n", __func__, sparse_header->blk_sz); - return -EINVAL; + fastboot_fail("sparse image block size issue"); + return; } - /* - * If it's a new flashing session, start at the beginning of - * the partition. If not, then simply resume where we were. - */ - if (session_id > 0) - start = last_offset; - else - start = storage->start; - - printf("Flashing sparse image on partition %s at offset 0x%x (ID: %d)\n", - storage->name, start * storage->block_sz, session_id); + puts("Flashing Sparse Image\n"); /* Start processing chunks */ + blk = info->start; for (chunk = 0; chunk < sparse_header->total_chunks; chunk++) { - uint32_t blkcnt; - - chunk_header = sparse_parse_chunk(sparse_header, &data); - if (!chunk_header) { - printf("Unknown chunk type"); - return -EINVAL; + /* Read and skip over chunk header */ + chunk_header = (chunk_header_t *)data; + data += sizeof(chunk_header_t); + + if (chunk_header->chunk_type != CHUNK_TYPE_RAW) { + debug("=== Chunk Header ===\n"); + debug("chunk_type: 0x%x\n", chunk_header->chunk_type); + debug("chunk_data_sz: 0x%x\n", chunk_header->chunk_sz); + debug("total_size: 0x%x\n", chunk_header->total_sz); } - /* - * If we have a DONT_CARE type, just skip the blocks - * and go on parsing the rest of the chunks - */ - if (chunk_header->chunk_type == CHUNK_TYPE_DONT_CARE) { - blkcnt = sparse_block_size_to_storage(chunk_header->chunk_sz, - storage, - sparse_header); -#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV - total_blocks += blkcnt; -#endif - continue; + if (sparse_header->chunk_hdr_sz > sizeof(chunk_header_t)) { + /* + * Skip the remaining bytes in a header that is longer + * than we expected. + */ + data += (sparse_header->chunk_hdr_sz - + sizeof(chunk_header_t)); } - /* Retrieve the buffer we're going to write */ - buffer = sparse_get_data_buffer(sparse_header, chunk_header, - storage->block_sz, &data); - if (!buffer) - continue; - - blkcnt = (buffer->length / storage->block_sz) * buffer->repeat; + chunk_data_sz = sparse_header->blk_sz * chunk_header->chunk_sz; + blkcnt = chunk_data_sz / info->blksz; + switch (chunk_header->chunk_type) { + case CHUNK_TYPE_RAW: + if (chunk_header->total_sz != + (sparse_header->chunk_hdr_sz + chunk_data_sz)) { + fastboot_fail( + "Bogus chunk size for chunk type Raw"); + return; + } - if ((start + total_blocks + blkcnt) > - (storage->start + storage->size)) { - printf("%s: Request would exceed partition size!\n", - __func__); - return -EINVAL; - } + if (blk + blkcnt > info->start + info->size) { + printf( + "%s: Request would exceed partition size!\n", + __func__); + fastboot_fail( + "Request would exceed partition size!"); + return; + } - for (i = 0; i < buffer->repeat; i++) { - unsigned long buffer_blk_cnt; - int ret; + blks = info->write(info, blk, blkcnt, data); + /* blks might be > blkcnt (eg. NAND bad-blocks) */ + if (blks < blkcnt) { + printf("%s: %s" LBAFU " [" LBAFU "]\n", + __func__, "Write failed, block #", + blk, blks); + fastboot_fail( + "flash write failure"); + return; + } + blk += blks; + bytes_written += blkcnt * info->blksz; + total_blocks += chunk_header->chunk_sz; + data += chunk_data_sz; + break; + + case CHUNK_TYPE_FILL: + if (chunk_header->total_sz != + (sparse_header->chunk_hdr_sz + sizeof(uint32_t))) { + fastboot_fail( + "Bogus chunk size for chunk type FILL"); + return; + } - buffer_blk_cnt = buffer->length / storage->block_sz; + fill_buf = (uint32_t *) + memalign(ARCH_DMA_MINALIGN, + ROUNDUP( + info->blksz * fill_buf_num_blks, + ARCH_DMA_MINALIGN)); + if (!fill_buf) { + fastboot_fail( + "Malloc failed for: CHUNK_TYPE_FILL"); + return; + } - ret = storage->write(storage, storage_priv, - start + total_blocks, - buffer_blk_cnt, - buffer->data); - if (ret < 0) { - printf("%s: Write %d failed %d\n", - __func__, i, ret); - return ret; + fill_val = *(uint32_t *)data; + data = (char *)data + sizeof(uint32_t); + + for (i = 0; + i < (info->blksz * fill_buf_num_blks / + sizeof(fill_val)); + i++) + fill_buf[i] = fill_val; + + if (blk + blkcnt > info->start + info->size) { + printf( + "%s: Request would exceed partition size!\n", + __func__); + fastboot_fail( + "Request would exceed partition size!"); + return; } - total_blocks += ret; + for (i = 0; i < blkcnt;) { + j = blkcnt - i; + if (j > fill_buf_num_blks) + j = fill_buf_num_blks; + blks = info->write(info, blk, j, fill_buf); + /* blks might be > j (eg. NAND bad-blocks) */ + if (blks < j) { + printf("%s: %s " LBAFU " [%d]\n", + __func__, + "Write failed, block #", + blk, j); + fastboot_fail( + "flash write failure"); + free(fill_buf); + return; + } + blk += blks; + i += j; + } + bytes_written += blkcnt * info->blksz; + total_blocks += chunk_data_sz / sparse_header->blk_sz; + free(fill_buf); + break; + + case CHUNK_TYPE_DONT_CARE: + blk += info->reserve(info, blk, blkcnt); + total_blocks += chunk_header->chunk_sz; + break; + + case CHUNK_TYPE_CRC32: + if (chunk_header->total_sz != + sparse_header->chunk_hdr_sz) { + fastboot_fail( + "Bogus chunk size for chunk type Dont Care"); + return; + } + total_blocks += chunk_header->chunk_sz; + data += chunk_data_sz; + break; + + default: + printf("%s: Unknown chunk type: %x\n", __func__, + chunk_header->chunk_type); + fastboot_fail("Unknown chunk type"); + return; } - - sparse_put_data_buffer(buffer); } debug("Wrote %d blocks, expected to write %d blocks\n", - total_blocks, - sparse_block_size_to_storage(sparse_header->total_blks, - storage, sparse_header)); - printf("........ wrote %d blocks to '%s'\n", total_blocks, - storage->name); + total_blocks, sparse_header->total_blks); + printf("........ wrote %u bytes to '%s'\n", bytes_written, part_name); - if (total_blocks != - sparse_block_size_to_storage(sparse_header->total_blks, - storage, sparse_header)) { - printf("sparse image write failure\n"); - return -EIO; - } - - last_offset = start + total_blocks; + if (total_blocks != sparse_header->total_blks) + fastboot_fail("sparse image write failure"); + else + fastboot_okay(""); - return 0; + return; } diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index ef8583a1a6..c44f1b5dc8 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -286,7 +286,7 @@ int spl_mmc_load_image(u32 boot_device) return err; } - boot_mode = spl_boot_mode(); + boot_mode = spl_boot_mode(boot_device); err = -EINVAL; switch (boot_mode) { case MMCSD_MODE_EMMCBOOT: diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index d5aa3a29ce..2fe1a25c03 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT" +CONFIG_SPI_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set @@ -38,4 +39,3 @@ CONFIG_G_DNL_MANUFACTURER="Texas Instruments" CONFIG_G_DNL_VENDOR_NUM=0x0451 CONFIG_G_DNL_PRODUCT_NUM=0xd022 CONFIG_OF_LIBFDT=y -CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL" diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 5264332551..c6bc8e4fa6 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -3,6 +3,7 @@ CONFIG_AM43XX=y CONFIG_TARGET_AM43XX_EVM=y CONFIG_ISW_ENTRY_ADDR=0x30000000 CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,QSPI,QSPI_BOOT" +CONFIG_QSPI_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set @@ -41,4 +42,3 @@ CONFIG_G_DNL_MANUFACTURER="Texas Instruments" CONFIG_G_DNL_VENDOR_NUM=0x0403 CONFIG_G_DNL_PRODUCT_NUM=0xbd00 CONFIG_OF_LIBFDT=y -CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL" diff --git a/configs/am437x_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 4856a19f0b..4856a19f0b 100644 --- a/configs/am437x_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 0e0eadf684..d1f0c75875 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -1,8 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_TAURUS=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM" +CONFIG_HUSH_PARSER=y CONFIG_BOOTDELAY=3 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y @@ -16,7 +18,8 @@ CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_USE_TINY_PRINTF=y -CONFIG_OF_LIBFDT=y diff --git a/configs/bcm23550_w1d_defconfig b/configs/bcm23550_w1d_defconfig index 3328e516a1..0ef4a37e5c 100644 --- a/configs/bcm23550_w1d_defconfig +++ b/configs/bcm23550_w1d_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y CONFIG_TARGET_BCM23550_W1D=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -17,6 +18,7 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation" CONFIG_G_DNL_VENDOR_NUM=0x18d1 diff --git a/configs/tseries_mmc_defconfig b/configs/brppt1_mmc_defconfig index 337404bece..cf2800bf17 100644 --- a/configs/tseries_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y -CONFIG_TARGET_TSERIES=y +CONFIG_TARGET_BRPPT1=y CONFIG_SPL=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT" -CONFIG_BOOTDELAY=0 +CONFIG_BOOTDELAY=-2 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/tseries_nand_defconfig b/configs/brppt1_nand_defconfig index 4dc0296791..a14a130830 100644 --- a/configs/tseries_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y -CONFIG_TARGET_TSERIES=y +CONFIG_TARGET_BRPPT1=y CONFIG_SPL=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND" -CONFIG_BOOTDELAY=0 +CONFIG_BOOTDELAY=-2 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/tseries_spi_defconfig b/configs/brppt1_spi_defconfig index 5b52bf658f..fee9973187 100644 --- a/configs/tseries_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -1,9 +1,10 @@ CONFIG_ARM=y -CONFIG_TARGET_TSERIES=y +CONFIG_TARGET_BRPPT1=y CONFIG_SPL=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT" -CONFIG_BOOTDELAY=0 +CONFIG_SPI_BOOT=y +CONFIG_BOOTDELAY=-2 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/kwb_defconfig b/configs/brxre1_defconfig index 790292e738..2567a40205 100644 --- a/configs/kwb_defconfig +++ b/configs/brxre1_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y -CONFIG_TARGET_KWB=y +CONFIG_TARGET_BRXRE1=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" -CONFIG_BOOTDELAY=0 +CONFIG_BOOTDELAY=-2 CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig index 5257312bfd..c529c7c464 100644 --- a/configs/cairo_defconfig +++ b/configs/cairo_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_CAIRO=y CONFIG_SPL=y -CONFIG_BOOTDELAY=0 +CONFIG_BOOTDELAY=-2 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Cairo # " CONFIG_CMD_BOOTZ=y diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig index b6f14dbc6e..efb8ad6d31 100644 --- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig @@ -2,7 +2,7 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH,DEVELOP" -CONFIG_BOOTDELAY=0 +CONFIG_BOOTDELAY=-2 # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig index 2c45aff904..45e8b8fd32 100644 --- a/configs/controlcenterd_TRAILBLAZER_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_defconfig @@ -2,7 +2,7 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH" -CONFIG_BOOTDELAY=0 +CONFIG_BOOTDELAY=-2 # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 2efffb5985..51d1516457 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CORVUS=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -14,6 +15,8 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_USB=y CONFIG_CMD_DFU=y # CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y @@ -25,3 +28,8 @@ CONFIG_G_DNL_MANUFACTURER="Siemens AG" CONFIG_G_DNL_VENDOR_NUM=0x0908 CONFIG_G_DNL_PRODUCT_NUM=0x02d2 CONFIG_OF_LIBFDT=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index 80f0013bf4..d74757c85d 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -5,6 +5,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-gurnard" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45" CONFIG_BOOTDELAY=3 +CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 1aed0c45a8..1d8e28b1aa 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 86ddf719d4..bbfb118758 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 3806412919..b418d5cf9e 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index eca1cca113..b79fc58a90 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index a1504c3a15..284cc0734d 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index f8bdfe8ec4..b6f8d74751 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index a1ee5b95c4..e3abe364c4 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 0a6cbcd498..7e440b2bc6 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 2128c464cc..e735fa045d 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 8d1f8edef0..6cf4dbc237 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 61368878e7..3a95124ddc 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 2b2a71426d..cfc73106c5 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT" +CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index f90a6be38b..f4f464e366 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index d85f771628..0a077a3f43 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index c420548141..dcf5de20d3 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT,SYS_FSL_DDR4" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index a5a870b182..9fd06790dd 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SYS_FSL_DDR4" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 0850a68bfd..7826bbcb79 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -1,21 +1,19 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080AQDS=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT,LS2080A" +CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" -CONFIG_OF_CONTROL=y -CONFIG_OF_EMBED=y -CONFIG_DM=y -CONFIG_DM_SPI_FLASH=y -CONFIG_DM_SPI=y -CONFIG_FSL_QSPI=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -25,13 +23,15 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y -CONFIG_CMD_SF=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y +CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -CONFIG_OF_LIBFDT=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 483d4900b7..808bbc2b89 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MESON=y CONFIG_MESON_GXBB=y CONFIG_TARGET_ODROID_C2=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" +CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/omap3_evm_quick_mmc_defconfig b/configs/omap3_evm_quick_mmc_defconfig index 801c9596c0..ebdc105c8a 100644 --- a/configs/omap3_evm_quick_mmc_defconfig +++ b/configs/omap3_evm_quick_mmc_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_EVM_QUICK_MMC=y CONFIG_SPL=y -CONFIG_BOOTDELAY=0 +CONFIG_BOOTDELAY=-2 CONFIG_SYS_PROMPT="OMAP3_EVM # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/omap3_evm_quick_nand_defconfig b/configs/omap3_evm_quick_nand_defconfig index 8815fca536..52b08b88ee 100644 --- a/configs/omap3_evm_quick_nand_defconfig +++ b/configs/omap3_evm_quick_nand_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_EVM_QUICK_NAND=y CONFIG_SPL=y -CONFIG_BOOTDELAY=0 +CONFIG_BOOTDELAY=-2 CONFIG_SYS_PROMPT="OMAP3_EVM # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig index 847de635b5..dfedf82f57 100644 --- a/configs/s32v234evb_defconfig +++ b/configs/s32v234evb_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_S32V234EVB=y CONFIG_SYS_MALLOC_F=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/s32v234evb/s32v234evb.cfg" +CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_OF_LIBFDT=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 1c29a290c0..cf8bff6da0 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_SMARTWEB=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_SPL=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" @@ -16,13 +17,17 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" CONFIG_CMD_USB=y CONFIG_CMD_DFU=y # CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="Siemens AG" CONFIG_G_DNL_VENDOR_NUM=0x0908 CONFIG_G_DNL_PRODUCT_NUM=0x02d2 -CONFIG_OF_LIBFDT=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 7d43c7245e..658770b779 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -9,14 +9,13 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1" CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_FIT=y +CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y -# CONFIG_CMD_MEMTEST is not set # CONFIG_CMD_FLASH is not set -# CONFIG_CMD_MMC is not set CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_I2C=y @@ -36,7 +35,6 @@ CONFIG_SYS_I2C_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_USE_4K_SECTORS=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index e566f7f023..f4515158bc 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -1,8 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_TAURUS=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS" +CONFIG_HUSH_PARSER=y CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -19,6 +21,8 @@ CONFIG_CMD_DFU=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_USB=y @@ -28,4 +32,3 @@ CONFIG_G_DNL_MANUFACTURER="Siemens AG" CONFIG_G_DNL_VENDOR_NUM=0x0908 CONFIG_G_DNL_PRODUCT_NUM=0x02d2 CONFIG_USE_TINY_PRINTF=y -CONFIG_OF_LIBFDT=y diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index a69c0b63b1..ed6239b59d 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -7,6 +7,7 @@ CONFIG_ARCH_ATH79=y CONFIG_BOARD_TPLINK_WDR4300=y CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300" CONFIG_BOOTDELAY=3 +CONFIG_HUSH_PARSER=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set diff --git a/doc/README.autoboot b/doc/README.autoboot index 227e3b5dbb..30fd0b0e88 100644 --- a/doc/README.autoboot +++ b/doc/README.autoboot @@ -132,14 +132,6 @@ What they do provides an escape sequence from the limited "password" strings. - - CONFIG_ZERO_BOOTDELAY_CHECK - - If this option is defined, you can stop the autoboot process - by hitting a key even in that case when "bootdelay" has been - set to 0. You can set "bootdelay" to a negative value to - prevent the check for console input. - CONFIG_RESET_TO_RETRY (Only effective when CONFIG_BOOT_RETRY_TIME is also set) diff --git a/doc/mkimage.1 b/doc/mkimage.1 index 4b3a255255..ffa7d60156 100644 --- a/doc/mkimage.1 +++ b/doc/mkimage.1 @@ -152,6 +152,12 @@ verification. Typically the file here is the device tree binary used by CONFIG_OF_CONTROL in U-Boot. .TP +.BI "\-p [" "external position" "]" +Place external data at a static external position. See \-E. Instead of writing +a 'data-offset' property defining the offset from the end of the FIT, \-p will +use 'data-position' as the absolute position from the base of the FIT. + +.TP .BI "\-r Specifies that keys used to sign the FIT are required. This means that they must be verified for the image to boot. Without this option, the verification diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt index 3f5418045e..91aa89a77e 100644 --- a/doc/uImage.FIT/source_file_format.txt +++ b/doc/uImage.FIT/source_file_format.txt @@ -282,6 +282,9 @@ In this case the 'data' property is omitted. Instead you can use: aligned to a 4-byte boundary. - data-size : size of the data in bytes +The 'data-offset' property can be substituted with 'data-position', which +defines an absolute position or address as the offset. This is helpful when +booting U-Boot proper before performing relocation. 9) Examples ----------- diff --git a/drivers/clk/clk_sandbox.c b/drivers/clk/clk_sandbox.c index c6bd7c64e2..ef585037fc 100644 --- a/drivers/clk/clk_sandbox.c +++ b/drivers/clk/clk_sandbox.c @@ -19,7 +19,7 @@ static ulong sandbox_clk_get_rate(struct clk *clk) { struct sandbox_clk_priv *priv = dev_get_priv(clk->dev); - if (clk->id < 0 || clk->id >= SANDBOX_CLK_ID_COUNT) + if (clk->id >= SANDBOX_CLK_ID_COUNT) return -EINVAL; return priv->rate[clk->id]; @@ -30,7 +30,7 @@ static ulong sandbox_clk_set_rate(struct clk *clk, ulong rate) struct sandbox_clk_priv *priv = dev_get_priv(clk->dev); ulong old_rate; - if (clk->id < 0 || clk->id >= SANDBOX_CLK_ID_COUNT) + if (clk->id >= SANDBOX_CLK_ID_COUNT) return -EINVAL; if (!rate) @@ -46,7 +46,7 @@ static int sandbox_clk_enable(struct clk *clk) { struct sandbox_clk_priv *priv = dev_get_priv(clk->dev); - if (clk->id < 0 || clk->id >= SANDBOX_CLK_ID_COUNT) + if (clk->id >= SANDBOX_CLK_ID_COUNT) return -EINVAL; priv->enabled[clk->id] = true; @@ -58,7 +58,7 @@ static int sandbox_clk_disable(struct clk *clk) { struct sandbox_clk_priv *priv = dev_get_priv(clk->dev); - if (clk->id < 0 || clk->id >= SANDBOX_CLK_ID_COUNT) + if (clk->id >= SANDBOX_CLK_ID_COUNT) return -EINVAL; priv->enabled[clk->id] = false; diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 74a2663c8b..af6e04aa28 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -121,7 +121,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) if (host->fifo_mode && size) { if (data->flags == MMC_DATA_READ) { - if ((dwmci_readl(host, DWMCI_RINTSTS) && + if ((dwmci_readl(host, DWMCI_RINTSTS) & DWMCI_INTMSK_RXDR)) { len = dwmci_readl(host, DWMCI_STATUS); len = (len >> DWMCI_FIFO_SHIFT) & @@ -133,7 +133,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) DWMCI_INTMSK_RXDR); } } else { - if ((dwmci_readl(host, DWMCI_RINTSTS) && + if ((dwmci_readl(host, DWMCI_RINTSTS) & DWMCI_INTMSK_TXDR)) { len = dwmci_readl(host, DWMCI_STATUS); len = fifo_depth - ((len >> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index b7b4f14145..a865c7b47b 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -56,21 +56,27 @@ struct fsl_esdhc { uint fevt; /* Force event register */ uint admaes; /* ADMA error status register */ uint adsaddr; /* ADMA system address register */ - char reserved2[100]; /* reserved */ - uint vendorspec; /* Vendor Specific register */ - char reserved3[56]; /* reserved */ + char reserved2[4]; + uint dllctrl; + uint dllstat; + uint clktunectrlstatus; + char reserved3[84]; + uint vendorspec; + uint mmcboot; + uint vendorspec2; + char reserved4[48]; uint hostver; /* Host controller version register */ - char reserved4[4]; /* reserved */ - uint dmaerraddr; /* DMA error address register */ char reserved5[4]; /* reserved */ - uint dmaerrattr; /* DMA error attribute register */ + uint dmaerraddr; /* DMA error address register */ char reserved6[4]; /* reserved */ + uint dmaerrattr; /* DMA error attribute register */ + char reserved7[4]; /* reserved */ uint hostcapblt2; /* Host controller capabilities register 2 */ - char reserved7[8]; /* reserved */ + char reserved8[8]; /* reserved */ uint tcr; /* Tuning control register */ - char reserved8[28]; /* reserved */ + char reserved9[28]; /* reserved */ uint sddirctl; /* SD direction control register */ - char reserved9[712]; /* reserved */ + char reserved10[712];/* reserved */ uint scr; /* eSDHC control register */ }; @@ -85,7 +91,9 @@ struct fsl_esdhc { * Following is used when Driver Model is enabled for MMC * @dev: pointer for the device * @non_removable: 0: removable; 1: non-removable + * @wp_enable: 1: enable checking wp; 0: no check * @cd_gpio: gpio for card detection + * @wp_gpio: gpio for write protection */ struct fsl_esdhc_priv { struct fsl_esdhc *esdhc_regs; @@ -95,7 +103,9 @@ struct fsl_esdhc_priv { struct mmc *mmc; struct udevice *dev; int non_removable; + int wp_enable; struct gpio_desc cd_gpio; + struct gpio_desc wp_gpio; }; /* Return the XFERTYP flags for a given command and data packet */ @@ -239,9 +249,12 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) #endif if (wml_value > WML_WR_WML_MAX) wml_value = WML_WR_WML_MAX_VAL; - if ((esdhc_read32(®s->prsstat) & PRSSTAT_WPSPL) == 0) { - printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); - return TIMEOUT; + if (priv->wp_enable) { + if ((esdhc_read32(®s->prsstat) & + PRSSTAT_WPSPL) == 0) { + printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); + return TIMEOUT; + } } esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, @@ -532,7 +545,7 @@ static void set_sysctl(struct mmc *mmc, uint clock) clk = (pre_div << 8) | (div << 4); #ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->sysctl, SYSCTL_RSTA); + esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); #else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); #endif @@ -542,7 +555,7 @@ static void set_sysctl(struct mmc *mmc, uint clock) udelay(10000); #ifdef CONFIG_FSL_USDHC - esdhc_clrbits32(®s->sysctl, SYSCTL_RSTA); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN); #else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); #endif @@ -616,6 +629,20 @@ static int esdhc_init(struct mmc *mmc) while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout) udelay(1000); +#if defined(CONFIG_FSL_USDHC) + /* RSTA doesn't reset MMC_BOOT register, so manually reset it */ + esdhc_write32(®s->mmcboot, 0x0); + /* Reset MIX_CTRL and CLK_TUNE_CTRL_STATUS regs to 0 */ + esdhc_write32(®s->mixctrl, 0x0); + esdhc_write32(®s->clktunectrlstatus, 0x0); + + /* Put VEND_SPEC to default value */ + esdhc_write32(®s->vendorspec, VENDORSPEC_INIT); + + /* Disable DLL_CTRL delay line */ + esdhc_write32(®s->dllctrl, 0x0); +#endif + #ifndef ARCH_MXC /* Enable cache snooping */ esdhc_write32(®s->scr, 0x00000040); @@ -623,6 +650,8 @@ static int esdhc_init(struct mmc *mmc) #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); +#else + esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN | VENDORSPEC_IPGEN); #endif /* Set the initial clock speed */ @@ -699,6 +728,7 @@ static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, priv->esdhc_regs = (struct fsl_esdhc *)(unsigned long)(cfg->esdhc_base); priv->bus_width = cfg->max_bus_width; priv->sdhc_clk = cfg->sdhc_clk; + priv->wp_enable = cfg->wp_enable; return 0; }; @@ -720,6 +750,9 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv) #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); +#else + esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | + VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN); #endif writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten); @@ -938,6 +971,13 @@ static int fsl_esdhc_probe(struct udevice *dev) &priv->cd_gpio, GPIOD_IS_IN); } + priv->wp_enable = 1; + + ret = gpio_request_by_name_nodev(fdt, node, "wp-gpios", 0, + &priv->wp_gpio, GPIOD_IS_IN); + if (ret) + priv->wp_enable = 0; + /* * TODO: * Because lack of clk driver, if SDHC clk is not enabled, diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 5c71ab8d05..604f18dcc9 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -127,6 +127,7 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, #define CONFIG_SDHCI_CMD_MAX_TIMEOUT 3200 #endif #define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT 100 +#define SDHCI_READ_STATUS_TIMEOUT 1000 static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) @@ -243,9 +244,9 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, if (stat & SDHCI_INT_ERROR) break; } while (((stat & mask) != mask) && - (get_timer(start) < CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT)); + (get_timer(start) < SDHCI_READ_STATUS_TIMEOUT)); - if (get_timer(start) >= CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT) { + if (get_timer(start) >= SDHCI_READ_STATUS_TIMEOUT) { if (host->quirks & SDHCI_QUIRK_BROKEN_R1B) return 0; else { diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 74c563c495..689716753a 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -862,7 +862,6 @@ static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, */ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) { - int status; unsigned long timeo = 400; diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 1856ff0966..7febea2908 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -39,9 +39,15 @@ config PINCTRL_UNIPHIER_LD6B default y select PINCTRL_UNIPHIER +config PINCTRL_UNIPHIER_LD11 + bool "UniPhier PH1-LD11 SoC pinctrl driver" + depends on ARCH_UNIPHIER_LD11 + default y + select PINCTRL_UNIPHIER + config PINCTRL_UNIPHIER_LD20 - bool "UniPhier PH1-LD11/PH1-LD20 SoC pinctrl driver" - depends on ARCH_UNIPHIER_LD11 || ARCH_UNIPHIER_LD20 + bool "UniPhier PH1-LD20 SoC pinctrl driver" + depends on ARCH_UNIPHIER_LD20 default y select PINCTRL_UNIPHIER diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index bea4dd8630..4de251b810 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -10,4 +10,5 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o obj-$(CONFIG_PINCTRL_UNIPHIER_PRO5) += pinctrl-uniphier-pro5.o obj-$(CONFIG_PINCTRL_UNIPHIER_PXS2) += pinctrl-uniphier-pxs2.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD6B) += pinctrl-uniphier-ld6b.o +obj-$(CONFIG_PINCTRL_UNIPHIER_LD11) += pinctrl-uniphier-ld11.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD20) += pinctrl-uniphier-ld20.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index b8e26d90e2..225a05c56d 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -14,6 +14,8 @@ #include "pinctrl-uniphier.h" +static const char *uniphier_pinctrl_dummy_name = "_dummy"; + static int uniphier_pinctrl_get_groups_count(struct udevice *dev) { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); @@ -26,6 +28,9 @@ static const char *uniphier_pinctrl_get_group_name(struct udevice *dev, { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + if (!priv->socdata->groups[selector].name) + return uniphier_pinctrl_dummy_name; + return priv->socdata->groups[selector].name; } @@ -41,6 +46,9 @@ static const char *uniphier_pinmux_get_function_name(struct udevice *dev, { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + if (!priv->socdata->functions[selector]) + return uniphier_pinctrl_dummy_name; + return priv->socdata->functions[selector]; } @@ -91,7 +99,7 @@ static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin) } static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, - unsigned muxval) + int muxval) { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); unsigned mux_bits, reg_stride, reg, reg_end, shift, mask; @@ -101,6 +109,9 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, /* some pins need input-enabling */ uniphier_pinconf_input_enable(dev, pin); + if (muxval < 0) + return; /* dedicated pin; nothing to do for pin-mux */ + if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) { /* * Mode offset bit @@ -173,7 +184,7 @@ int uniphier_pinctrl_probe(struct udevice *dev, struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); fdt_addr_t addr; - addr = dev_get_addr(dev); + addr = dev_get_addr(dev->parent); if (addr == FDT_ADDR_T_NONE) return -EINVAL; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c new file mode 100644 index 0000000000..e95870f2c1 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c @@ -0,0 +1,107 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25}; +static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29}; +static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const unsigned ether_rmii_pins[] = {6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 16, 17}; +static const int ether_rmii_muxvals[] = {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4}; +static const unsigned i2c0_pins[] = {63, 64}; +static const int i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {65, 66}; +static const int i2c1_muxvals[] = {0, 0}; +static const unsigned i2c3_pins[] = {67, 68}; +static const int i2c3_muxvals[] = {1, 1}; +static const unsigned i2c4_pins[] = {61, 62}; +static const int i2c4_muxvals[] = {1, 1}; +static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned uart0_pins[] = {54, 55}; +static const int uart0_muxvals[] = {0, 0}; +static const unsigned uart1_pins[] = {58, 59}; +static const int uart1_muxvals[] = {1, 1}; +static const unsigned uart2_pins[] = {90, 91}; +static const int uart2_muxvals[] = {1, 1}; +static const unsigned uart3_pins[] = {94, 95}; +static const int uart3_muxvals[] = {1, 1}; +static const unsigned usb0_pins[] = {46, 47}; +static const int usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {48, 49}; +static const int usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {50, 51}; +static const int usb2_muxvals[] = {0, 0}; + +static const struct uniphier_pinctrl_group uniphier_ld11_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_rmii), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c4), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), +}; + +static const char * const uniphier_ld11_functions[] = { + UNIPHIER_PINMUX_FUNCTION(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(i2c4), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION_SPL(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), +}; + +static struct uniphier_pinctrl_socdata uniphier_ld11_pinctrl_socdata = { + .groups = uniphier_ld11_groups, + .groups_count = ARRAY_SIZE(uniphier_ld11_groups), + .functions = uniphier_ld11_functions, + .functions_count = ARRAY_SIZE(uniphier_ld11_functions), + .caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, +}; + +static int uniphier_ld11_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &uniphier_ld11_pinctrl_socdata); +} + +static const struct udevice_id uniphier_ld11_pinctrl_match[] = { + { .compatible = "socionext,uniphier-ld11-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(uniphier_ld11_pinctrl) = { + .name = "uniphier-ld11-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(uniphier_ld11_pinctrl_match), + .probe = uniphier_ld11_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +}; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c index fe154b7dd1..e9031966d0 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -10,78 +11,85 @@ #include "pinctrl-uniphier.h" static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25}; -static const unsigned emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; +static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29}; -static const unsigned emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const unsigned ether_rgmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 38, + 39, 40, 41, 42, 43, 44, 45}; +static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0}; +static const unsigned ether_rmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 39, + 41, 42, 45}; +static const int ether_rmii_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; static const unsigned i2c0_pins[] = {63, 64}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {65, 66}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c3_pins[] = {67, 68}; -static const unsigned i2c3_muxvals[] = {1, 1}; +static const int i2c3_muxvals[] = {1, 1}; static const unsigned i2c4_pins[] = {61, 62}; -static const unsigned i2c4_muxvals[] = {1, 1}; +static const int i2c4_muxvals[] = {1, 1}; static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}; -static const unsigned nand_muxvals[] = {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2}; -static const unsigned nand_cs1_pins[] = {}; -static const unsigned nand_cs1_muxvals[] = {}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17}; -static const unsigned sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */ +static const int sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */ static const unsigned uart0_pins[] = {54, 55}; -static const unsigned uart0_muxvals[] = {0, 0}; +static const int uart0_muxvals[] = {0, 0}; static const unsigned uart1_pins[] = {58, 59}; -static const unsigned uart1_muxvals[] = {1, 1}; +static const int uart1_muxvals[] = {1, 1}; static const unsigned uart2_pins[] = {90, 91}; -static const unsigned uart2_muxvals[] = {1, 1}; +static const int uart2_muxvals[] = {1, 1}; static const unsigned uart3_pins[] = {94, 95}; -static const unsigned uart3_muxvals[] = {1, 1}; +static const int uart3_muxvals[] = {1, 1}; static const unsigned usb0_pins[] = {46, 47}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {48, 49}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {50, 51}; -static const unsigned usb2_muxvals[] = {0, 0}; +static const int usb2_muxvals[] = {0, 0}; static const unsigned usb3_pins[] = {52, 53}; -static const unsigned usb3_muxvals[] = {0, 0}; +static const int usb3_muxvals[] = {0, 0}; static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { UNIPHIER_PINCTRL_GROUP(emmc), UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_rgmii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), UNIPHIER_PINCTRL_GROUP(i2c0), UNIPHIER_PINCTRL_GROUP(i2c1), UNIPHIER_PINCTRL_GROUP(i2c3), UNIPHIER_PINCTRL_GROUP(i2c4), UNIPHIER_PINCTRL_GROUP(nand), - UNIPHIER_PINCTRL_GROUP(nand_cs1), - UNIPHIER_PINCTRL_GROUP(sd), /* SD does not exist for LD11 */ - UNIPHIER_PINCTRL_GROUP(uart0), - UNIPHIER_PINCTRL_GROUP(uart1), - UNIPHIER_PINCTRL_GROUP(uart2), - UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart3), UNIPHIER_PINCTRL_GROUP(usb0), UNIPHIER_PINCTRL_GROUP(usb1), UNIPHIER_PINCTRL_GROUP(usb2), - UNIPHIER_PINCTRL_GROUP(usb3), /* USB3 does not exist for LD11 */ + UNIPHIER_PINCTRL_GROUP(usb3), }; static const char * const uniphier_ld20_functions[] = { - "emmc", - "i2c0", - "i2c1", - "i2c3", - "i2c4", - "nand", - "sd", /* SD does not exist for LD11 */ - "uart0", - "uart1", - "uart2", - "uart3", - "usb0", - "usb1", - "usb2", - "usb3", /* USB3 does not exist for LD11 */ + UNIPHIER_PINMUX_FUNCTION(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_rgmii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(i2c4), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION_SPL(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), }; static struct uniphier_pinctrl_socdata uniphier_ld20_pinctrl_socdata = { @@ -98,8 +106,7 @@ static int uniphier_ld20_pinctrl_probe(struct udevice *dev) } static const struct udevice_id uniphier_ld20_pinctrl_match[] = { - { .compatible = "socionext,ph1-ld11-pinctrl" }, - { .compatible = "socionext,ph1-ld20-pinctrl" }, + { .compatible = "socionext,uniphier-ld20-pinctrl" }, { /* sentinel */ } }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c index ca66dee957..dbb9499313 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c @@ -24,47 +24,56 @@ static const struct uniphier_pinctrl_pin uniphier_ld4_pins[] = { }; static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27}; -static const unsigned emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1}; +static const int emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31}; -static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const int emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const unsigned ether_mii_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40, + 41, 42, 43, 136, 137, 138, 139, 140, + 141, 142}; +static const int ether_mii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 4, 4, 4, 4, 4, 4, 4}; +static const unsigned ether_rmii_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40, + 41, 42, 43}; +static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned i2c0_pins[] = {102, 103}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {104, 105}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {108, 109}; -static const unsigned i2c2_muxvals[] = {2, 2}; +static const int i2c2_muxvals[] = {2, 2}; static const unsigned i2c3_pins[] = {108, 109}; -static const unsigned i2c3_muxvals[] = {3, 3}; +static const int i2c3_muxvals[] = {3, 3}; static const unsigned nand_pins[] = {24, 25, 26, 27, 28, 29, 30, 31, 158, 159, 160, 161, 162, 163, 164}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {22, 23}; -static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned uart0_pins[] = {85, 88}; -static const unsigned uart0_muxvals[] = {1, 1}; +static const int uart0_muxvals[] = {1, 1}; static const unsigned uart1_pins[] = {155, 156}; -static const unsigned uart1_muxvals[] = {13, 13}; +static const int uart1_muxvals[] = {13, 13}; static const unsigned uart1b_pins[] = {69, 70}; -static const unsigned uart1b_muxvals[] = {23, 23}; +static const int uart1b_muxvals[] = {23, 23}; static const unsigned uart2_pins[] = {128, 129}; -static const unsigned uart2_muxvals[] = {13, 13}; +static const int uart2_muxvals[] = {13, 13}; static const unsigned uart3_pins[] = {110, 111}; -static const unsigned uart3_muxvals[] = {1, 1}; +static const int uart3_muxvals[] = {1, 1}; static const unsigned usb0_pins[] = {53, 54}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {55, 56}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {155, 156}; -static const unsigned usb2_muxvals[] = {4, 4}; +static const int usb2_muxvals[] = {4, 4}; static const unsigned usb2b_pins[] = {67, 68}; -static const unsigned usb2b_muxvals[] = {23, 23}; +static const int usb2b_muxvals[] = {23, 23}; static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = { - UNIPHIER_PINCTRL_GROUP(emmc), - UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP_SPL(emmc), + UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_mii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), UNIPHIER_PINCTRL_GROUP(i2c0), UNIPHIER_PINCTRL_GROUP(i2c1), UNIPHIER_PINCTRL_GROUP(i2c2), @@ -72,11 +81,11 @@ static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), - UNIPHIER_PINCTRL_GROUP(uart0), - UNIPHIER_PINCTRL_GROUP(uart1), - UNIPHIER_PINCTRL_GROUP(uart1b), - UNIPHIER_PINCTRL_GROUP(uart2), - UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart1b), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart3), UNIPHIER_PINCTRL_GROUP(usb0), UNIPHIER_PINCTRL_GROUP(usb1), UNIPHIER_PINCTRL_GROUP(usb2), @@ -84,20 +93,22 @@ static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = { }; static const char * const uniphier_ld4_functions[] = { - "emmc", - "i2c0", - "i2c1", - "i2c2", - "i2c3", - "nand", - "sd", - "uart0", - "uart1", - "uart2", - "uart3", - "usb0", - "usb1", - "usb2", + UNIPHIER_PINMUX_FUNCTION_SPL(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_mii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c2), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION_SPL(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), }; static struct uniphier_pinctrl_socdata uniphier_ld4_pinctrl_socdata = { @@ -115,7 +126,7 @@ static int uniphier_ld4_pinctrl_probe(struct udevice *dev) } static const struct udevice_id uniphier_ld4_pinctrl_match[] = { - { .compatible = "socionext,ph1-ld4-pinctrl" }, + { .compatible = "socionext,uniphier-ld4-pinctrl" }, { /* sentinel */ } }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c index 0fd4dc421b..8b40801175 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c @@ -21,49 +21,58 @@ static const struct uniphier_pinctrl_pin uniphier_ld6b_pins[] = { }; static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; -static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; -static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const int emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const unsigned ether_rgmii_pins[] = {143, 144, 145, 146, 147, 148, 149, + 150, 151, 152, 153, 154, 155, 156, + 157, 158}; +static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0}; +static const unsigned ether_rmii_pins[] = {143, 144, 145, 146, 147, 148, 149, + 150, 152, 154, 155, 158}; +static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; static const unsigned i2c0_pins[] = {109, 110}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {111, 112}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {115, 116}; -static const unsigned i2c2_muxvals[] = {1, 1}; +static const int i2c2_muxvals[] = {1, 1}; static const unsigned i2c3_pins[] = {118, 119}; -static const unsigned i2c3_muxvals[] = {1, 1}; +static const int i2c3_muxvals[] = {1, 1}; static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41, 42, 43, 44, 45, 46}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {37, 38}; -static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned uart0_pins[] = {135, 136}; -static const unsigned uart0_muxvals[] = {3, 3}; +static const int uart0_muxvals[] = {3, 3}; static const unsigned uart0b_pins[] = {11, 12}; -static const unsigned uart0b_muxvals[] = {2, 2}; +static const int uart0b_muxvals[] = {2, 2}; static const unsigned uart1_pins[] = {115, 116}; -static const unsigned uart1_muxvals[] = {0, 0}; +static const int uart1_muxvals[] = {0, 0}; static const unsigned uart1b_pins[] = {113, 114}; -static const unsigned uart1b_muxvals[] = {1, 1}; +static const int uart1b_muxvals[] = {1, 1}; static const unsigned uart2_pins[] = {113, 114}; -static const unsigned uart2_muxvals[] = {2, 2}; +static const int uart2_muxvals[] = {2, 2}; static const unsigned uart2b_pins[] = {86, 87}; -static const unsigned uart2b_muxvals[] = {1, 1}; +static const int uart2b_muxvals[] = {1, 1}; static const unsigned usb0_pins[] = {56, 57}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {58, 59}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {60, 61}; -static const unsigned usb2_muxvals[] = {0, 0}; +static const int usb2_muxvals[] = {0, 0}; static const unsigned usb3_pins[] = {62, 63}; -static const unsigned usb3_muxvals[] = {0, 0}; +static const int usb3_muxvals[] = {0, 0}; static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = { - UNIPHIER_PINCTRL_GROUP(emmc), - UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP_SPL(emmc), + UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_rgmii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), UNIPHIER_PINCTRL_GROUP(i2c0), UNIPHIER_PINCTRL_GROUP(i2c1), UNIPHIER_PINCTRL_GROUP(i2c2), @@ -71,12 +80,12 @@ static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), - UNIPHIER_PINCTRL_GROUP(uart0), - UNIPHIER_PINCTRL_GROUP(uart0b), - UNIPHIER_PINCTRL_GROUP(uart1), - UNIPHIER_PINCTRL_GROUP(uart1b), - UNIPHIER_PINCTRL_GROUP(uart2), - UNIPHIER_PINCTRL_GROUP(uart2b), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart0b), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart1b), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart2b), UNIPHIER_PINCTRL_GROUP(usb0), UNIPHIER_PINCTRL_GROUP(usb1), UNIPHIER_PINCTRL_GROUP(usb2), @@ -84,20 +93,22 @@ static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = { }; static const char * const uniphier_ld6b_functions[] = { - "emmc", - "i2c0", - "i2c1", - "i2c2", - "i2c3", - "nand", - "sd", - "uart0", - "uart1", - "uart2", - "usb0", - "usb1", - "usb2", - "usb3", + UNIPHIER_PINMUX_FUNCTION_SPL(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_rgmii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c2), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), }; static struct uniphier_pinctrl_socdata uniphier_ld6b_pinctrl_socdata = { @@ -115,7 +126,7 @@ static int uniphier_ld6b_pinctrl_probe(struct udevice *dev) } static const struct udevice_id uniphier_ld6b_pinctrl_match[] = { - { .compatible = "socionext,ph1-ld6b-pinctrl" }, + { .compatible = "socionext,uniphier-ld6b-pinctrl" }, { /* sentinel */ } }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index 9ed7c74293..dace726b08 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c @@ -13,50 +13,69 @@ static const struct uniphier_pinctrl_pin uniphier_pro4_pins[] = { }; static const unsigned emmc_pins[] = {40, 41, 42, 43, 51, 52, 53}; -static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {44, 45, 46, 47}; -static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const int emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const unsigned ether_mii_pins[] = {160, 161, 162, 163, 164, 165, 166, + 167, 168, 169, 170, 171, 172, 173, + 174, 175, 176, 177, 178, 179}; +static const int ether_mii_muxvals[] = {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0}; +static const unsigned ether_rgmii_pins[] = {160, 161, 162, 163, 164, 165, 167, + 168, 169, 170, 171, 172, 176, 177, + 178, 179}; +static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0}; +static const unsigned ether_rmii_pins[] = {160, 161, 162, 165, 168, 169, 172, + 173, 176, 177, 178, 179}; +static const int ether_rmii_muxvals[] = {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned ether_rmiib_pins[] = {161, 162, 165, 167, 168, 169, 172, + 173, 176, 177, 178, 179}; +static const int ether_rmiib_muxvals[] = {0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned i2c0_pins[] = {142, 143}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {144, 145}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {146, 147}; -static const unsigned i2c2_muxvals[] = {0, 0}; +static const int i2c2_muxvals[] = {0, 0}; static const unsigned i2c3_pins[] = {148, 149}; -static const unsigned i2c3_muxvals[] = {0, 0}; +static const int i2c3_muxvals[] = {0, 0}; static const unsigned i2c6_pins[] = {308, 309}; -static const unsigned i2c6_muxvals[] = {6, 6}; +static const int i2c6_muxvals[] = {6, 6}; static const unsigned nand_pins[] = {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {131, 132}; -static const unsigned nand_cs1_muxvals[] = {1, 1}; +static const int nand_cs1_muxvals[] = {1, 1}; static const unsigned sd_pins[] = {150, 151, 152, 153, 154, 155, 156, 157, 158}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326, 327}; -static const unsigned sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned uart0_pins[] = {127, 128}; -static const unsigned uart0_muxvals[] = {0, 0}; +static const int uart0_muxvals[] = {0, 0}; static const unsigned uart1_pins[] = {129, 130}; -static const unsigned uart1_muxvals[] = {0, 0}; +static const int uart1_muxvals[] = {0, 0}; static const unsigned uart2_pins[] = {131, 132}; -static const unsigned uart2_muxvals[] = {0, 0}; +static const int uart2_muxvals[] = {0, 0}; static const unsigned uart3_pins[] = {88, 89}; -static const unsigned uart3_muxvals[] = {2, 2}; +static const int uart3_muxvals[] = {2, 2}; static const unsigned usb0_pins[] = {180, 181}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {182, 183}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {184, 185}; -static const unsigned usb2_muxvals[] = {0, 0}; +static const int usb2_muxvals[] = {0, 0}; static const unsigned usb3_pins[] = {186, 187}; -static const unsigned usb3_muxvals[] = {0, 0}; +static const int usb3_muxvals[] = {0, 0}; static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = { - UNIPHIER_PINCTRL_GROUP(emmc), - UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP_SPL(emmc), + UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_mii), + UNIPHIER_PINCTRL_GROUP(ether_rgmii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), + UNIPHIER_PINCTRL_GROUP(ether_rmiib), UNIPHIER_PINCTRL_GROUP(i2c0), UNIPHIER_PINCTRL_GROUP(i2c1), UNIPHIER_PINCTRL_GROUP(i2c2), @@ -66,10 +85,10 @@ static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = { UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), UNIPHIER_PINCTRL_GROUP(sd1), - UNIPHIER_PINCTRL_GROUP(uart0), - UNIPHIER_PINCTRL_GROUP(uart1), - UNIPHIER_PINCTRL_GROUP(uart2), - UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart3), UNIPHIER_PINCTRL_GROUP(usb0), UNIPHIER_PINCTRL_GROUP(usb1), UNIPHIER_PINCTRL_GROUP(usb2), @@ -77,23 +96,26 @@ static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = { }; static const char * const uniphier_pro4_functions[] = { - "emmc", - "i2c0", - "i2c1", - "i2c2", - "i2c3", - "i2c6", - "nand", - "sd", - "sd1", - "uart0", - "uart1", - "uart2", - "uart3", - "usb0", - "usb1", - "usb2", - "usb3", + UNIPHIER_PINMUX_FUNCTION_SPL(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_mii), + UNIPHIER_PINMUX_FUNCTION(ether_rgmii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c2), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(i2c6), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(sd1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION_SPL(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), }; static struct uniphier_pinctrl_socdata uniphier_pro4_pinctrl_socdata = { @@ -112,7 +134,7 @@ static int uniphier_pro4_pinctrl_probe(struct udevice *dev) } static const struct udevice_id uniphier_pro4_pinctrl_match[] = { - { .compatible = "socionext,ph1-pro4-pinctrl" }, + { .compatible = "socionext,uniphier-pro4-pinctrl" }, { /* sentinel */ } }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 6597f1cf04..50b41cc37c 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -23,53 +23,52 @@ static const struct uniphier_pinctrl_pin uniphier_pro5_pins[] = { }; static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; -static const unsigned emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0}; +static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; -static const unsigned emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; static const unsigned i2c0_pins[] = {112, 113}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {114, 115}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {116, 117}; -static const unsigned i2c2_muxvals[] = {0, 0}; +static const int i2c2_muxvals[] = {0, 0}; static const unsigned i2c3_pins[] = {118, 119}; -static const unsigned i2c3_muxvals[] = {0, 0}; +static const int i2c3_muxvals[] = {0, 0}; static const unsigned i2c5_pins[] = {87, 88}; -static const unsigned i2c5_muxvals[] = {2, 2}; +static const int i2c5_muxvals[] = {2, 2}; static const unsigned i2c5b_pins[] = {196, 197}; -static const unsigned i2c5b_muxvals[] = {2, 2}; +static const int i2c5b_muxvals[] = {2, 2}; static const unsigned i2c5c_pins[] = {215, 216}; -static const unsigned i2c5c_muxvals[] = {2, 2}; +static const int i2c5c_muxvals[] = {2, 2}; static const unsigned i2c6_pins[] = {101, 102}; -static const unsigned i2c6_muxvals[] = {2, 2}; +static const int i2c6_muxvals[] = {2, 2}; static const unsigned nand_pins[] = {19, 20, 21, 22, 23, 24, 25, 28, 29, 30, 31, 32, 33, 34, 35}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {26, 27}; -static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned uart0_pins[] = {47, 48}; -static const unsigned uart0_muxvals[] = {0, 0}; +static const int uart0_muxvals[] = {0, 0}; static const unsigned uart0b_pins[] = {227, 228}; -static const unsigned uart0b_muxvals[] = {3, 3}; +static const int uart0b_muxvals[] = {3, 3}; static const unsigned uart1_pins[] = {49, 50}; -static const unsigned uart1_muxvals[] = {0, 0}; +static const int uart1_muxvals[] = {0, 0}; static const unsigned uart2_pins[] = {51, 52}; -static const unsigned uart2_muxvals[] = {0, 0}; +static const int uart2_muxvals[] = {0, 0}; static const unsigned uart3_pins[] = {53, 54}; -static const unsigned uart3_muxvals[] = {0, 0}; +static const int uart3_muxvals[] = {0, 0}; static const unsigned usb0_pins[] = {124, 125}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {126, 127}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {128, 129}; -static const unsigned usb2_muxvals[] = {0, 0}; +static const int usb2_muxvals[] = {0, 0}; static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = { - UNIPHIER_PINCTRL_GROUP(emmc), - UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP_SPL(emmc), + UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), UNIPHIER_PINCTRL_GROUP(i2c0), UNIPHIER_PINCTRL_GROUP(i2c1), UNIPHIER_PINCTRL_GROUP(i2c2), @@ -81,33 +80,33 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), - UNIPHIER_PINCTRL_GROUP(uart0), - UNIPHIER_PINCTRL_GROUP(uart0b), - UNIPHIER_PINCTRL_GROUP(uart1), - UNIPHIER_PINCTRL_GROUP(uart2), - UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart0b), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart3), UNIPHIER_PINCTRL_GROUP(usb0), UNIPHIER_PINCTRL_GROUP(usb1), UNIPHIER_PINCTRL_GROUP(usb2), }; static const char * const uniphier_pro5_functions[] = { - "emmc", - "i2c0", - "i2c1", - "i2c2", - "i2c3", - "i2c5", - "i2c6", - "nand", - "sd", - "uart0", - "uart1", - "uart2", - "uart3", - "usb0", - "usb1", - "usb2", + UNIPHIER_PINMUX_FUNCTION_SPL(emmc), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c2), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(i2c5), + UNIPHIER_PINMUX_FUNCTION(i2c6), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION_SPL(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), }; static struct uniphier_pinctrl_socdata uniphier_pro5_pinctrl_socdata = { @@ -126,7 +125,7 @@ static int uniphier_pro5_pinctrl_probe(struct udevice *dev) } static const struct udevice_id uniphier_pro5_pinctrl_match[] = { - { .compatible = "socionext,ph1-pro5-pinctrl" }, + { .compatible = "socionext,uniphier-pro5-pinctrl" }, { /* sentinel */ } }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index cfec877588..9223eebc89 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -17,53 +17,68 @@ static const struct uniphier_pinctrl_pin uniphier_pxs2_pins[] = { }; static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; -static const unsigned emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9}; +static const int emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; -static const unsigned emmc_dat8_muxvals[] = {9, 9, 9, 9}; +static const int emmc_dat8_muxvals[] = {9, 9, 9, 9}; +static const unsigned ether_mii_pins[] = {143, 144, 145, 146, 147, 148, 149, + 150, 151, 152, 153, 154, 155, 156, + 158, 159, 199, 200, 201, 202}; +static const int ether_mii_muxvals[] = {8, 8, 8, 8, 10, 10, 10, 10, 10, 10, 10, + 10, 10, 10, 10, 10, 12, 12, 12, 12}; +static const unsigned ether_rgmii_pins[] = {143, 144, 145, 146, 147, 148, 149, + 150, 151, 152, 153, 154, 155, 156, + 157, 158}; +static const int ether_rgmii_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8}; +static const unsigned ether_rmii_pins[] = {143, 144, 145, 146, 147, 148, 149, + 150, 152, 154, 155, 158}; +static const int ether_rmii_muxvals[] = {8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9}; static const unsigned i2c0_pins[] = {109, 110}; -static const unsigned i2c0_muxvals[] = {8, 8}; +static const int i2c0_muxvals[] = {8, 8}; static const unsigned i2c1_pins[] = {111, 112}; -static const unsigned i2c1_muxvals[] = {8, 8}; +static const int i2c1_muxvals[] = {8, 8}; static const unsigned i2c2_pins[] = {171, 172}; -static const unsigned i2c2_muxvals[] = {8, 8}; +static const int i2c2_muxvals[] = {8, 8}; static const unsigned i2c3_pins[] = {159, 160}; -static const unsigned i2c3_muxvals[] = {8, 8}; +static const int i2c3_muxvals[] = {8, 8}; static const unsigned i2c5_pins[] = {183, 184}; -static const unsigned i2c5_muxvals[] = {11, 11}; +static const int i2c5_muxvals[] = {11, 11}; static const unsigned i2c6_pins[] = {185, 186}; -static const unsigned i2c6_muxvals[] = {11, 11}; +static const int i2c6_muxvals[] = {11, 11}; static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41, 42, 43, 44, 45, 46}; -static const unsigned nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8}; +static const int nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8}; static const unsigned nand_cs1_pins[] = {37, 38}; -static const unsigned nand_cs1_muxvals[] = {8, 8}; +static const int nand_cs1_muxvals[] = {8, 8}; static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55}; -static const unsigned sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8}; +static const int sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8}; static const unsigned uart0_pins[] = {217, 218}; -static const unsigned uart0_muxvals[] = {8, 8}; +static const int uart0_muxvals[] = {8, 8}; static const unsigned uart0b_pins[] = {179, 180}; -static const unsigned uart0b_muxvals[] = {10, 10}; +static const int uart0b_muxvals[] = {10, 10}; static const unsigned uart1_pins[] = {115, 116}; -static const unsigned uart1_muxvals[] = {8, 8}; +static const int uart1_muxvals[] = {8, 8}; static const unsigned uart2_pins[] = {113, 114}; -static const unsigned uart2_muxvals[] = {8, 8}; +static const int uart2_muxvals[] = {8, 8}; static const unsigned uart3_pins[] = {219, 220}; -static const unsigned uart3_muxvals[] = {8, 8}; +static const int uart3_muxvals[] = {8, 8}; static const unsigned uart3b_pins[] = {181, 182}; -static const unsigned uart3b_muxvals[] = {10, 10}; +static const int uart3b_muxvals[] = {10, 10}; static const unsigned usb0_pins[] = {56, 57}; -static const unsigned usb0_muxvals[] = {8, 8}; +static const int usb0_muxvals[] = {8, 8}; static const unsigned usb1_pins[] = {58, 59}; -static const unsigned usb1_muxvals[] = {8, 8}; +static const int usb1_muxvals[] = {8, 8}; static const unsigned usb2_pins[] = {60, 61}; -static const unsigned usb2_muxvals[] = {8, 8}; +static const int usb2_muxvals[] = {8, 8}; static const unsigned usb3_pins[] = {62, 63}; -static const unsigned usb3_muxvals[] = {8, 8}; +static const int usb3_muxvals[] = {8, 8}; static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = { - UNIPHIER_PINCTRL_GROUP(emmc), - UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP_SPL(emmc), + UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_mii), + UNIPHIER_PINCTRL_GROUP(ether_rgmii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), UNIPHIER_PINCTRL_GROUP(i2c0), UNIPHIER_PINCTRL_GROUP(i2c1), UNIPHIER_PINCTRL_GROUP(i2c2), @@ -73,12 +88,12 @@ static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), - UNIPHIER_PINCTRL_GROUP(uart0), - UNIPHIER_PINCTRL_GROUP(uart0b), - UNIPHIER_PINCTRL_GROUP(uart1), - UNIPHIER_PINCTRL_GROUP(uart2), - UNIPHIER_PINCTRL_GROUP(uart3), - UNIPHIER_PINCTRL_GROUP(uart3b), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart0b), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart3), + UNIPHIER_PINCTRL_GROUP_SPL(uart3b), UNIPHIER_PINCTRL_GROUP(usb0), UNIPHIER_PINCTRL_GROUP(usb1), UNIPHIER_PINCTRL_GROUP(usb2), @@ -86,25 +101,26 @@ static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = { }; static const char * const uniphier_pxs2_functions[] = { - "emmc", - "i2c0", - "i2c1", - "i2c2", - "i2c3", - "i2c5", - "i2c6", - "nand", - "sd", - "uart0", - "uart0b", - "uart1", - "uart2", - "uart3", - "uart3b", - "usb0", - "usb1", - "usb2", - "usb3", + UNIPHIER_PINMUX_FUNCTION_SPL(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_mii), + UNIPHIER_PINMUX_FUNCTION(ether_rgmii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c2), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(i2c5), + UNIPHIER_PINMUX_FUNCTION(i2c6), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION_SPL(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), }; static struct uniphier_pinctrl_socdata uniphier_pxs2_pinctrl_socdata = { @@ -122,7 +138,7 @@ static int uniphier_pxs2_pinctrl_probe(struct udevice *dev) } static const struct udevice_id uniphier_pxs2_pinctrl_match[] = { - { .compatible = "socionext,proxstream2-pinctrl" }, + { .compatible = "socionext,uniphier-pxs2-pinctrl" }, { /* sentinel */ } }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c index 5a733b3eb3..cee0eb1abd 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c @@ -38,43 +38,52 @@ static const struct uniphier_pinctrl_pin uniphier_sld8_pins[] = { }; static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27}; -static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31}; -static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const int emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const unsigned ether_mii_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 13, 14, + 61, 63, 64, 65, 66, 67, 68}; +static const int ether_mii_muxvals[] = {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, + 13, 13, 27, 27, 27, 27, 27, 27, 27}; +static const unsigned ether_rmii_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 13, + 14}; +static const int ether_rmii_muxvals[] = {13, 13, 13, 13, 13, 13, 13, 13, 13, + 13, 13, 13}; static const unsigned i2c0_pins[] = {102, 103}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {104, 105}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {108, 109}; -static const unsigned i2c2_muxvals[] = {2, 2}; +static const int i2c2_muxvals[] = {2, 2}; static const unsigned i2c3_pins[] = {108, 109}; -static const unsigned i2c3_muxvals[] = {3, 3}; +static const int i2c3_muxvals[] = {3, 3}; static const unsigned nand_pins[] = {15, 16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {22, 23}; -static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned uart0_pins[] = {70, 71}; -static const unsigned uart0_muxvals[] = {3, 3}; +static const int uart0_muxvals[] = {3, 3}; static const unsigned uart1_pins[] = {114, 115}; -static const unsigned uart1_muxvals[] = {0, 0}; +static const int uart1_muxvals[] = {0, 0}; static const unsigned uart2_pins[] = {112, 113}; -static const unsigned uart2_muxvals[] = {1, 1}; +static const int uart2_muxvals[] = {1, 1}; static const unsigned uart3_pins[] = {110, 111}; -static const unsigned uart3_muxvals[] = {1, 1}; +static const int uart3_muxvals[] = {1, 1}; static const unsigned usb0_pins[] = {41, 42}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {43, 44}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {114, 115}; -static const unsigned usb2_muxvals[] = {1, 1}; +static const int usb2_muxvals[] = {1, 1}; static const struct uniphier_pinctrl_group uniphier_sld8_groups[] = { - UNIPHIER_PINCTRL_GROUP(emmc), - UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP_SPL(emmc), + UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_mii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), UNIPHIER_PINCTRL_GROUP(i2c0), UNIPHIER_PINCTRL_GROUP(i2c1), UNIPHIER_PINCTRL_GROUP(i2c2), @@ -82,30 +91,32 @@ static const struct uniphier_pinctrl_group uniphier_sld8_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), - UNIPHIER_PINCTRL_GROUP(uart0), - UNIPHIER_PINCTRL_GROUP(uart1), - UNIPHIER_PINCTRL_GROUP(uart2), - UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart3), UNIPHIER_PINCTRL_GROUP(usb0), UNIPHIER_PINCTRL_GROUP(usb1), UNIPHIER_PINCTRL_GROUP(usb2), }; static const char * const uniphier_sld8_functions[] = { - "emmc", - "i2c0", - "i2c1", - "i2c2", - "i2c3", - "nand", - "sd", - "uart0", - "uart1", - "uart2", - "uart3", - "usb0", - "usb1", - "usb2", + UNIPHIER_PINMUX_FUNCTION_SPL(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_mii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c2), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION_SPL(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), }; static struct uniphier_pinctrl_socdata uniphier_sld8_pinctrl_socdata = { @@ -123,7 +134,7 @@ static int uniphier_sld8_pinctrl_probe(struct udevice *dev) } static const struct udevice_id uniphier_sld8_pinctrl_match[] = { - { .compatible = "socionext,ph1-sld8-pinctrl" }, + { .compatible = "socionext,uniphier-sld8-pinctrl" }, { /* sentinel */ } }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index 2b438482b1..4bb893218a 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -12,9 +12,9 @@ #include <linux/kernel.h> #include <linux/types.h> -#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0 -#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700 -#define UNIPHIER_PINCTRL_IECTRL 0xd00 +#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000 +#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700 +#define UNIPHIER_PINCTRL_IECTRL 0x1d00 #define UNIPHIER_PIN_ATTR_PACKED(iectrl) (iectrl) @@ -46,7 +46,7 @@ struct uniphier_pinctrl_group { const char *name; const unsigned *pins; unsigned num_pins; - const unsigned *muxvals; + const int *muxvals; }; /** @@ -80,7 +80,7 @@ struct uniphier_pinctrl_socdata { .data = UNIPHIER_PIN_ATTR_PACKED(b), \ } -#define UNIPHIER_PINCTRL_GROUP(grp) \ +#define __UNIPHIER_PINCTRL_GROUP(grp) \ { \ .name = #grp, \ .pins = grp##_pins, \ @@ -90,6 +90,19 @@ struct uniphier_pinctrl_socdata { ARRAY_SIZE(grp##_muxvals)), \ } +#define __UNIPHIER_PINMUX_FUNCTION(func) #func + +#ifdef CONFIG_SPL_BUILD +#define UNIPHIER_PINCTRL_GROUP(grp) { .name = NULL } +#define UNIPHIER_PINMUX_FUNCTION(func) NULL +#else +#define UNIPHIER_PINCTRL_GROUP(grp) __UNIPHIER_PINCTRL_GROUP(grp) +#define UNIPHIER_PINMUX_FUNCTION(func) __UNIPHIER_PINMUX_FUNCTION(func) +#endif + +#define UNIPHIER_PINCTRL_GROUP_SPL(grp) __UNIPHIER_PINCTRL_GROUP(grp) +#define UNIPHIER_PINMUX_FUNCTION_SPL(func) __UNIPHIER_PINMUX_FUNCTION(func) + /** * struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver * diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index e69ec0d9cd..9a372ad31d 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -45,7 +45,7 @@ DECLARE_GLOBAL_DATA_PTR; #define QSPI_XFER_DONE QSPI_WC #define MM_SWITCH 0x01 #define MEM_CS(cs) ((cs + 1) << 8) -#define MEM_CS_UNSELECT 0xfffff0ff +#define MEM_CS_UNSELECT 0xfffff8ff #define MMAP_START_ADDR_DRA 0x5c000000 #define MMAP_START_ADDR_AM43x 0x30000000 #define CORE_CTRL_IO 0x4a002558 diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index ebe60a82f1..183bf2ba42 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -182,8 +182,8 @@ bool has_erratum_a008751(void) switch (soc) { #ifdef CONFIG_ARM64 - case SVR_LS2080: - case SVR_LS2085: + case SVR_LS2080A: + case SVR_LS2085A: return IS_SVR_REV(svr, 1, 0); #endif } diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 28b244a8d0..2160b1ccdc 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -59,7 +59,6 @@ static inline struct f_fastboot *func_to_fastboot(struct usb_function *f) } static struct f_fastboot *fastboot_func; -static unsigned int fastboot_flash_session_id; static unsigned int download_size; static unsigned int download_bytes; @@ -152,16 +151,18 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req); static int strcmp_l1(const char *s1, const char *s2); -void fastboot_fail(char *response, const char *reason) +static char *fb_response_str; + +void fastboot_fail(const char *reason) { - strncpy(response, "FAIL\0", 5); - strncat(response, reason, FASTBOOT_RESPONSE_LEN - 4 - 1); + strncpy(fb_response_str, "FAIL\0", 5); + strncat(fb_response_str, reason, FASTBOOT_RESPONSE_LEN - 4 - 1); } -void fastboot_okay(char *response, const char *reason) +void fastboot_okay(const char *reason) { - strncpy(response, "OKAY\0", 5); - strncat(response, reason, FASTBOOT_RESPONSE_LEN - 4 - 1); + strncpy(fb_response_str, "OKAY\0", 5); + strncat(fb_response_str, reason, FASTBOOT_RESPONSE_LEN - 4 - 1); } static void fastboot_complete(struct usb_ep *ep, struct usb_request *req) @@ -424,15 +425,6 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) sprintf(str_num, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE); strncat(response, str_num, chars_left); - - /* - * This also indicates the start of a new flashing - * "session", in which we could have 1-N buffers to - * write to a partition. - * - * Reset our session counter. - */ - fastboot_flash_session_id = 0; } else if (!strcmp_l1("serialno", cmd)) { s = getenv("serial#"); if (s) @@ -598,18 +590,19 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req) return; } - strcpy(response, "FAILno flash device defined"); + /* initialize the response buffer */ + fb_response_str = response; + + fastboot_fail("no flash device defined"); #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV - fb_mmc_flash_write(cmd, fastboot_flash_session_id, - (void *)CONFIG_FASTBOOT_BUF_ADDR, - download_bytes, response); + fb_mmc_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR, + download_bytes); #endif #ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV - fb_nand_flash_write(cmd, fastboot_flash_session_id, + fb_nand_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR, - download_bytes, response); + download_bytes); #endif - fastboot_flash_session_id++; fastboot_tx_write_str(response); } #endif @@ -649,13 +642,15 @@ static void cb_erase(struct usb_ep *ep, struct usb_request *req) return; } - strcpy(response, "FAILno flash device defined"); + /* initialize the response buffer */ + fb_response_str = response; + fastboot_fail("no flash device defined"); #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV - fb_mmc_erase(cmd, response); + fb_mmc_erase(cmd); #endif #ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV - fb_nand_erase(cmd, response); + fb_nand_erase(cmd); #endif fastboot_tx_write_str(response); } diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 4db6faa7bb..9ecaf38a33 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -120,7 +120,7 @@ "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; " \ "if fdt addr ${fdt_addr_r}; then " \ "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ - "else" \ + "else " \ "bootefi ${kernel_addr_r} ${fdtcontroladdr};" \ "fi\0" \ \ diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index c5c3a845e4..8010f28e43 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -98,8 +98,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ - #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ #define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index db953b9b4a..ffae107a9a 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -121,8 +121,6 @@ #define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ - #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ #define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 79027e214c..6ef39dba9e 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -99,7 +99,6 @@ #define CONFIG_BAUDRATE 9600 /* STD Baudrate */ /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */ #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index e7c7a990f4..9203f85abf 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -91,7 +91,6 @@ /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */ #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 558f3e2ba6..c2e067a399 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -117,7 +117,6 @@ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index 5f17d76744..619222fed7 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -92,7 +92,6 @@ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ /* diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 868ca84f99..d3183ff8dc 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -312,7 +312,6 @@ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ /*----------------------------------------------------------------------- diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 968e1dfd64..a60c7c1c28 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -117,7 +117,6 @@ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_RESET_TO_RETRY -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_IPADDR 10.0.0.110 diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index dde98f6e75..e87cea8393 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -105,7 +105,6 @@ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h index 7ec404d548..8f17dd18c7 100644 --- a/include/configs/a3m071.h +++ b/include/configs/a3m071.h @@ -322,7 +322,6 @@ */ #undef CONFIG_BOOTARGS -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_SYS_AUTOLOAD "n" diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 2666ca6f69..9bda7faa90 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -78,7 +78,6 @@ #define CONFIG_CMDLINE_EDITING /* add command line history */ #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE /* include version env variable */ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ diff --git a/include/configs/apf27.h b/include/configs/apf27.h index f44f71cebe..51a16eba1f 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -148,7 +148,6 @@ #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ #define CONFIG_INITRD_TAG /* send initrd params */ -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin" #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \ __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \ diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h index bd3c7116d5..8d041edbb6 100644 --- a/include/configs/bcm23550_w1d.h +++ b/include/configs/bcm23550_w1d.h @@ -137,7 +137,6 @@ #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE #undef CONFIG_USB_GADGET_VBUS_DRAW #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY #define CONFIG_USBID_ADDR 0x34052c46 diff --git a/include/configs/tseries.h b/include/configs/brppt1.h index 8ed9eb080d..6a239b59a6 100644 --- a/include/configs/tseries.h +++ b/include/configs/brppt1.h @@ -1,5 +1,5 @@ /* - * tseries.h + * brtpp1.h * * specific parts for B&R T-Series Motherboard * @@ -9,8 +9,8 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __CONFIG_TSERIES_H__ -#define __CONFIG_TSERIES_H__ +#ifndef __CONFIG_BRPPT1_H__ +#define __CONFIG_BRPPT1_H__ #include <configs/bur_cfg_common.h> #include <configs/bur_am335x_common.h> @@ -301,4 +301,4 @@ MMCARGS #define CONFIG_EXT4_WRITE #endif /* CONFIG_MMC, ... */ -#endif /* ! __CONFIG_TSERIES_H__ */ +#endif /* ! __CONFIG_BRPPT1_H__ */ diff --git a/include/configs/kwb.h b/include/configs/brxre1.h index 2bddc6b7df..11f56bfb4d 100644 --- a/include/configs/kwb.h +++ b/include/configs/brxre1.h @@ -1,5 +1,5 @@ /* - * kwb.h + * brxre1.h * * specific parts for B&R KWB Motherboard * @@ -9,8 +9,8 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __CONFIG_KWB_H__ -#define __CONFIG_KWB_H__ +#ifndef __CONFIG_BRXRE1_H__ +#define __CONFIG_BRXRE1_H__ #include <configs/bur_cfg_common.h> #include <configs/bur_am335x_common.h> @@ -140,4 +140,4 @@ BUR_COMMON_ENV \ #define CONFIG_FAT_WRITE #endif /* CONFIG_MMC, ... */ -#endif /* __CONFIG_KWB_H__ */ +#endif /* __CONFIG_BRXRE1_H__ */ diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 3b10360b5e..9c2b9e8caf 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -214,7 +214,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS "" #define CONFIG_BOOTCOMMAND "run checkupdate; run checkbutton;" -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_BOOT_RETRY_TIME 60 /* continue boot after 60 s inactivity */ #define CONFIG_RESET_TO_RETRY diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index de1999d431..03dc3cc0d9 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -145,8 +145,6 @@ /* devices */ /* Environment information */ -#define CONFIG_ZERO_BOOTDELAY_CHECK - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "usbtty=cdc_acm\0" \ diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index 87e41bfaba..ea9983bc7d 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -152,8 +152,6 @@ /* devices */ /* Environment information */ -#define CONFIG_ZERO_BOOTDELAY_CHECK - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "baudrate=115200\0" \ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 50765408db..9bb975a4b5 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -98,7 +98,6 @@ #undef CONFIG_SPL_NAND_SUPPORT #undef CONFIG_SYS_MONITOR_LEN #undef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_ENV_SIZE (16 * 1024) #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 686760d0a5..e6a811af03 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -35,7 +35,7 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 73f53d4a2b..22f4322e0e 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -178,7 +178,6 @@ */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_BOOTFILE "uImage" #define CONFIG_BOOTARGS "console=ttyS0,115200n8" diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 1145e37639..c6d6d41a3b 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -379,7 +379,6 @@ #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_MX_CYCLIC 1 -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 445a346b76..521604e70f 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ - /* * Configure PLL */ diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 98474d33c3..38298a200c 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -51,8 +51,6 @@ #define CONFIG_EXYNOS_DWMMC #define CONFIG_BOUNCE_BUFFER -#define CONFIG_ZERO_BOOTDELAY_CHECK - /* PWM */ #define CONFIG_PWM diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index 8d79ea8ea1..2845a80e0d 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -33,8 +33,6 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f*/ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ - /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 6a8660b088..c5e6828e2b 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -543,8 +543,6 @@ void fpga_control_clear(unsigned int bus, int pin); #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_CONSOLE_INFO_QUIET diff --git a/include/configs/intip.h b/include/configs/intip.h index f3db0771ef..4984dc1ef8 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -48,8 +48,6 @@ #define CONFIG_BOARD_TYPES 1 /* support board types */ #define CFG_ALT_MEMTEST -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ - /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) diff --git a/include/configs/io.h b/include/configs/io.h index 0dd7f006cf..544d044019 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -33,8 +33,6 @@ #define PLLMR0_DEFAULT PLLMR0_266_133_66 #define PLLMR1_DEFAULT PLLMR1_266_133_66 -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ - /* new uImage format support */ #define CONFIG_FIT_DISABLE_SHA256 diff --git a/include/configs/io64.h b/include/configs/io64.h index 1a6275e609..14ffb33d50 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -44,8 +44,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ - /*----------------------------------------------------------------------- * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 43688c754c..d85a76c749 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -35,8 +35,6 @@ #define PLLMR0_DEFAULT PLLMR0_266_133_66 #define PLLMR1_DEFAULT PLLMR1_266_133_66 -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ - /* new uImage format support */ #define CONFIG_FIT_DISABLE_SHA256 diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index f52750e591..04f593e58b 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -168,7 +168,6 @@ #define CONFIG_SERIAL_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_SETUP_INITRD_TAG -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_BOOTCOMMAND \ "if mmc rescan; then " \ "if run loadbootscr; then " \ diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index a19eaee5a9..ee8cb2336c 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -10,11 +10,7 @@ #include "ls1043a_common.h" #define CONFIG_DISPLAY_CPUINFO -#ifdef CONFIG_QSPI_BOOT -#define CONFIG_DISPLAY_BOARDINFO_LATE -#else #define CONFIG_DISPLAY_BOARDINFO -#endif #if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT) #define CONFIG_SYS_TEXT_BASE 0x82000000 @@ -29,8 +25,8 @@ unsigned long get_board_sys_clk(void); unsigned long get_board_ddr_clk(void); #endif -#define CONFIG_SYS_CLK_FREQ 100000000 -#define CONFIG_DDR_CLK_FREQ 100000000 +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() #define CONFIG_SKIP_LOWLEVEL_INIT @@ -225,6 +221,7 @@ unsigned long get_board_ddr_clk(void); #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_I2C_EARLY_INIT #define CONFIG_SYS_NO_FLASH #endif diff --git a/include/configs/meesc.h b/include/configs/meesc.h index fbcad4ac80..df76a205c4 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -69,8 +69,6 @@ #define CONFIG_USART_ID ATMEL_ID_SYS #define CONFIG_BAUDRATE 115200 -#define CONFIG_ZERO_BOOTDELAY_CHECK - /* * BOOTP options */ diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gxbb-common.h new file mode 100644 index 0000000000..eaf6a9c08a --- /dev/null +++ b/include/configs/meson-gxbb-common.h @@ -0,0 +1,44 @@ +/* + * Configuration for Amlogic Meson GXBB SoCs + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MESON_GXBB_COMMON_CONFIG_H +#define __MESON_GXBB_COMMON_CONFIG_H + +#define CONFIG_CPU_ARMV8 +#define CONFIG_REMAKE_ELF +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_SYS_NO_FLASH +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_SYS_MAXARGS 32 +#define CONFIG_SYS_MALLOC_LEN (32 << 20) +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_MISC_INIT_R + +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_TEXT_BASE 0x01000000 +#define CONFIG_SYS_INIT_SP_ADDR 0x20000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE 0xc4301000 +#define GICC_BASE 0xc4302000 + +#define CONFIG_CMD_ENV + +/* Monitor Command Prompt */ +/* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING + +#include <config_distro_defaults.h> + +#endif /* __MESON_GXBB_COMMON_CONFIG_H */ diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h index 37a5671ccb..bf5df9c77b 100644 --- a/include/configs/odroid-c2.h +++ b/include/configs/odroid-c2.h @@ -8,44 +8,12 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_CPU_ARMV8 -#define CONFIG_REMAKE_ELF -#define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_SYS_NO_FLASH -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_ENV_IS_NOWHERE 1 -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_SYS_MAXARGS 32 -#define CONFIG_SYS_MALLOC_LEN (32 << 20) -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_MISC_INIT_R - -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_TEXT_BASE 0x01000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x20000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE - -/* Generic Interrupt Controller Definitions */ -#define GICD_BASE 0xc4301000 -#define GICC_BASE 0xc4302000 - #define CONFIG_IDENT_STRING " odroid-c2" /* Serial setup */ #define CONFIG_CONS_INDEX 0 #define CONFIG_BAUDRATE 115200 -#define CONFIG_CMD_ENV - -/* Monitor Command Prompt */ -/* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING - -#include <config_distro_defaults.h> +#include <configs/meson-gxbb-common.h> #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 3c11e2acc2..49a8b3f5ef 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -47,7 +47,6 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */ /* Hardware drivers */ diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h index 80d5d6c858..32f059de0a 100644 --- a/include/configs/pcm030.h +++ b/include/configs/pcm030.h @@ -67,11 +67,6 @@ Serial console configuration #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:256k(ubootl)," \ "1792k(kernel),13312k(jffs2),256k(uboot)ro,256k(oftree),-(space)" -/*----------------------------------------------------------------------------- -Autobooting ------------------------------------------------------------------------------*/ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow stopping of boot process */ - /* even with bootdelay=0 */ #undef CONFIG_BOOTARGS #define CONFIG_PREBOOT "echo;" \ diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index c15580c582..bc01ae9277 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -31,9 +31,6 @@ #define CONFIG_BOOTARGS "console=ttySC0,115200" #define CONFIG_ENV_OVERWRITE 1 -/* check for keypress on bootdelay==0 */ -/*#define CONFIG_ZERO_BOOTDELAY_CHECK*/ - #define CONFIG_SYS_TEXT_BASE 0x0FFC0000 #define CONFIG_SYS_SDRAM_BASE (0x08000000) #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h index 9723bab77e..13eac75f8d 100644 --- a/include/configs/s32v234evb.h +++ b/include/configs/s32v234evb.h @@ -190,7 +190,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_PROMPT "=> " #undef CONFIG_AUTO_COMPLETE diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index afea884040..87e51d0aa9 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -94,8 +94,6 @@ ",12m(modem)"\ ",60m(qboot)\0" -#define CONFIG_ZERO_BOOTDELAY_CHECK - /* partitions definitions */ #define PARTS_CSA "csa-mmc" #define PARTS_BOOTLOADER "u-boot" diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index fc4153aba8..6add3916fa 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -45,7 +45,7 @@ #define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */ #define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */ #define CONFIG_INITRD_TAG /* pass initrd param to kernel */ -#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */ #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ #define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */ @@ -157,10 +157,6 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_ASIX -#define CONFIG_USB_ETHER_MCS7830 - /* USB DFU support */ #define CONFIG_CMD_MTDPARTS #define CONFIG_MTD_DEVICE diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index f733c35024..e3288429b5 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -82,7 +82,6 @@ /* autoboot */ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_RESET_TO_RETRY -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_IPADDR 10.0.0.110 diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index fe41d17149..84a188af3a 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -71,9 +71,6 @@ #define CONFIG_CMD_ONENAND #define CONFIG_CMD_MTDPARTS - -#define CONFIG_ZERO_BOOTDELAY_CHECK - #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 7981a8d80b..b33bec94a0 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -117,7 +117,6 @@ /* Boot options */ #define CONFIG_SYS_LOAD_ADDR 0x23000000 -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTPATH diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index ddfbcec980..fd6c70e110 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -95,7 +95,6 @@ /* Boot options */ #define CONFIG_SYS_LOAD_ADDR 0x23000000 -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTPATH @@ -136,7 +135,6 @@ #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING #define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_HUSH_PARSER /* U-Boot memory settings */ #define CONFIG_SYS_MALLOC_LEN (1 << 20) diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index 6f5dfce3be..cc07253aba 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -19,7 +19,6 @@ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Booting Linux */ -#define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "zImage" #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) #define CONFIG_LOADADDR 0x01000000 diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 43ba84ab58..7f6cb9318b 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -178,7 +178,6 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_MISC_INIT_R -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 diff --git a/include/configs/strider.h b/include/configs/strider.h index 36561e0346..5fabbadba8 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -581,8 +581,6 @@ void fpga_control_clear(unsigned int bus, int pin); #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_CONSOLE_INFO_QUIET diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 0b05289d07..882a4e5dbf 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -45,7 +45,7 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index dda70c5c81..1caa858856 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -64,7 +64,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_SYS_ALT_MEMTEST #define CONFIG_PREBOOT diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 2e4c8e9646..3589cdc3a8 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -100,6 +100,8 @@ "setenv fdtfile omap5-uevm.dtb; fi; " \ "if test $board_name = dra7xx; then " \ "setenv fdtfile dra7-evm.dtb; fi;" \ + "if test $board_name = dra72x-revc; then " \ + "setenv fdtfile dra72-evm-revc.dtb; fi;" \ "if test $board_name = dra72x; then " \ "setenv fdtfile dra72-evm.dtb; fi;" \ "if test $board_name = beagle_x15; then " \ diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 74a9a098a0..b2ccb70023 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -60,7 +60,6 @@ #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ #define CONFIG_AUTO_COMPLETE /* Command auto complete */ #define CONFIG_CMDLINE_EDITING /* Command history etc */ -#define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* USB, USB storage, USB ethernet */ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index aed3931515..127a968948 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -46,7 +46,6 @@ #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_SILENT_CONSOLE -#define CONFIG_ZERO_BOOTDELAY_CHECK /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 77057d0097..4ebaf841ec 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -147,8 +147,6 @@ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ - /* * Network Configuration */ diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 35fe9de146..4ae179c4de 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -150,6 +150,5 @@ "bootdelay=0\0" #endif -#define CONFIG_ZERO_BOOTDELAY_CHECK #endif diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index ba222f936f..eae7ebab0e 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -174,8 +174,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_ZERO_BOOTDELAY_CHECK - #define CONFIG_BOOTFILE "uImage" #define CONFIG_BOOTARGS "console=ttyS2,115200n8" #define CONFIG_LOADADDR 0x80008000 diff --git a/include/configs/x600.h b/include/configs/x600.h index 71c0b45842..748e3317a7 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -145,7 +145,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_BOARD_LATE_INIT #define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h index e97e9d0816..39c1bd89d8 100644 --- a/include/configs/xilinx-ppc.h +++ b/include/configs/xilinx-ppc.h @@ -57,7 +57,6 @@ #define CONFIG_CMDLINE_EDITING /* add command line history */ #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE /* include version env variable */ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_LOADS_ECHO /* echo on for serial download */ diff --git a/include/env_default.h b/include/env_default.h index 3096576836..ea6704a972 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -90,9 +90,13 @@ const uchar default_environment[] = { #endif #ifdef CONFIG_ENV_VARS_UBOOT_CONFIG "arch=" CONFIG_SYS_ARCH "\0" +#ifdef CONFIG_SYS_CPU "cpu=" CONFIG_SYS_CPU "\0" +#endif +#ifdef CONFIG_SYS_BOARD "board=" CONFIG_SYS_BOARD "\0" "board_name=" CONFIG_SYS_BOARD "\0" +#endif #ifdef CONFIG_SYS_VENDOR "vendor=" CONFIG_SYS_VENDOR "\0" #endif diff --git a/include/fastboot.h b/include/fastboot.h index db826d20bf..616631e9aa 100644 --- a/include/fastboot.h +++ b/include/fastboot.h @@ -16,7 +16,7 @@ /* The 64 defined bytes plus \0 */ #define FASTBOOT_RESPONSE_LEN (64 + 1) -void fastboot_fail(char *response, const char *reason); -void fastboot_okay(char *response, const char *reason); +void fastboot_fail(const char *reason); +void fastboot_okay(const char *reason); #endif /* _FASTBOOT_H_ */ diff --git a/include/fb_mmc.h b/include/fb_mmc.h index 978a1395a1..12b99cb5ee 100644 --- a/include/fb_mmc.h +++ b/include/fb_mmc.h @@ -4,7 +4,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ -void fb_mmc_flash_write(const char *cmd, unsigned int session_id, - void *download_buffer, unsigned int download_bytes, - char *response); -void fb_mmc_erase(const char *cmd, char *response); +void fb_mmc_flash_write(const char *cmd, void *download_buffer, + unsigned int download_bytes); +void fb_mmc_erase(const char *cmd); diff --git a/include/fb_nand.h b/include/fb_nand.h index 80ddef5656..aaf7cf7ae8 100644 --- a/include/fb_nand.h +++ b/include/fb_nand.h @@ -5,7 +5,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ -void fb_nand_flash_write(const char *cmd, unsigned int session_id, - void *download_buffer, unsigned int download_bytes, - char *response); -void fb_nand_erase(const char *cmd, char *response); +void fb_nand_flash_write(const char *cmd, void *download_buffer, + unsigned int download_bytes); +void fb_nand_erase(const char *cmd); diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index fa760a57fb..c6f46664c7 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -35,6 +35,12 @@ #define SYSCTL_RSTC 0x02000000 #define SYSCTL_RSTD 0x04000000 +#define VENDORSPEC_CKEN 0x00004000 +#define VENDORSPEC_PEREN 0x00002000 +#define VENDORSPEC_HCKEN 0x00001000 +#define VENDORSPEC_IPGEN 0x00000800 +#define VENDORSPEC_INIT 0x20007809 + #define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) #define IRQSTAT_AC12E (0x01000000) @@ -171,6 +177,7 @@ struct fsl_esdhc_cfg { phys_addr_t esdhc_base; u32 sdhc_clk; u8 max_bus_width; + u8 wp_enable; struct mmc_config cfg; }; diff --git a/include/image-sparse.h b/include/image-sparse.h index 0382f5bd26..b0cc5007f7 100644 --- a/include/image-sparse.h +++ b/include/image-sparse.h @@ -9,16 +9,21 @@ #define ROUNDUP(x, y) (((x) + ((y) - 1)) & ~((y) - 1)) -typedef struct sparse_storage { - unsigned int block_sz; - unsigned int start; - unsigned int size; - const char *name; - - int (*write)(struct sparse_storage *storage, void *priv, - unsigned int offset, unsigned int size, - char *data); -} sparse_storage_t; +struct sparse_storage { + lbaint_t blksz; + lbaint_t start; + lbaint_t size; + void *priv; + + lbaint_t (*write)(struct sparse_storage *info, + lbaint_t blk, + lbaint_t blkcnt, + const void *buffer); + + lbaint_t (*reserve)(struct sparse_storage *info, + lbaint_t blk, + lbaint_t blkcnt); +}; static inline int is_sparse_image(void *buf) { @@ -31,5 +36,5 @@ static inline int is_sparse_image(void *buf) return 0; } -int store_sparse_image(sparse_storage_t *storage, void *storage_priv, - unsigned int session_id, void *data); +void write_sparse_image(struct sparse_storage *info, const char *part_name, + void *data, unsigned sz); diff --git a/include/image.h b/include/image.h index a8f6bd16f6..d788c260e3 100644 --- a/include/image.h +++ b/include/image.h @@ -1156,6 +1156,7 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr, ulong *rd_data, ulong *rd_len); ulong android_image_get_end(const struct andr_img_hdr *hdr); ulong android_image_get_kload(const struct andr_img_hdr *hdr); +void android_print_contents(const struct andr_img_hdr *hdr); #endif /* CONFIG_ANDROID_BOOT_IMAGE */ diff --git a/include/spl.h b/include/spl.h index 0ae160547d..23604667fa 100644 --- a/include/spl.h +++ b/include/spl.h @@ -66,7 +66,7 @@ extern struct spl_image_info spl_image; /* SPL common functions */ void preloader_console_init(void); u32 spl_boot_device(void); -u32 spl_boot_mode(void); +u32 spl_boot_mode(const u32 boot_device); void spl_set_header_raw_uboot(void); int spl_parse_image_header(const struct image_header *header); void spl_board_prepare_for_linux(void); diff --git a/lib/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c index ebdf10b988..ccc90b8ee5 100644 --- a/lib/lzo/lzo1x_decompress.c +++ b/lib/lzo/lzo1x_decompress.c @@ -98,18 +98,25 @@ int lzop_decompress(const unsigned char *src, size_t src_len, if (dlen > remaining) return LZO_E_OUTPUT_OVERRUN; - /* decompress */ - tmp = dlen; - r = lzo1x_decompress_safe((u8 *) src, slen, dst, &tmp); + /* When the input data is not compressed at all, + * lzo1x_decompress_safe will fail, so call memcpy() + * instead */ + if (dlen == slen) { + memcpy(dst, src, slen); + } else { + /* decompress */ + tmp = dlen; + r = lzo1x_decompress_safe((u8 *)src, slen, dst, &tmp); + + if (r != LZO_E_OK) { + *dst_len = dst - start; + return r; + } - if (r != LZO_E_OK) { - *dst_len = dst - start; - return r; + if (dlen != tmp) + return LZO_E_ERROR; } - if (dlen != tmp) - return LZO_E_ERROR; - src += slen; dst += dlen; remaining -= dlen; diff --git a/test/command_ut.c b/test/command_ut.c index 54bf62b9bc..21283eb357 100644 --- a/test/command_ut.c +++ b/test/command_ut.c @@ -43,7 +43,7 @@ static int do_ut_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) assert(run_command_list("false", -1, 0) == 1); assert(run_command_list("echo", -1, 0) == 0); -#ifdef CONFIG_SYS_HUSH_PARSER +#ifdef CONFIG_HUSH_PARSER run_command("setenv foo 'setenv black 1\nsetenv adder 2'", 0); run_command("run foo", 0); assert(getenv("black") != NULL); diff --git a/tools/default_image.c b/tools/default_image.c index 3ed7014147..6e4ae14ec7 100644 --- a/tools/default_image.c +++ b/tools/default_image.c @@ -88,7 +88,6 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd, struct image_tool_params *params) { uint32_t checksum; - char *source_date_epoch; time_t time; image_header_t * hdr = (image_header_t *)ptr; @@ -98,18 +97,7 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd, sizeof(image_header_t)), sbuf->st_size - sizeof(image_header_t)); - source_date_epoch = getenv("SOURCE_DATE_EPOCH"); - if (source_date_epoch != NULL) { - time = (time_t) strtol(source_date_epoch, NULL, 10); - - if (gmtime(&time) == NULL) { - fprintf(stderr, "%s: SOURCE_DATE_EPOCH is not valid\n", - __func__); - time = 0; - } - } else { - time = sbuf->st_mtime; - } + time = imagetool_get_source_date(params, sbuf->st_mtime); /* Build new header */ image_set_magic(hdr, IH_MAGIC); diff --git a/tools/fit_image.c b/tools/fit_image.c index 0551572b04..58aa8e27db 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -51,8 +51,10 @@ static int fit_add_file_data(struct image_tool_params *params, size_t size_inc, } /* for first image creation, add a timestamp at offset 0 i.e., root */ - if (params->datafile) - ret = fit_set_timestamp(ptr, 0, sbuf.st_mtime); + if (params->datafile) { + time_t time = imagetool_get_source_date(params, sbuf.st_mtime); + ret = fit_set_timestamp(ptr, 0, time); + } if (!ret) { ret = fit_add_verification_data(params->keydir, dest_blob, ptr, @@ -416,7 +418,13 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) ret = -EPERM; goto err_munmap; } - fdt_setprop_u32(fdt, node, "data-offset", buf_ptr); + if (params->external_offset > 0) { + /* An external offset positions the data absolutely. */ + fdt_setprop_u32(fdt, node, "data-position", + params->external_offset + buf_ptr); + } else { + fdt_setprop_u32(fdt, node, "data-offset", buf_ptr); + } fdt_setprop_u32(fdt, node, "data-size", len); buf_ptr += (len + 3) & ~3; @@ -437,6 +445,17 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) ret = -EIO; goto err; } + + /* Check if an offset for the external data was set. */ + if (params->external_offset > 0) { + if (params->external_offset < new_size) { + debug("External offset %x overlaps FIT length %x", + params->external_offset, new_size); + ret = -EINVAL; + goto err; + } + new_size = params->external_offset; + } if (lseek(fd, new_size, SEEK_SET) < 0) { debug("%s: Failed to seek to end of file: %s\n", __func__, strerror(errno)); diff --git a/tools/imagetool.c b/tools/imagetool.c index 08d191d9f8..855a096d0a 100644 --- a/tools/imagetool.c +++ b/tools/imagetool.c @@ -115,3 +115,23 @@ int imagetool_get_filesize(struct image_tool_params *params, const char *fname) return sbuf.st_size; } + +time_t imagetool_get_source_date( + struct image_tool_params *params, + time_t fallback) +{ + char *source_date_epoch = getenv("SOURCE_DATE_EPOCH"); + + if (source_date_epoch == NULL) + return fallback; + + time_t time = (time_t) strtol(source_date_epoch, NULL, 10); + + if (gmtime(&time) == NULL) { + fprintf(stderr, "%s: SOURCE_DATE_EPOCH is not valid\n", + params->cmdname); + time = 0; + } + + return time; +} diff --git a/tools/imagetool.h b/tools/imagetool.h index a3ed0f43d6..6c1a9d3760 100644 --- a/tools/imagetool.h +++ b/tools/imagetool.h @@ -74,6 +74,7 @@ struct image_tool_params { struct content_info *content_tail; bool external_data; /* Store data outside the FIT */ bool quiet; /* Don't output text in normal operation */ + unsigned int external_offset; /* Add padding to external data */ }; /* @@ -205,6 +206,22 @@ int imagetool_save_subimage( */ int imagetool_get_filesize(struct image_tool_params *params, const char *fname); +/** + * imagetool_get_source_date() - Get timestamp for build output. + * + * Gets a timestamp for embedding it in a build output. If set + * SOURCE_DATE_EPOCH is used. Else the given fallback value is returned. Prints + * an error message if SOURCE_DATE_EPOCH contains an invalid value and returns + * 0. + * + * @params: mkimage parameters + * @fallback: timestamp to use if SOURCE_DATE_EPOCH isn't set + * @return timestamp based on SOURCE_DATE_EPOCH + */ +time_t imagetool_get_source_date( + struct image_tool_params *params, + time_t fallback); + /* * There is a c file associated with supported image type low level code * for ex. default_image.c, fit_image.c diff --git a/tools/mkimage.c b/tools/mkimage.c index aefe22f19b..ff3024a8f1 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -93,11 +93,13 @@ static void usage(const char *msg) " -f => input filename for FIT source\n"); #ifdef CONFIG_FIT_SIGNATURE fprintf(stderr, - "Signing / verified boot options: [-k keydir] [-K dtb] [ -c <comment>] [-r]\n" + "Signing / verified boot options: [-E] [-k keydir] [-K dtb] [ -c <comment>] [-p addr] [-r]\n" + " -E => place data outside of the FIT structure\n" " -k => set directory containing private keys\n" " -K => write public keys to this .dtb file\n" " -c => add comment in signature node\n" " -F => re-sign existing FIT image\n" + " -p => place external data at a static position\n" " -r => mark keys used as 'required' in dtb\n"); #else fprintf(stderr, @@ -136,7 +138,7 @@ static void process_args(int argc, char **argv) int opt; while ((opt = getopt(argc, argv, - "a:A:b:cC:d:D:e:Ef:Fk:K:ln:O:rR:qsT:vVx")) != -1) { + "a:A:b:cC:d:D:e:Ef:Fk:K:ln:p:O:rR:qsT:vVx")) != -1) { switch (opt) { case 'a': params.addr = strtoull(optarg, &ptr, 16); @@ -216,6 +218,13 @@ static void process_args(int argc, char **argv) if (params.os < 0) usage("Invalid operating system"); break; + case 'p': + params.external_offset = strtoull(optarg, &ptr, 16); + if (*ptr) { + fprintf(stderr, "%s: invalid offset size %s\n", + params.cmdname, optarg); + exit(EXIT_FAILURE); + } case 'q': params.quiet = 1; break; |
