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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-02-04 17:24:14 +0900 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-02-19 11:07:50 -0500 |
| commit | 5651ccffa4aa8ac36961f376927df253b7d0c035 (patch) | |
| tree | 67b9fbbd04f28b25a07ee4de4c8ea464f0622ed6 /scripts/Makefile.build | |
| parent | a0b14c3f0a94ecb4d8210a249d25fdf37185f39b (diff) | |
| download | talos-obmc-uboot-5651ccffa4aa8ac36961f376927df253b7d0c035.tar.gz talos-obmc-uboot-5651ccffa4aa8ac36961f376927df253b7d0c035.zip | |
Makfile: move suffix rules to Makefile.build
This commit moves suffix rules from config.mk
to scripts/Makefile.build, which will allow us
to switch smoothly to real Kbuild.
Note1:
post/lib_powerpc/fpu/Makefile has
its own rule to compile C sources.
We need to tweak it to keep the same behavior.
Note2:
There are two file2 with the same name:
arch/arm/lib/crt0.S and eamples/api/crt0.S.
To keep the same build behavior,
examples/api/Makefile also has to be treaked.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'scripts/Makefile.build')
| -rw-r--r-- | scripts/Makefile.build | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 50c0394d5f..1b3d77fea2 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -67,6 +67,37 @@ endif ######################################################################### +# Allow boards to use custom optimize flags on a per dir/file basis +ALL_AFLAGS = $(AFLAGS) $(AFLAGS_$(BCURDIR)/$(@F)) $(AFLAGS_$(BCURDIR)) +ALL_CFLAGS = $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) +EXTRA_CPPFLAGS = $(CPPFLAGS_$(BCURDIR)/$(@F)) $(CPPFLAGS_$(BCURDIR)) +ALL_CFLAGS += $(EXTRA_CPPFLAGS) + +# The _DEP version uses the $< file target (for dependency generation) +# See rules.mk +EXTRA_CPPFLAGS_DEP = $(CPPFLAGS_$(BCURDIR)/$(addsuffix .o,$(basename $<))) \ + $(CPPFLAGS_$(BCURDIR)) +$(obj)%.s: %.S + $(CPP) $(ALL_AFLAGS) -o $@ $< +$(obj)%.o: %.S + $(CC) $(ALL_AFLAGS) -o $@ $< -c +$(obj)%.o: %.c +ifneq ($(CHECKSRC),0) + $(CHECK) $(CHECKFLAGS) $(ALL_CFLAGS) $< +endif + $(CC) $(ALL_CFLAGS) -o $@ $< -c +$(obj)%.i: %.c + $(CPP) $(ALL_CFLAGS) -o $@ $< -c +$(obj)%.s: %.c + $(CC) $(ALL_CFLAGS) -o $@ $< -c -S + +# If the list of objects to link is empty, just create an empty built-in.o +cmd_link_o_target = $(if $(strip $1),\ + $(LD) $(LDFLAGS) -r -o $@ $1,\ + rm -f $@; $(AR) rcs $@ ) + +######################################################################### + # defines $(obj).depend target include $(TOPDIR)/rules.mk |
