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authorSimon Glass <sjg@chromium.org>2015-07-03 18:28:27 -0600
committerSimon Glass <sjg@chromium.org>2015-07-14 18:03:19 -0600
commitb9da5086b88a1565c7aede14e68bef2456c44475 (patch)
treef4817c1fc0bfa495fc69a15089da614e84af561f /include
parentb71f9dca89013b8b100006029c98d04b495ebdf7 (diff)
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dm: x86: baytrail: Correct PCI region 3 when driver model is used
Commit afbbd413a fixed this for non-driver-model. Make sure that the driver model code handles this also. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-generic/global_data.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 6747619b1c..db0550b67c 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -93,6 +93,7 @@ typedef struct global_data {
#endif
#ifdef CONFIG_PCI
struct pci_controller *hose; /* PCI hose for early use */
+ phys_addr_t pci_ram_top; /* top of region accessible to PCI */
#endif
#ifdef CONFIG_PCI_BOOTDELAY
int pcidelay_done;
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