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authorTom Rini <trini@konsulko.com>2015-07-15 10:41:20 -0400
committerTom Rini <trini@konsulko.com>2015-07-15 10:41:20 -0400
commit605e15db2b54302364a2528d3c6604fbc57be846 (patch)
tree1a1e344964bff1719939183124d66a71e7ca7731 /include
parent4905dfc65d9a17083727865302d2cf633c15c911 (diff)
parentf110da9984c0aa0aba9e1c4178b67b7abecf7e8d (diff)
downloadtalos-obmc-uboot-605e15db2b54302364a2528d3c6604fbc57be846.tar.gz
talos-obmc-uboot-605e15db2b54302364a2528d3c6604fbc57be846.zip
Merge git://git.denx.de/u-boot-x86
Diffstat (limited to 'include')
-rw-r--r--include/asm-generic/global_data.h1
-rw-r--r--include/configs/crownbay.h14
-rw-r--r--include/configs/minnowmax.h9
-rw-r--r--include/configs/x86-chromebook.h3
-rw-r--r--include/cpu.h16
-rw-r--r--include/pci.h19
-rw-r--r--include/vbe.h4
7 files changed, 39 insertions, 27 deletions
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 6747619b1c..db0550b67c 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -93,6 +93,7 @@ typedef struct global_data {
#endif
#ifdef CONFIG_PCI
struct pci_controller *hose; /* PCI hose for early use */
+ phys_addr_t pci_ram_top; /* top of region accessible to PCI */
#endif
#ifdef CONFIG_PCI_BOOTDELAY
int pcidelay_done;
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index 0e1f0467c7..6cf53a3e42 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -32,15 +32,16 @@
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0xe000
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
#define CONFIG_SYS_EARLY_PCI_INIT
#define CONFIG_PCI_PNP
#define CONFIG_E1000
-#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
- "stdout=serial\0" \
- "stderr=serial\0"
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga,usbkbd\0" \
+ "stdout=serial,vga\0" \
+ "stderr=serial,vga\0"
-#define CONFIG_SCSI_DEV_LIST \
+#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
#define CONFIG_SPI_FLASH_SST
@@ -55,9 +56,8 @@
#define CONFIG_PCH_GBE
#define CONFIG_PHYLIB
-/* Video is not supported */
-#undef CONFIG_VIDEO
-#undef CONFIG_CFB_CONSOLE
+/* TunnelCreek IGD support */
+#define CONFIG_VGA_AS_SINGLE_DEVICE
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 547765d137..af36ac5caf 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -32,6 +32,7 @@
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0xe000
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
#define CONFIG_SYS_EARLY_PCI_INIT
#define CONFIG_PCI_PNP
#define CONFIG_RTL8169
@@ -52,9 +53,6 @@
#undef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_X86_OPTION_ROM_FILE vga.bin
-#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000
-
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
#define CONFIG_VGA_AS_SINGLE_DEVICE
@@ -65,8 +63,7 @@
/* Avoid a warning in the Realtek Ethernet driver */
#define CONFIG_SYS_CACHELINE_SIZE 16
-/* Environment in SPI flash is unsupported for now */
-#undef CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SECT_SIZE 0x1000
+#define CONFIG_ENV_OFFSET 0x007fe000
#endif /* __CONFIG_H */
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index e0e7fca9f8..408cbb1957 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -26,9 +26,6 @@
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}
-#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin
-#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000
-
#define CONFIG_PCI_MEM_BUS 0xe0000000
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
#define CONFIG_PCI_MEM_SIZE 0x10000000
diff --git a/include/cpu.h b/include/cpu.h
index 34c60bcbaa..bfb0db2e2c 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -58,6 +58,14 @@ struct cpu_ops {
* @return 0 if OK, -ve on error
*/
int (*get_info)(struct udevice *dev, struct cpu_info *info);
+
+ /**
+ * get_count() - Get number of CPUs
+ *
+ * @dev: Device to check (UCLASS_CPU)
+ * @return CPU count if OK, -ve on error
+ */
+ int (*get_count)(struct udevice *dev);
};
#define cpu_get_ops(dev) ((struct cpu_ops *)(dev)->driver->ops)
@@ -81,4 +89,12 @@ int cpu_get_desc(struct udevice *dev, char *buf, int size);
*/
int cpu_get_info(struct udevice *dev, struct cpu_info *info);
+/**
+ * cpu_get_count() - Get number of CPUs
+ *
+ * @dev: Device to check (UCLASS_CPU)
+ * @return CPU count if OK, -ve on error
+ */
+int cpu_get_count(struct udevice *dev);
+
#endif
diff --git a/include/pci.h b/include/pci.h
index 07b1e9a4f5..542e68bceb 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -513,6 +513,16 @@ struct pci_controller {
int indirect_type;
+ /*
+ * TODO(sjg@chromium.org): With driver model we use struct
+ * pci_controller for both the controller and any bridge devices
+ * attached to it. But there is only one region list and it is in the
+ * top-level controller.
+ *
+ * This could be changed so that struct pci_controller is only used
+ * for PCI controllers and a separate UCLASS (or perhaps
+ * UCLASS_PCI_GENERIC) is used for bridges.
+ */
struct pci_region regions[MAX_PCI_REGIONS];
int region_count;
@@ -712,15 +722,6 @@ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum);
/**
- * pciauto_setup_rom() - Set up access to a device ROM
- *
- * @hose: PCI hose to use
- * @dev: PCI device to adjust
- * @return 0 if done, -ve on error
- */
-int pciauto_setup_rom(struct pci_controller *hose, pci_dev_t dev);
-
-/**
* pci_hose_find_devices() - Find devices by vendor/device ID
*
* @hose: PCI hose to search
diff --git a/include/vbe.h b/include/vbe.h
index c5deee9eca..1a86db886a 100644
--- a/include/vbe.h
+++ b/include/vbe.h
@@ -12,7 +12,7 @@
#define _VBE_H
/* these structs are for input from and output to OF */
-struct __packed screen_info {
+struct __packed vbe_screen_info {
u8 display_type; /* 0=NONE, 1= analog, 2=digital */
u16 screen_width;
u16 screen_height;
@@ -23,7 +23,7 @@ struct __packed screen_info {
u8 edid_block_zero[128];
};
-struct __packed screen_info_input {
+struct __packed vbe_screen_info_input {
u8 signature[4];
u16 size_reserved;
u8 monitor_number;
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