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authorŁukasz Majewski <l.majewski@samsung.com>2011-10-17 01:42:23 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-11-03 22:56:21 +0100
commit7cb54948ae399042b70bec7870d26a24249461ea (patch)
treef5f324ed114a5d46bc20b8d46f85e526d11b826a /include
parent9b3ab1c9758affc4203444c2231169a044d0c5fd (diff)
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talos-obmc-uboot-7cb54948ae399042b70bec7870d26a24249461ea.zip
dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target
Define the D-cache line size for S5PC110 GONI reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Anton Staaf <robotboy@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/s5p_goni.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index a52b0a561b..3434de7f77 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -220,6 +220,8 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
#define CONFIG_PMIC
#define CONFIG_PMIC_I2C
#define CONFIG_PMIC_MAX8998
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