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authorTom Rini <trini@konsulko.com>2015-08-05 14:12:37 -0400
committerTom Rini <trini@konsulko.com>2015-08-05 14:12:37 -0400
commit1a2728ae4faf12874173de156b8a7e66cfbbeae5 (patch)
tree9aba8e6c915b341df8ec6077d8ecb28f1eb32b0b /include/configs
parentdcc7dbc73169bb4e39f27c1d95bbf031ccfc1744 (diff)
parent12c7510f17ff29190e52336910e43a50c0d620a6 (diff)
downloadtalos-obmc-uboot-1a2728ae4faf12874173de156b8a7e66cfbbeae5.tar.gz
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Merge git://git.denx.de/u-boot-x86
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/bayleybay.h44
-rw-r--r--include/configs/crownbay.h1
-rw-r--r--include/configs/efi-x86.h34
-rw-r--r--include/configs/galileo.h2
-rw-r--r--include/configs/minnowmax.h14
-rw-r--r--include/configs/qemu-x86.h2
-rw-r--r--include/configs/x86-chromebook.h6
7 files changed, 78 insertions, 25 deletions
diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h
new file mode 100644
index 0000000000..ecda4bae08
--- /dev/null
+++ b/include/configs/bayleybay.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+#define CONFIG_SYS_MONITOR_LEN (1 << 20)
+#define CONFIG_ARCH_MISC_INIT
+
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
+#define CONFIG_SYS_EARLY_PCI_INIT
+#define CONFIG_PCI_PNP
+#define CONFIG_E1000
+
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga,usbkbd\0" \
+ "stdout=serial,vga\0" \
+ "stderr=serial,vga\0"
+
+#define CONFIG_SCSI_DEV_LIST \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}
+
+#define CONFIG_MMC
+#define CONFIG_SDHCI
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC_SDMA
+#define CONFIG_CMD_MMC
+
+/* BayTrail IGD support */
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+
+/* Environment configuration */
+#define CONFIG_ENV_SECT_SIZE 0x1000
+#define CONFIG_ENV_OFFSET 0x006ff000
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index 6cf53a3e42..1ea320bcb5 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -17,7 +17,6 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
-#define CONFIG_X86_SERIAL
#define CONFIG_SMSC_LPC47M
#define CONFIG_PCI_MEM_BUS 0x40000000
diff --git a/include/configs/efi-x86.h b/include/configs/efi-x86.h
new file mode 100644
index 0000000000..5779cfdb66
--- /dev/null
+++ b/include/configs/efi-x86.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+#undef CONFIG_CMD_SF_TEST
+
+#undef CONFIG_TPM
+#undef CONFIG_TPM_TIS_LPC
+#undef CONFIG_TPM_TIS_BASE_ADDRESS
+
+#undef CONFIG_CMD_IMLS
+
+#undef CONFIG_SYS_NS16550
+#undef CONFIG_X86_SERIAL
+#undef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_IS_NOWHERE
+#undef CONFIG_VIDEO
+#undef CONFIG_CFB_CONSOLE
+#undef CONFIG_SCSI_AHCI
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_INTEL_ICH6_GPIO
+
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
+ "stdout=vga,serial\0" \
+ "stderr=vga,serial\0"
+
+#endif
diff --git a/include/configs/galileo.h b/include/configs/galileo.h
index fd89bf30ef..3c3c6e9d54 100644
--- a/include/configs/galileo.h
+++ b/include/configs/galileo.h
@@ -17,8 +17,6 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
-#define CONFIG_X86_SERIAL
-
/* ns16550 UART is memory-mapped in Quark SoC */
#undef CONFIG_SYS_NS16550_PORT_MAPPED
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 4781e792f9..2a40d1f947 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -14,24 +14,10 @@
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
-#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_EARLY_INIT_R
-#define CONFIG_X86_SERIAL
#define CONFIG_SMSC_LPC47M
-#define CONFIG_PCI_MEM_BUS 0xd0000000
-#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
-#define CONFIG_PCI_MEM_SIZE 0x10000000
-
-#define CONFIG_PCI_PREF_BUS 0xc0000000
-#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
-#define CONFIG_PCI_PREF_SIZE 0x10000000
-
-#define CONFIG_PCI_IO_BUS 0x2000
-#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
-#define CONFIG_PCI_IO_SIZE 0xe000
-
#define CONFIG_PCI_CONFIG_HOST_BRIDGE
#define CONFIG_SYS_EARLY_PCI_INIT
#define CONFIG_PCI_PNP
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
index 78c296f5ad..c25e331579 100644
--- a/include/configs/qemu-x86.h
+++ b/include/configs/qemu-x86.h
@@ -16,8 +16,6 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_ARCH_MISC_INIT
-#define CONFIG_X86_SERIAL
-
#define CONFIG_PCI_MEM_BUS 0xc0000000
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
#define CONFIG_PCI_MEM_SIZE 0x10000000
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index 408cbb1957..2be885079e 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -10,15 +10,12 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
-#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_X86_MRC_ADDR 0xfffa0000
#define CONFIG_CACHE_MRC_SIZE_KB 512
-#define CONFIG_X86_SERIAL
-
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
@@ -45,9 +42,6 @@
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
-#define CONFIG_CROS_EC
-#define CONFIG_CROS_EC_LPC
-#define CONFIG_CMD_CROS_EC
#define CONFIG_ARCH_EARLY_INIT_R
#undef CONFIG_ENV_IS_NOWHERE
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