summaryrefslogtreecommitdiffstats
path: root/include/configs/mx53loco.h
diff options
context:
space:
mode:
authorMarek Vasut <marex@denx.de>2014-03-28 08:30:59 +0100
committerStefano Babic <sbabic@denx.de>2014-03-31 18:28:51 +0200
commit31c832f93c6d6c8febe010e1dafd3041b5359765 (patch)
tree421dff6bcbfd9bcc9386748c7e05ec54507ed2b4 /include/configs/mx53loco.h
parentf79a023f411882d160df57b45709a7652e8c241e (diff)
downloadtalos-obmc-uboot-31c832f93c6d6c8febe010e1dafd3041b5359765.tar.gz
talos-obmc-uboot-31c832f93c6d6c8febe010e1dafd3041b5359765.zip
arm: mx5: Avoid hardcoding memory sizes on MX53QSB
The DRAM size can be easily detected at runtime on i.MX53. Implement such detection on MX53QSB and adjust the rest of the macros accordingly to use the detected values. An important thing to note here is that we had to override the function for trimming the effective DRAM address, get_effective_memsize(). That is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of the available DRAM and we don't have gd->bd->bi_dram[0].size set up at the time the function is called, thus we cannot put this into the macro CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the size of the first DRAM block which we just detected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs/mx53loco.h')
-rw-r--r--include/configs/mx53loco.h12
1 files changed, 5 insertions, 7 deletions
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 5bbac0dfd8..4ca5bef9fc 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -193,13 +193,11 @@
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
-#define PHYS_SDRAM_2 CSD1_BASE_ADDR
-#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
-#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
-#define CONFIG_VERY_BIG_RAM
-#define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_1_SIZE
+#define PHYS_SDRAM_1 CSD0_BASE_ADDR
+#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
+#define PHYS_SDRAM_2 CSD1_BASE_ADDR
+#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
+#define PHYS_SDRAM_SIZE (gd->ram_size)
#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
OpenPOWER on IntegriCloud