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authorStefan Roese <sr@denx.de>2015-11-19 07:46:15 +0100
committerStefan Roese <sr@denx.de>2016-01-14 14:08:59 +0100
commite3b9c98a23ca999a80d7f1dfdba17b52f91f41d0 (patch)
treeba2bb6a49b189366b06328ccc6771bbc70c8ed60 /include/configs/maxbcm.h
parent202ededd96344642fc854f35d71be37be6db3816 (diff)
downloadtalos-obmc-uboot-e3b9c98a23ca999a80d7f1dfdba17b52f91f41d0.tar.gz
talos-obmc-uboot-e3b9c98a23ca999a80d7f1dfdba17b52f91f41d0.zip
net: mvneta: Convert to driver model
Update this driver to support driver model. As all MVEBU boards using this driver are converted with this patch, the non-driver-model code can be removed completely. This is also the reason why this patch is quite big and includes a) the driver change and b) the platform change. As its not git-bisect save otherwise. With this conversion, some parameters are now extracted from the DT instread of using the config header defines. The supported properties right now are: PHY-mode ("phy-mode") and PHY-address ("reg"). The base addresses for the ethernet controllers can be removed from the header files as well. Please note that this patch also removes the E1000 network driver from some MVEBU config headers. This is necessary, as with DM_ETH configured and the e1000 driver enabled, the PCI driver also needs to support DM. But the MVEBU PCI(e) driver still needs to get ported to DM. When this is done, the E1000 driver can be enabled again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/maxbcm.h')
-rw-r--r--include/configs/maxbcm.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index 682ce765f7..ada5267d34 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -55,10 +55,7 @@
#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
#define CONFIG_PHY_MARVELL /* there is a marvell phy */
-#define CONFIG_PHY_ADDR { 0x0, 0x1, 0x2, 0x3 }
-#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
-#define CONFIG_RESET_PHY_R
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
#define CONFIG_SYS_ALT_MEMTEST
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