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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-16 21:30:44 +0200 |
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| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-16 21:30:44 +0200 |
| commit | dc39ae9513c32dfeb9e018dc0d22c6484514fefb (patch) | |
| tree | 136c61b2c9731ddf51ef3e222bbf1e44781c5175 /include/configs/at91sam9rlek.h | |
| parent | f75a729b5c1434d5a5bbf453b1b699bf1c3ffbce (diff) | |
| download | talos-obmc-uboot-dc39ae9513c32dfeb9e018dc0d22c6484514fefb.tar.gz talos-obmc-uboot-dc39ae9513c32dfeb9e018dc0d22c6484514fefb.zip | |
at91sam9/at91cap: improve clock framework
calculate dynamically the clock rate and pllb setting for usb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/at91sam9rlek.h')
| -rw-r--r-- | include/configs/at91sam9rlek.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index fec48b6b26..2ccf9587a6 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -30,15 +30,12 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9RL" #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral */ -#define AT91_CPU_CLOCK 200000000 /* cpu */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/ #define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */ +#define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
