Merge git://git.denx.de/u-boot-x86

12 files changed, 314 insertions, 963 deletions

diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 8697da4262..f161c01c67 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -6,7 +6,6 @@
 #
 
 obj-$(CONFIG_SCSI_AHCI) += ahci.o
-obj-$(CONFIG_ATA_PIIX) += ata_piix.o
 obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
 obj-$(CONFIG_FSL_SATA) += fsl_sata.o
 obj-$(CONFIG_IDE_FTIDE020) += ftide020.o
diff --git a/drivers/block/ata_piix.c b/drivers/block/ata_piix.c
deleted file mode 100644
index 30426842cc..0000000000
--- a/drivers/block/ata_piix.c
+++ /dev/null
@@ -1,717 +0,0 @@
-/*
- * Copyright (C) Procsys. All rights reserved.
- * Author: Mushtaq Khan <mushtaq_k@procsys.com>
- *			<mushtaqk_921@yahoo.co.in>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * with the reference to ata_piix driver in kernel 2.4.32
- */
-
-/*
- * This file contains SATA controller and SATA drive initialization functions
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <command.h>
-#include <config.h>
-#include <asm/byteorder.h>
-#include <part.h>
-#include <ide.h>
-#include <ata.h>
-#include <sata.h>
-
-#define DEBUG_SATA 0		/* For debug prints set DEBUG_SATA to 1 */
-
-#define SATA_DECL
-#define DRV_DECL		/* For file specific declarations */
-#include "ata_piix.h"
-
-/* Macros realted to PCI */
-#define PCI_SATA_BUS	0x00
-#define PCI_SATA_DEV	0x1f
-#define PCI_SATA_FUNC	0x02
-
-#define PCI_SATA_BASE1 0x10
-#define PCI_SATA_BASE2 0x14
-#define PCI_SATA_BASE3 0x18
-#define PCI_SATA_BASE4 0x1c
-#define PCI_SATA_BASE5 0x20
-#define PCI_PMR         0x90
-#define PCI_PI          0x09
-#define PCI_PCS         0x92
-#define PCI_DMA_CTL     0x48
-
-#define PORT_PRESENT (1<<0)
-#define PORT_ENABLED (1<<4)
-
-u32 bdf;
-u32 iobase1;		/* Primary cmd block */
-u32 iobase2;		/* Primary ctl block */
-u32 iobase3;		/* Sec cmd block */
-u32 iobase4;		/* sec ctl block */
-u32 iobase5;		/* BMDMA*/
-
-int pci_sata_init(void)
-{
-	u32 bus = PCI_SATA_BUS;
-	u32 dev = PCI_SATA_DEV;
-	u32 fun = PCI_SATA_FUNC;
-	u16 cmd = 0;
-	u8 lat = 0, pcibios_max_latency = 0xff;
-	u8 pmr; /* Port mapping reg */
-	u8 pi; /* Prgming Interface reg */
-
-	bdf = PCI_BDF(bus, dev, fun);
-	pci_read_config_dword(bdf, PCI_SATA_BASE1, &iobase1);
-	pci_read_config_dword(bdf, PCI_SATA_BASE2, &iobase2);
-	pci_read_config_dword(bdf, PCI_SATA_BASE3, &iobase3);
-	pci_read_config_dword(bdf, PCI_SATA_BASE4, &iobase4);
-	pci_read_config_dword(bdf, PCI_SATA_BASE5, &iobase5);
-
-	if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) ||
-	    (iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) ||
-	    (iobase5 == 0xFFFFFFFF)) {
-		/* ERROR */
-		printf("error no base addr for SATA controller\n");
-		return 1;
-	}
-
-	iobase1 &= 0xFFFFFFFE;
-	iobase2 &= 0xFFFFFFFE;
-	iobase3 &= 0xFFFFFFFE;
-	iobase4 &= 0xFFFFFFFE;
-	iobase5 &= 0xFFFFFFFE;
-
-	/* check for mode */
-	pci_read_config_byte(bdf, PCI_PMR, &pmr);
-	if (pmr > 1) {
-		puts("combined mode not supported\n");
-		return 1;
-	}
-
-	pci_read_config_byte(bdf, PCI_PI, &pi);
-	if ((pi & 0x05) != 0x05) {
-		puts("Sata is in Legacy mode\n");
-		return 1;
-	} else
-		puts("sata is in Native mode\n");
-
-	/* MASTER CFG AND IO CFG */
-	pci_read_config_word(bdf, PCI_COMMAND, &cmd);
-	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO;
-	pci_write_config_word(bdf, PCI_COMMAND, cmd);
-	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-
-	if (lat < 16)
-		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-	else if (lat > pcibios_max_latency)
-		lat = pcibios_max_latency;
-	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-
-	return 0;
-}
-
-int sata_bus_probe(int port_no)
-{
-	int orig_mask, mask;
-	u16 pcs;
-
-	mask = (PORT_PRESENT << port_no);
-	pci_read_config_word(bdf, PCI_PCS, &pcs);
-	orig_mask = (int) pcs & 0xff;
-	if ((orig_mask & mask) != mask)
-		return 0;
-	else
-		return 1;
-}
-
-int init_sata(int dev)
-{
-	static int done;
-	u8 i, rv = 0;
-
-	if (!done)
-		done = 1;
-	else
-		return 0;
-
-	rv = pci_sata_init();
-	if (rv == 1) {
-		puts("pci initialization failed\n");
-		return 1;
-	}
-
-	port[0].port_no = 0;
-	port[0].ioaddr.cmd_addr = iobase1;
-	port[0].ioaddr.altstatus_addr = port[0].ioaddr.ctl_addr =
-	    iobase2 | ATA_PCI_CTL_OFS;
-	port[0].ioaddr.bmdma_addr = iobase5;
-
-	port[1].port_no = 1;
-	port[1].ioaddr.cmd_addr = iobase3;
-	port[1].ioaddr.altstatus_addr = port[1].ioaddr.ctl_addr =
-	    iobase4 | ATA_PCI_CTL_OFS;
-	port[1].ioaddr.bmdma_addr = iobase5 + 0x8;
-
-	for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++)
-		sata_port(&port[i].ioaddr);
-
-	for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) {
-		if (!(sata_bus_probe(i))) {
-			port[i].port_state = 0;
-			printf("SATA#%d port is not present\n", i);
-		} else {
-			printf("SATA#%d port is present\n", i);
-			if (sata_bus_softreset(i))
-				port[i].port_state = 0;
-			else
-				port[i].port_state = 1;
-		}
-	}
-
-	for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) {
-		u8 j, devno;
-
-		if (port[i].port_state == 0)
-			continue;
-		for (j = 0; j < CONFIG_SYS_SATA_DEVS_PER_BUS; j++) {
-			sata_identify(i, j);
-			set_Feature_cmd(i, j);
-			devno = i * CONFIG_SYS_SATA_DEVS_PER_BUS + j;
-			if ((sata_dev_desc[devno].lba > 0) &&
-			    (sata_dev_desc[devno].blksz > 0)) {
-				dev_print(&sata_dev_desc[devno]);
-				/* initialize partition type */
-				init_part(&sata_dev_desc[devno]);
-			}
-		}
-	}
-	return 0;
-}
-
-int reset_sata(int dev)
-{
-	return 0;
-}
-
-static inline u8 sata_inb(unsigned long ioaddr)
-{
-	return inb(ioaddr);
-}
-
-static inline void sata_outb(unsigned char val, unsigned long ioaddr)
-{
-	outb(val, ioaddr);
-}
-
-static void output_data(struct sata_ioports *ioaddr, ulong * sect_buf,
-		int words)
-{
-	outsw(ioaddr->data_addr, sect_buf, words << 1);
-}
-
-static int input_data(struct sata_ioports *ioaddr, ulong * sect_buf, int words)
-{
-	insw(ioaddr->data_addr, sect_buf, words << 1);
-	return 0;
-}
-
-static void sata_cpy(unsigned char *dst, unsigned char *src, unsigned int len)
-{
-	unsigned char *end, *last;
-
-	last = dst;
-	end = src + len - 1;
-
-	/* reserve space for '\0' */
-	if (len < 2)
-		goto OUT;
-
-	/* skip leading white space */
-	while ((*src) && (src < end) && (*src == ' '))
-		++src;
-
-	/* copy string, omitting trailing white space */
-	while ((*src) && (src < end)) {
-		*dst++ = *src;
-		if (*src++ != ' ')
-			last = dst;
-	}
-OUT:
-	*last = '\0';
-}
-
-int sata_bus_softreset(int num)
-{
-	u8 dev = 0, status = 0, i;
-
-	port[num].dev_mask = 0;
-
-	for (i = 0; i < CONFIG_SYS_SATA_DEVS_PER_BUS; i++) {
-		if (!(sata_devchk(&port[num].ioaddr, i))) {
-			debug("dev_chk failed for dev#%d\n", i);
-		} else {
-			port[num].dev_mask |= (1 << i);
-			debug("dev_chk passed for dev#%d\n", i);
-		}
-	}
-
-	if (!(port[num].dev_mask)) {
-		printf("no devices on port%d\n", num);
-		return 1;
-	}
-
-	dev_select(&port[num].ioaddr, dev);
-
-	port[num].ctl_reg = 0x08;	/* Default value of control reg */
-	sata_outb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
-	udelay(10);
-	sata_outb(port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
-	udelay(10);
-	sata_outb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
-
-	/*
-	 * spec mandates ">= 2ms" before checking status.
-	 * We wait 150ms, because that was the magic delay used for
-	 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
-	 * between when the ATA command register is written, and then
-	 * status is checked.  Because waiting for "a while" before
-	 * checking status is fine, post SRST, we perform this magic
-	 * delay here as well.
-	 */
-	mdelay(150);
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 300);
-	while ((status & ATA_BUSY)) {
-		mdelay(100);
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 3);
-	}
-
-	if (status & ATA_BUSY)
-		printf("ata%u is slow to respond,plz be patient\n", num);
-
-	while ((status & ATA_BUSY)) {
-		mdelay(100);
-		status = sata_chk_status(&port[num].ioaddr);
-	}
-
-	if (status & ATA_BUSY) {
-		printf("ata%u failed to respond : bus reset failed\n", num);
-		return 1;
-	}
-	return 0;
-}
-
-void sata_identify(int num, int dev)
-{
-	u8 cmd = 0, status = 0;
-	u8 devno = num * CONFIG_SYS_SATA_DEVS_PER_BUS + dev;
-	u16 iobuf[ATA_SECT_SIZE];
-	u64 n_sectors = 0;
-	u8 mask = 0;
-
-	memset(iobuf, 0, sizeof(iobuf));
-	hd_driveid_t *iop = (hd_driveid_t *) iobuf;
-
-	if (dev == 0)
-		mask = 0x01;
-	else
-		mask = 0x02;
-
-	if (!(port[num].dev_mask & mask)) {
-		printf("dev%d is not present on port#%d\n", dev, num);
-		return;
-	}
-
-	printf("port=%d dev=%d\n", num, dev);
-
-	dev_select(&port[num].ioaddr, dev);
-
-	status = 0;
-	cmd = ATA_CMD_IDENT;	/* Device Identify Command */
-	sata_outb(cmd, port[num].ioaddr.command_addr);
-	sata_inb(port[num].ioaddr.altstatus_addr);
-	udelay(10);
-
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 1000);
-	if (status & ATA_ERR) {
-		puts("\ndevice not responding\n");
-		port[num].dev_mask &= ~mask;
-		return;
-	}
-
-	input_data(&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS);
-
-	debug("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x"
-		"86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49],
-		iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86],
-		iobuf[87], iobuf[88]);
-
-	/* we require LBA and DMA support (bits 8 & 9 of word 49) */
-	if (!ata_id_has_dma(iobuf) || !ata_id_has_lba(iobuf))
-		debug("ata%u: no dma/lba\n", num);
-	ata_dump_id(iobuf);
-
-	if (ata_id_has_lba48(iobuf))
-		n_sectors = ata_id_u64(iobuf, 100);
-	else
-		n_sectors = ata_id_u32(iobuf, 60);
-	debug("no. of sectors %u\n", ata_id_u64(iobuf, 100));
-	debug("no. of sectors %u\n", ata_id_u32(iobuf, 60));
-
-	if (n_sectors == 0) {
-		port[num].dev_mask &= ~mask;
-		return;
-	}
-
-	sata_cpy((unsigned char *)sata_dev_desc[devno].revision, iop->fw_rev,
-		  sizeof(sata_dev_desc[devno].revision));
-	sata_cpy((unsigned char *)sata_dev_desc[devno].vendor, iop->model,
-		  sizeof(sata_dev_desc[devno].vendor));
-	sata_cpy((unsigned char *)sata_dev_desc[devno].product, iop->serial_no,
-		  sizeof(sata_dev_desc[devno].product));
-	strswab(sata_dev_desc[devno].revision);
-	strswab(sata_dev_desc[devno].vendor);
-
-	if ((iop->config & 0x0080) == 0x0080)
-		sata_dev_desc[devno].removable = 1;
-	else
-		sata_dev_desc[devno].removable = 0;
-
-	sata_dev_desc[devno].lba = iop->lba_capacity;
-	debug("lba=0x%x", sata_dev_desc[devno].lba);
-
-#ifdef CONFIG_LBA48
-	if (iop->command_set_2 & 0x0400) {
-		sata_dev_desc[devno].lba48 = 1;
-		lba = (unsigned long long) iop->lba48_capacity[0] |
-		    ((unsigned long long) iop->lba48_capacity[1] << 16) |
-		    ((unsigned long long) iop->lba48_capacity[2] << 32) |
-		    ((unsigned long long) iop->lba48_capacity[3] << 48);
-	} else {
-		sata_dev_desc[devno].lba48 = 0;
-	}
-#endif
-
-	/* assuming HD */
-	sata_dev_desc[devno].type = DEV_TYPE_HARDDISK;
-	sata_dev_desc[devno].blksz = ATA_BLOCKSIZE;
-	sata_dev_desc[devno].log2blksz = LOG2(sata_dev_desc[devno].blksz);
-	sata_dev_desc[devno].lun = 0;	/* just to fill something in... */
-}
-
-void set_Feature_cmd(int num, int dev)
-{
-	u8 mask = 0x00, status = 0;
-
-	if (dev == 0)
-		mask = 0x01;
-	else
-		mask = 0x02;
-
-	if (!(port[num].dev_mask & mask)) {
-		debug("dev%d is not present on port#%d\n", dev, num);
-		return;
-	}
-
-	dev_select(&port[num].ioaddr, dev);
-
-	sata_outb(SETFEATURES_XFER, port[num].ioaddr.feature_addr);
-	sata_outb(XFER_PIO_4, port[num].ioaddr.nsect_addr);
-	sata_outb(0, port[num].ioaddr.lbal_addr);
-	sata_outb(0, port[num].ioaddr.lbam_addr);
-	sata_outb(0, port[num].ioaddr.lbah_addr);
-
-	sata_outb(ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
-	sata_outb(ATA_CMD_SETF, port[num].ioaddr.command_addr);
-
-	udelay(50);
-	mdelay(150);
-
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 5000);
-	if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) {
-		printf("Error  : status 0x%02x\n", status);
-		port[num].dev_mask &= ~mask;
-	}
-}
-
-void sata_port(struct sata_ioports *ioport)
-{
-	ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
-	ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
-	ioport->feature_addr = ioport->cmd_addr + ATA_REG_FEATURE;
-	ioport->nsect_addr = ioport->cmd_addr + ATA_REG_NSECT;
-	ioport->lbal_addr = ioport->cmd_addr + ATA_REG_LBAL;
-	ioport->lbam_addr = ioport->cmd_addr + ATA_REG_LBAM;
-	ioport->lbah_addr = ioport->cmd_addr + ATA_REG_LBAH;
-	ioport->device_addr = ioport->cmd_addr + ATA_REG_DEVICE;
-	ioport->status_addr = ioport->cmd_addr + ATA_REG_STATUS;
-	ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
-}
-
-int sata_devchk(struct sata_ioports *ioaddr, int dev)
-{
-	u8 nsect, lbal;
-
-	dev_select(ioaddr, dev);
-
-	sata_outb(0x55, ioaddr->nsect_addr);
-	sata_outb(0xaa, ioaddr->lbal_addr);
-
-	sata_outb(0xaa, ioaddr->nsect_addr);
-	sata_outb(0x55, ioaddr->lbal_addr);
-
-	sata_outb(0x55, ioaddr->nsect_addr);
-	sata_outb(0xaa, ioaddr->lbal_addr);
-
-	nsect = sata_inb(ioaddr->nsect_addr);
-	lbal = sata_inb(ioaddr->lbal_addr);
-
-	if ((nsect == 0x55) && (lbal == 0xaa))
-		return 1;	/* we found a device */
-	else
-		return 0;	/* nothing found */
-}
-
-void dev_select(struct sata_ioports *ioaddr, int dev)
-{
-	u8 tmp = 0;
-
-	if (dev == 0)
-		tmp = ATA_DEVICE_OBS;
-	else
-		tmp = ATA_DEVICE_OBS | ATA_DEV1;
-
-	sata_outb(tmp, ioaddr->device_addr);
-	sata_inb(ioaddr->altstatus_addr);
-	udelay(5);
-}
-
-u8 sata_busy_wait(struct sata_ioports *ioaddr, int bits, unsigned int max)
-{
-	u8 status;
-
-	do {
-		udelay(1000);
-		status = sata_chk_status(ioaddr);
-		max--;
-	} while ((status & bits) && (max > 0));
-
-	return status;
-}
-
-u8 sata_chk_status(struct sata_ioports *ioaddr)
-{
-	return sata_inb(ioaddr->status_addr);
-}
-
-
-ulong sata_read(int device, ulong blknr, lbaint_t blkcnt, void *buff)
-{
-	ulong n = 0, *buffer = (ulong *)buff;
-	u8 dev = 0, num = 0, mask = 0, status = 0;
-
-#ifdef CONFIG_LBA48
-	unsigned char lba48 = 0;
-
-	if (blknr & 0x0000fffff0000000) {
-		if (!sata_dev_desc[devno].lba48) {
-			printf("Drive doesn't support 48-bit addressing\n");
-			return 0;
-		}
-		/* more than 28 bits used, use 48bit mode */
-		lba48 = 1;
-	}
-#endif
-	/* Port Number */
-	num = device / CONFIG_SYS_SATA_DEVS_PER_BUS;
-	/* dev on the port */
-	if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS)
-		dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS;
-	else
-		dev = device;
-
-	if (dev == 0)
-		mask = 0x01;
-	else
-		mask = 0x02;
-
-	if (!(port[num].dev_mask & mask)) {
-		printf("dev%d is not present on port#%d\n", dev, num);
-		return 0;
-	}
-
-	/* Select device */
-	dev_select(&port[num].ioaddr, dev);
-
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
-	if (status & ATA_BUSY) {
-		printf("ata%u failed to respond\n", port[num].port_no);
-		return n;
-	}
-	while (blkcnt-- > 0) {
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
-		if (status & ATA_BUSY) {
-			printf("ata%u failed to respond\n", 0);
-			return n;
-		}
-#ifdef CONFIG_LBA48
-		if (lba48) {
-			/* write high bits */
-			sata_outb(0, port[num].ioaddr.nsect_addr);
-			sata_outb((blknr >> 24) & 0xFF,
-				   port[num].ioaddr.lbal_addr);
-			sata_outb((blknr >> 32) & 0xFF,
-				   port[num].ioaddr.lbam_addr);
-			sata_outb((blknr >> 40) & 0xFF,
-				   port[num].ioaddr.lbah_addr);
-		}
-#endif
-		sata_outb(1, port[num].ioaddr.nsect_addr);
-		sata_outb(((blknr) >> 0) & 0xFF,
-			   port[num].ioaddr.lbal_addr);
-		sata_outb((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
-		sata_outb((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
-
-#ifdef CONFIG_LBA48
-		if (lba48) {
-			sata_outb(ATA_LBA, port[num].ioaddr.device_addr);
-			sata_outb(ATA_CMD_READ_EXT,
-				   port[num].ioaddr.command_addr);
-		} else
-#endif
-		{
-			sata_outb(ATA_LBA | ((blknr >> 24) & 0xF),
-				   port[num].ioaddr.device_addr);
-			sata_outb(ATA_CMD_READ,
-				   port[num].ioaddr.command_addr);
-		}
-
-		mdelay(50);
-		/* may take up to 4 sec */
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
-
-		if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
-		    != ATA_STAT_DRQ) {
-			u8 err = 0;
-
-			printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
-				device, (ulong) blknr, status);
-			err = sata_inb(port[num].ioaddr.error_addr);
-			printf("Error reg = 0x%x\n", err);
-			return n;
-		}
-		input_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
-		sata_inb(port[num].ioaddr.altstatus_addr);
-		udelay(50);
-
-		++n;
-		++blknr;
-		buffer += ATA_SECTORWORDS;
-	}
-	return n;
-}
-
-ulong sata_write(int device, ulong blknr, lbaint_t blkcnt, const void *buff)
-{
-	ulong n = 0, *buffer = (ulong *)buff;
-	unsigned char status = 0, num = 0, dev = 0, mask = 0;
-
-#ifdef CONFIG_LBA48
-	unsigned char lba48 = 0;
-
-	if (blknr & 0x0000fffff0000000) {
-		if (!sata_dev_desc[devno].lba48) {
-			printf("Drive doesn't support 48-bit addressing\n");
-			return 0;
-		}
-		/* more than 28 bits used, use 48bit mode */
-		lba48 = 1;
-	}
-#endif
-	/* Port Number */
-	num = device / CONFIG_SYS_SATA_DEVS_PER_BUS;
-	/* dev on the Port */
-	if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS)
-		dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS;
-	else
-		dev = device;
-
-	if (dev == 0)
-		mask = 0x01;
-	else
-		mask = 0x02;
-
-	/* Select device */
-	dev_select(&port[num].ioaddr, dev);
-
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
-	if (status & ATA_BUSY) {
-		printf("ata%u failed to respond\n", port[num].port_no);
-		return n;
-	}
-
-	while (blkcnt-- > 0) {
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
-		if (status & ATA_BUSY) {
-			printf("ata%u failed to respond\n",
-				port[num].port_no);
-			return n;
-		}
-#ifdef CONFIG_LBA48
-		if (lba48) {
-			/* write high bits */
-			sata_outb(0, port[num].ioaddr.nsect_addr);
-			sata_outb((blknr >> 24) & 0xFF,
-				   port[num].ioaddr.lbal_addr);
-			sata_outb((blknr >> 32) & 0xFF,
-				   port[num].ioaddr.lbam_addr);
-			sata_outb((blknr >> 40) & 0xFF,
-				   port[num].ioaddr.lbah_addr);
-		}
-#endif
-		sata_outb(1, port[num].ioaddr.nsect_addr);
-		sata_outb((blknr >> 0) & 0xFF, port[num].ioaddr.lbal_addr);
-		sata_outb((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
-		sata_outb((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
-#ifdef CONFIG_LBA48
-		if (lba48) {
-			sata_outb(ATA_LBA, port[num].ioaddr.device_addr);
-			sata_outb(ATA_CMD_WRITE_EXT,
-				   port[num].ioaddr.command_addr);
-		} else
-#endif
-		{
-			sata_outb(ATA_LBA | ((blknr >> 24) & 0xF),
-				   port[num].ioaddr.device_addr);
-			sata_outb(ATA_CMD_WRITE,
-				   port[num].ioaddr.command_addr);
-		}
-
-		mdelay(50);
-		/* may take up to 4 sec */
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
-		if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
-		    != ATA_STAT_DRQ) {
-			printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
-				device, (ulong) blknr, status);
-			return n;
-		}
-
-		output_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
-		sata_inb(port[num].ioaddr.altstatus_addr);
-		udelay(50);
-
-		++n;
-		++blknr;
-		buffer += ATA_SECTORWORDS;
-	}
-	return n;
-}
-
-int scan_sata(int dev)
-{
-	return 0;
-}
diff --git a/drivers/block/ata_piix.h b/drivers/block/ata_piix.h
deleted file mode 100644
index 6c68ea2f01..0000000000
--- a/drivers/block/ata_piix.h
+++ /dev/null
@@ -1,71 +0,0 @@
-#ifndef __ATA_PIIX_H__
-#define __ATA_PIIX_H__
-
-struct sata_ioports {
-	unsigned long cmd_addr;
-	unsigned long data_addr;
-	unsigned long error_addr;
-	unsigned long feature_addr;
-	unsigned long nsect_addr;
-	unsigned long lbal_addr;
-	unsigned long lbam_addr;
-	unsigned long lbah_addr;
-	unsigned long device_addr;
-	unsigned long status_addr;
-	unsigned long command_addr;
-	unsigned long altstatus_addr;
-	unsigned long ctl_addr;
-	unsigned long bmdma_addr;
-	unsigned long scr_addr;
-};
-
-struct sata_port {
-	unsigned char port_no;		/* primary=0, secondary=1	*/
-	struct sata_ioports ioaddr;	/* ATA cmd/ctl/dma reg blks	*/
-	unsigned char ctl_reg;
-	unsigned char last_ctl;
-	unsigned char port_state;	/* 1-port is available and	*/
-					/* 0-port is not available	*/
-	unsigned char dev_mask;
-};
-
-/***********SATA LIBRARY SPECIFIC DEFINITIONS AND DECLARATIONS**************/
-#ifdef SATA_DECL		/* SATA library specific declarations */
-inline void ata_dump_id(u16 *id)
-{
-	debug("49 = 0x%04x  "
-		"53 = 0x%04x  "
-		"63 = 0x%04x  "
-		"64 = 0x%04x  "
-		"75 = 0x%04x\n", id[49], id[53], id[63], id[64], id[75]);
-	debug("80 = 0x%04x  "
-		"81 = 0x%04x  "
-		"82 = 0x%04x  "
-		"83 = 0x%04x  "
-		"84 = 0x%04x\n", id[80], id[81], id[82], id[83], id[84]);
-	debug("88 = 0x%04x  " "93 = 0x%04x\n", id[88], id[93]);
-}
-#endif
-
-#ifdef SATA_DECL		/*SATA library specific declarations */
-int sata_bus_softreset(int num);
-void sata_identify(int num, int dev);
-void sata_port(struct sata_ioports *ioport);
-void set_Feature_cmd(int num, int dev);
-int sata_devchk(struct sata_ioports *ioaddr, int dev);
-void dev_select(struct sata_ioports *ioaddr, int dev);
-u8 sata_busy_wait(struct sata_ioports *ioaddr, int bits, unsigned int max);
-u8 sata_chk_status(struct sata_ioports *ioaddr);
-#endif
-
-/************DRIVER SPECIFIC DEFINITIONS AND DECLARATIONS**************/
-
-#ifdef DRV_DECL			/* Driver specific declaration */
-int init_sata(int dev);
-#endif
-
-#ifdef DRV_DECL			/* Defines Driver Specific variables */
-struct sata_port port[CONFIG_SYS_SATA_MAXBUS];
-#endif
-
-#endif /* __ATA_PIIX_H__ */
diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c
index ab18ee2ea9..7660f99ef5 100644
--- a/drivers/cpu/cpu-uclass.c
+++ b/drivers/cpu/cpu-uclass.c
@@ -8,9 +8,12 @@
 #include <common.h>
 #include <cpu.h>
 #include <dm.h>
+#include <errno.h>
 #include <dm/lists.h>
 #include <dm/root.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int cpu_get_desc(struct udevice *dev, char *buf, int size)
 {
 	struct cpu_ops *ops = cpu_get_ops(dev);
@@ -25,12 +28,22 @@ int cpu_get_info(struct udevice *dev, struct cpu_info *info)
 {
 	struct cpu_ops *ops = cpu_get_ops(dev);
 
-	if (!ops->get_desc)
+	if (!ops->get_info)
 		return -ENOSYS;
 
 	return ops->get_info(dev, info);
 }
 
+int cpu_get_count(struct udevice *dev)
+{
+	struct cpu_ops *ops = cpu_get_ops(dev);
+
+	if (!ops->get_count)
+		return -ENOSYS;
+
+	return ops->get_count(dev);
+}
+
 U_BOOT_DRIVER(cpu_bus) = {
 	.name	= "cpu_bus",
 	.id	= UCLASS_SIMPLE_BUS,
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index de87505466..5b91fe3dce 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -296,6 +296,7 @@ int pci_auto_config_devices(struct udevice *bus)
 	     !ret && dev;
 	     ret = device_find_next_child(&dev)) {
 		struct pci_child_platdata *pplat;
+		struct pci_controller *ctlr_hose;
 
 		pplat = dev_get_parent_platdata(dev);
 		unsigned int max_bus;
@@ -303,7 +304,10 @@ int pci_auto_config_devices(struct udevice *bus)
 
 		bdf = PCI_ADD_BUS(bus->seq, pplat->devfn);
 		debug("%s: device %s\n", __func__, dev->name);
-		max_bus = pciauto_config_device(hose, bdf);
+
+		/* The root controller has the region information */
+		ctlr_hose = hose->ctlr->uclass_priv;
+		max_bus = pciauto_config_device(ctlr_hose, bdf);
 		sub_bus = max(sub_bus, max_bus);
 	}
 	debug("%s: done\n", __func__);
@@ -330,7 +334,7 @@ int dm_pci_hose_probe_bus(struct pci_controller *hose, pci_dev_t bdf)
 
 	sub_bus = pci_get_bus_max() + 1;
 	debug("%s: bus = %d/%s\n", __func__, sub_bus, bus->name);
-	pciauto_prescan_setup_bridge(hose, bdf, bus->seq);
+	pciauto_prescan_setup_bridge(hose, bdf, sub_bus);
 
 	ret = device_probe(bus);
 	if (ret) {
@@ -440,6 +444,7 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
 {
 	int pci_addr_cells, addr_cells, size_cells;
 	int cells_per_record;
+	phys_addr_t addr;
 	const u32 *prop;
 	int len;
 	int i;
@@ -490,8 +495,11 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
 	}
 
 	/* Add a region for our local memory */
-	pci_set_region(hose->regions + hose->region_count++, 0, 0,
-		       gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+	addr = gd->ram_size;
+	if (gd->pci_ram_top && gd->pci_ram_top < addr)
+		addr = gd->pci_ram_top;
+	pci_set_region(hose->regions + hose->region_count++, 0, 0, addr,
+		       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 
 	return 0;
 }
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 7c109832f6..e034ed1715 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -87,6 +87,8 @@ void pciauto_setup_device(struct pci_controller *hose,
 	pci_size_t bar_size;
 	u16 cmdstat = 0;
 	int bar, bar_nr = 0;
+	u8 header_type;
+	int rom_addr;
 #ifndef CONFIG_PCI_ENUM_ONLY
 	pci_addr_t bar_value;
 	struct pci_region *bar_res;
@@ -182,38 +184,32 @@ void pciauto_setup_device(struct pci_controller *hose,
 		bar_nr++;
 	}
 
+	/* Configure the expansion ROM address */
+	pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
+	if (header_type != PCI_HEADER_TYPE_CARDBUS) {
+		rom_addr = (header_type == PCI_HEADER_TYPE_NORMAL) ?
+			   PCI_ROM_ADDRESS : PCI_ROM_ADDRESS1;
+		pci_hose_write_config_dword(hose, dev, rom_addr, 0xfffffffe);
+		pci_hose_read_config_dword(hose, dev, rom_addr, &bar_response);
+		if (bar_response) {
+			bar_size = -(bar_response & ~1);
+			DEBUGF("PCI Autoconfig: ROM, size=%#x, ", bar_size);
+			if (pciauto_region_allocate(mem, bar_size,
+						    &bar_value) == 0) {
+				pci_hose_write_config_dword(hose, dev, rom_addr,
+							    bar_value);
+			}
+			cmdstat |= PCI_COMMAND_MEMORY;
+			DEBUGF("\n");
+		}
+	}
+
 	pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat);
 	pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,
 		CONFIG_SYS_PCI_CACHE_LINE_SIZE);
 	pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
 }
 
-int pciauto_setup_rom(struct pci_controller *hose, pci_dev_t dev)
-{
-	pci_addr_t bar_value;
-	pci_size_t bar_size;
-	u32 bar_response;
-	u16 cmdstat = 0;
-
-	pci_hose_write_config_dword(hose, dev, PCI_ROM_ADDRESS, 0xfffffffe);
-	pci_hose_read_config_dword(hose, dev, PCI_ROM_ADDRESS, &bar_response);
-	if (!bar_response)
-		return -ENOENT;
-
-	bar_size = -(bar_response & ~1);
-	DEBUGF("PCI Autoconfig: ROM, size=%#x, ", bar_size);
-	if (pciauto_region_allocate(hose->pci_mem, bar_size, &bar_value) == 0) {
-		pci_hose_write_config_dword(hose, dev, PCI_ROM_ADDRESS,
-					    bar_value);
-	}
-	DEBUGF("\n");
-	pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
-	cmdstat |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
-	pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat);
-
-	return 0;
-}
-
 void pciauto_prescan_setup_bridge(struct pci_controller *hose,
 					 pci_dev_t dev, int sub_bus)
 {
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c
index b9ff23f35b..f67c9c7b2f 100644
--- a/drivers/pci/pci_common.c
+++ b/drivers/pci/pci_common.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <errno.h>
 #include <pci.h>
 #include <asm/io.h>
@@ -221,6 +222,11 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller *hose,
 		return phys_addr;
 	}
 
+#ifdef CONFIG_DM_PCI
+	/* The root controller has the region information */
+	hose = hose->ctlr->uclass_priv;
+#endif
+
 	/*
 	 * if PCI_REGION_MEM is set we do a two pass search with preference
 	 * on matches that don't have PCI_REGION_SYS_MEMORY set
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 37450c8e31..a33efae263 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -31,6 +31,7 @@
 #include <pci_rom.h>
 #include <vbe.h>
 #include <video_fb.h>
+#include <linux/screen_info.h>
 
 #ifdef CONFIG_HAVE_ACPI_RESUME
 #include <asm/acpi.h>
@@ -79,15 +80,10 @@ static int pci_rom_probe(pci_dev_t dev, uint class,
 	if (vendev != mapped_vendev)
 		debug("Device ID mapped to %#08x\n", mapped_vendev);
 
-#ifdef CONFIG_X86_OPTION_ROM_ADDR
-	rom_address = CONFIG_X86_OPTION_ROM_ADDR;
+#ifdef CONFIG_VGA_BIOS_ADDR
+	rom_address = CONFIG_VGA_BIOS_ADDR;
 #else
 
-	if (pciauto_setup_rom(pci_bus_to_hose(PCI_BUS(dev)), dev)) {
-		debug("Cannot find option ROM\n");
-		return -ENOENT;
-	}
-
 	pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
 	if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
 		debug("%s: rom_address=%x\n", __func__, rom_address);
@@ -108,6 +104,10 @@ static int pci_rom_probe(pci_dev_t dev, uint class,
 	if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
 		printf("Incorrect expansion ROM header signature %04x\n",
 		       le16_to_cpu(rom_header->signature));
+#ifndef CONFIG_VGA_BIOS_ADDR
+		/* Disable expansion ROM address decoding */
+		pci_write_config_dword(dev, PCI_ROM_ADDRESS, rom_address);
+#endif
 		return -EINVAL;
 	}
 
@@ -203,6 +203,7 @@ int vbe_get_video_info(struct graphic_device *gdev)
 	gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
 
 	switch (vesa->bits_per_pixel) {
+	case 32:
 	case 24:
 		gdev->gdfIndex = GDF_32BIT_X888RGB;
 		break;
@@ -229,6 +230,33 @@ int vbe_get_video_info(struct graphic_device *gdev)
 #endif
 }
 
+void setup_video(struct screen_info *screen_info)
+{
+#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
+	struct vesa_mode_info *vesa = &mode_info.vesa;
+
+	screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
+
+	screen_info->lfb_width = vesa->x_resolution;
+	screen_info->lfb_height = vesa->y_resolution;
+	screen_info->lfb_depth = vesa->bits_per_pixel;
+	screen_info->lfb_linelength = vesa->bytes_per_scanline;
+	screen_info->lfb_base = vesa->phys_base_ptr;
+	screen_info->lfb_size =
+		ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
+		      65536);
+	screen_info->lfb_size >>= 16;
+	screen_info->red_size = vesa->red_mask_size;
+	screen_info->red_pos = vesa->red_mask_pos;
+	screen_info->green_size = vesa->green_mask_size;
+	screen_info->green_pos = vesa->green_mask_pos;
+	screen_info->blue_size = vesa->blue_mask_size;
+	screen_info->blue_pos = vesa->blue_mask_pos;
+	screen_info->rsvd_size = vesa->reserved_mask_size;
+	screen_info->rsvd_pos = vesa->reserved_mask_pos;
+#endif
+}
+
 int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), int exec_method)
 {
 	struct pci_rom_header *rom, *ram;
diff --git a/drivers/pci/pci_x86.c b/drivers/pci/pci_x86.c
index 901bdcacce..89e8c119b7 100644
--- a/drivers/pci/pci_x86.c
+++ b/drivers/pci/pci_x86.c
@@ -7,18 +7,21 @@
 #include <common.h>
 #include <dm.h>
 #include <pci.h>
+#include <asm/pci.h>
 
-static const struct dm_pci_ops x86_pci_ops = {
+static const struct dm_pci_ops pci_x86_ops = {
+	.read_config	= pci_x86_read_config,
+	.write_config	= pci_x86_write_config,
 };
 
-static const struct udevice_id x86_pci_ids[] = {
-	{ .compatible = "x86,pci" },
+static const struct udevice_id pci_x86_ids[] = {
+	{ .compatible = "pci-x86" },
 	{ }
 };
 
 U_BOOT_DRIVER(pci_x86) = {
 	.name	= "pci_x86",
 	.id	= UCLASS_PCI,
-	.of_match = x86_pci_ids,
-	.ops	= &x86_pci_ops,
+	.of_match = pci_x86_ids,
+	.ops	= &pci_x86_ops,
 };
diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc146818.c
index 44857a6e41..363ade33e3 100644
--- a/drivers/rtc/mc146818.c
+++ b/drivers/rtc/mc146818.c
@@ -9,10 +9,9 @@
  * Date & Time support for the MC146818 (PIXX4) RTC
  */
 
-/*#define	DEBUG*/
-
 #include <common.h>
 #include <command.h>
+#include <dm.h>
 #include <rtc.h>
 
 #if defined(__I386__) || defined(CONFIG_MALTA)
@@ -24,9 +23,9 @@
 #if defined(CONFIG_CMD_DATE)
 
 /* Set this to 1 to clear the CMOS RAM */
-#define CLEAR_CMOS 0
+#define CLEAR_CMOS		0
 
-#define RTC_PORT_MC146818	CONFIG_SYS_ISA_IO_BASE_ADDRESS +  0x70
+#define RTC_PORT_MC146818	CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70
 #define RTC_SECONDS		0x00
 #define RTC_SECONDS_ALARM	0x01
 #define RTC_MINUTES		0x02
@@ -37,10 +36,10 @@
 #define RTC_DATE_OF_MONTH	0x07
 #define RTC_MONTH		0x08
 #define RTC_YEAR		0x09
-#define RTC_CONFIG_A		0x0A
-#define RTC_CONFIG_B		0x0B
-#define RTC_CONFIG_C		0x0C
-#define RTC_CONFIG_D		0x0D
+#define RTC_CONFIG_A		0x0a
+#define RTC_CONFIG_B		0x0b
+#define RTC_CONFIG_C		0x0c
+#define RTC_CONFIG_D		0x0d
 #define RTC_REG_SIZE		0x80
 
 #define RTC_CONFIG_A_REF_CLCK_32KHZ	(1 << 5)
@@ -50,89 +49,7 @@
 
 #define RTC_CONFIG_D_VALID_RAM_AND_TIME	0x80
 
-/* ------------------------------------------------------------------------- */
-
-int rtc_get (struct rtc_time *tmp)
-{
-	uchar sec, min, hour, mday, wday, mon, year;
-  /* here check if rtc can be accessed */
-	while ((rtc_read8(RTC_CONFIG_A) & 0x80) == 0x80);
-	sec	= rtc_read8(RTC_SECONDS);
-	min	= rtc_read8(RTC_MINUTES);
-	hour	= rtc_read8(RTC_HOURS);
-	mday	= rtc_read8(RTC_DATE_OF_MONTH);
-	wday	= rtc_read8(RTC_DAY_OF_WEEK);
-	mon	= rtc_read8(RTC_MONTH);
-	year	= rtc_read8(RTC_YEAR);
-#ifdef RTC_DEBUG
-	printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
-		"hr: %02x min: %02x sec: %02x\n",
-		year, mon, mday, wday,
-		hour, min, sec );
-	printf ( "Alarms: month: %02x hour: %02x min: %02x sec: %02x\n",
-		rtc_read8(RTC_CONFIG_D) & 0x3F,
-		rtc_read8(RTC_HOURS_ALARM),
-		rtc_read8(RTC_MINUTES_ALARM),
-		rtc_read8(RTC_SECONDS_ALARM));
-#endif
-	tmp->tm_sec  = bcd2bin (sec  & 0x7F);
-	tmp->tm_min  = bcd2bin (min  & 0x7F);
-	tmp->tm_hour = bcd2bin (hour & 0x3F);
-	tmp->tm_mday = bcd2bin (mday & 0x3F);
-	tmp->tm_mon  = bcd2bin (mon & 0x1F);
-	tmp->tm_year = bcd2bin (year);
-	tmp->tm_wday = bcd2bin (wday & 0x07);
-	if(tmp->tm_year<70)
-		tmp->tm_year+=2000;
-	else
-		tmp->tm_year+=1900;
-	tmp->tm_yday = 0;
-	tmp->tm_isdst= 0;
-#ifdef RTC_DEBUG
-	printf ( "Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
-		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
-		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
-#endif
-
-	return 0;
-}
-
-int rtc_set (struct rtc_time *tmp)
-{
-#ifdef RTC_DEBUG
-	printf ( "Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
-		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
-		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
-#endif
-	rtc_write8(RTC_CONFIG_B, 0x82); /* disable the RTC to update the regs */
-
-	rtc_write8(RTC_YEAR, bin2bcd(tmp->tm_year % 100));
-	rtc_write8(RTC_MONTH, bin2bcd(tmp->tm_mon));
-	rtc_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
-	rtc_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday));
-	rtc_write8(RTC_HOURS, bin2bcd(tmp->tm_hour));
-	rtc_write8(RTC_MINUTES, bin2bcd(tmp->tm_min));
-	rtc_write8(RTC_SECONDS, bin2bcd(tmp->tm_sec));
-	rtc_write8(RTC_CONFIG_B, 0x02); /* enable the RTC to update the regs */
-
-	return 0;
-}
-
-void rtc_reset (void)
-{
-	rtc_write8(RTC_CONFIG_B, 0x82); /* disable the RTC to update the regs */
-	rtc_write8(RTC_CONFIG_A, 0x20); /* Normal OP */
-	rtc_write8(RTC_CONFIG_B, 0x00);
-	rtc_write8(RTC_CONFIG_B, 0x00);
-	rtc_write8(RTC_CONFIG_B, 0x02); /* enable the RTC to update the regs */
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * use direct memory access
- */
-int rtc_read8(int reg)
+static int mc146818_read8(int reg)
 {
 #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
 	return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg);
@@ -149,7 +66,7 @@ int rtc_read8(int reg)
 #endif
 }
 
-void rtc_write8(int reg, uchar val)
+static void mc146818_write8(int reg, uchar val)
 {
 #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
 	out8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg, val);
@@ -165,26 +82,93 @@ void rtc_write8(int reg, uchar val)
 #endif
 }
 
-u32 rtc_read32(int reg)
+static int mc146818_get(struct rtc_time *tmp)
 {
-	u32 value = 0;
-	int i;
+	uchar sec, min, hour, mday, wday, mon, year;
 
-	for (i = 0; i < sizeof(value); i++)
-		value |= rtc_read8(reg + i) << (i << 3);
+	/* here check if rtc can be accessed */
+	while ((mc146818_read8(RTC_CONFIG_A) & 0x80) == 0x80)
+		;
+
+	sec	= mc146818_read8(RTC_SECONDS);
+	min	= mc146818_read8(RTC_MINUTES);
+	hour	= mc146818_read8(RTC_HOURS);
+	mday	= mc146818_read8(RTC_DATE_OF_MONTH);
+	wday	= mc146818_read8(RTC_DAY_OF_WEEK);
+	mon	= mc146818_read8(RTC_MONTH);
+	year	= mc146818_read8(RTC_YEAR);
+#ifdef RTC_DEBUG
+	printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x hr: %02x min: %02x sec: %02x\n",
+	       year, mon, mday, wday, hour, min, sec);
+	printf("Alarms: month: %02x hour: %02x min: %02x sec: %02x\n",
+	       mc146818_read8(RTC_CONFIG_D) & 0x3f,
+	       mc146818_read8(RTC_HOURS_ALARM),
+	       mc146818_read8(RTC_MINUTES_ALARM),
+	       mc146818_read8(RTC_SECONDS_ALARM));
+#endif
+	tmp->tm_sec  = bcd2bin(sec & 0x7f);
+	tmp->tm_min  = bcd2bin(min & 0x7f);
+	tmp->tm_hour = bcd2bin(hour & 0x3f);
+	tmp->tm_mday = bcd2bin(mday & 0x3f);
+	tmp->tm_mon  = bcd2bin(mon & 0x1f);
+	tmp->tm_year = bcd2bin(year);
+	tmp->tm_wday = bcd2bin(wday & 0x07);
+
+	if (tmp->tm_year < 70)
+		tmp->tm_year += 2000;
+	else
+		tmp->tm_year += 1900;
 
-	return value;
+	tmp->tm_yday = 0;
+	tmp->tm_isdst = 0;
+#ifdef RTC_DEBUG
+	printf("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+#endif
+
+	return 0;
 }
 
-void rtc_write32(int reg, u32 value)
+static int mc146818_set(struct rtc_time *tmp)
 {
-	int i;
+#ifdef RTC_DEBUG
+	printf("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+#endif
+	/* Disable the RTC to update the regs */
+	mc146818_write8(RTC_CONFIG_B, 0x82);
 
-	for (i = 0; i < sizeof(value); i++)
-		rtc_write8(reg + i, (value >> (i << 3)) & 0xff);
+	mc146818_write8(RTC_YEAR, bin2bcd(tmp->tm_year % 100));
+	mc146818_write8(RTC_MONTH, bin2bcd(tmp->tm_mon));
+	mc146818_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
+	mc146818_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday));
+	mc146818_write8(RTC_HOURS, bin2bcd(tmp->tm_hour));
+	mc146818_write8(RTC_MINUTES, bin2bcd(tmp->tm_min));
+	mc146818_write8(RTC_SECONDS, bin2bcd(tmp->tm_sec));
+
+	/* Enable the RTC to update the regs */
+	mc146818_write8(RTC_CONFIG_B, 0x02);
+
+	return 0;
 }
 
-void rtc_init(void)
+static void mc146818_reset(void)
+{
+	/* Disable the RTC to update the regs */
+	mc146818_write8(RTC_CONFIG_B, 0x82);
+
+	/* Normal OP */
+	mc146818_write8(RTC_CONFIG_A, 0x20);
+	mc146818_write8(RTC_CONFIG_B, 0x00);
+	mc146818_write8(RTC_CONFIG_B, 0x00);
+
+	/* Enable the RTC to update the regs */
+	mc146818_write8(RTC_CONFIG_B, 0x02);
+}
+
+static void mc146818_init(void)
 {
 #if CLEAR_CMOS
 	int i;
@@ -198,14 +182,126 @@ void rtc_init(void)
 #endif
 
 	/* Setup the real time clock */
-	rtc_write8(RTC_CONFIG_B, RTC_CONFIG_B_24H);
+	mc146818_write8(RTC_CONFIG_B, RTC_CONFIG_B_24H);
 	/* Setup the frequency it operates at */
-	rtc_write8(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ |
-		  RTC_CONFIG_A_RATE_1024HZ);
+	mc146818_write8(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ |
+			RTC_CONFIG_A_RATE_1024HZ);
 	/* Ensure all reserved bits are 0 in register D */
-	rtc_write8(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME);
+	mc146818_write8(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME);
 
 	/* Clear any pending interrupts */
-	rtc_read8(RTC_CONFIG_C);
+	mc146818_read8(RTC_CONFIG_C);
 }
 #endif
+
+#ifdef CONFIG_DM_RTC
+
+static int rtc_mc146818_get(struct udevice *dev, struct rtc_time *time)
+{
+	return mc146818_get(time);
+}
+
+static int rtc_mc146818_set(struct udevice *dev, const struct rtc_time *time)
+{
+	return mc146818_set((struct rtc_time *)time);
+}
+
+static int rtc_mc146818_reset(struct udevice *dev)
+{
+	mc146818_reset();
+
+	return 0;
+}
+
+static int rtc_mc146818_read8(struct udevice *dev, unsigned int reg)
+{
+	return mc146818_read8(reg);
+}
+
+static int rtc_mc146818_write8(struct udevice *dev, unsigned int reg, int val)
+{
+	mc146818_write8(reg, val);
+
+	return 0;
+}
+
+static int rtc_mc146818_bind(struct udevice *dev)
+{
+	mc146818_init();
+
+	return 0;
+}
+
+static const struct rtc_ops rtc_mc146818_ops = {
+	.get = rtc_mc146818_get,
+	.set = rtc_mc146818_set,
+	.reset = rtc_mc146818_reset,
+	.read8 = rtc_mc146818_read8,
+	.write8 = rtc_mc146818_write8,
+};
+
+static const struct udevice_id rtc_mc146818_ids[] = {
+	{ .compatible = "motorola,mc146818" },
+	{ }
+};
+
+U_BOOT_DRIVER(rtc_mc146818) = {
+	.name = "rtc_mc146818",
+	.id = UCLASS_RTC,
+	.of_match = rtc_mc146818_ids,
+	.bind = rtc_mc146818_bind,
+	.ops = &rtc_mc146818_ops,
+};
+
+#else /* !CONFIG_DM_RTC */
+
+int rtc_get(struct rtc_time *tmp)
+{
+	return mc146818_get(tmp);
+}
+
+int rtc_set(struct rtc_time *tmp)
+{
+	return mc146818_set(tmp);
+}
+
+void rtc_reset(void)
+{
+	mc146818_reset();
+}
+
+int rtc_read8(int reg)
+{
+	return mc146818_read8(reg);
+}
+
+void rtc_write8(int reg, uchar val)
+{
+	mc146818_write8(reg, val);
+}
+
+u32 rtc_read32(int reg)
+{
+	u32 value = 0;
+	int i;
+
+	for (i = 0; i < sizeof(value); i++)
+		value |= rtc_read8(reg + i) << (i << 3);
+
+	return value;
+}
+
+void rtc_write32(int reg, u32 value)
+{
+	int i;
+
+	for (i = 0; i < sizeof(value); i++)
+		rtc_write8(reg + i, (value >> (i << 3)) & 0xff);
+}
+
+void rtc_init(void)
+{
+	mc146818_init();
+}
+
+#endif /* CONFIG_DM_RTC */
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 50354fdde1..2e388e7ad9 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -40,6 +40,7 @@ struct ich_spi_priv {
 	int status;
 	int control;
 	int bbar;
+	int bcr;
 	uint32_t *pr;		/* only for ich9 */
 	int speed;		/* pointer to speed control */
 	ulong max_speed;	/* Maximum bus speed in MHz */
@@ -239,6 +240,7 @@ static int ich_init_controller(struct ich_spi_platdata *plat,
 		ctlr->speed = ctlr->control + 2;
 		ctlr->bbar = offsetof(struct ich9_spi_regs, bbar);
 		ctlr->preop = offsetof(struct ich9_spi_regs, preop);
+		ctlr->bcr = offsetof(struct ich9_spi_regs, bcr);
 		ctlr->pr = &ich9_spi->pr[0];
 		ctlr->base = ich9_spi;
 	} else {
@@ -411,6 +413,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
 			const void *dout, void *din, unsigned long flags)
 {
 	struct udevice *bus = dev_get_parent(dev);
+	struct ich_spi_platdata *plat = dev_get_platdata(bus);
 	struct ich_spi_priv *ctlr = dev_get_priv(bus);
 	uint16_t control;
 	int16_t opcode_index;
@@ -422,7 +425,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	int using_cmd = 0;
 	int ret;
 
-	/* Ee don't support writing partial bytes. */
+	/* We don't support writing partial bytes */
 	if (bitlen % 8) {
 		debug("ICH SPI: Accessing partial bytes not supported\n");
 		return -EPROTONOSUPPORT;
@@ -477,7 +480,10 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	if (ret < 0)
 		return ret;
 
-	ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
+	if (plat->ich_version == 7)
+		ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
+	else
+		ich_writeb(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
 
 	spi_setup_type(trans, using_cmd ? bytes : 0);
 	opcode_index = spi_setup_opcode(ctlr, trans);
@@ -601,7 +607,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
 			return status;
 
 		if (status & SPIS_FCERR) {
-			debug("ICH SPI: Data transaction error\n");
+			debug("ICH SPI: Data transaction error %x\n", status);
 			return -EIO;
 		}
 
@@ -619,7 +625,6 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	return 0;
 }
 
-
 /*
  * This uses the SPI controller from the Intel Cougar Point and Panther Point
  * PCH to write-protect portions of the SPI flash until reboot. The changes
@@ -685,13 +690,10 @@ static int ich_spi_probe(struct udevice *bus)
 	 * v9, deassert SMM BIOS Write Protect Disable.
 	 */
 	if (plat->use_sbase) {
-		struct ich9_spi_regs *ich9_spi;
-
-		ich9_spi = priv->base;
-		bios_cntl = ich_readb(priv, ich9_spi->bcr);
+		bios_cntl = ich_readb(priv, priv->bcr);
 		bios_cntl &= ~(1 << 5);	/* clear Enable InSMM_STS (EISS) */
 		bios_cntl |= 1;		/* Write Protect Disable (WPD) */
-		ich_writeb(priv, bios_cntl, ich9_spi->bcr);
+		ich_writeb(priv, bios_cntl, priv->bcr);
 	} else {
 		pci_read_config_byte(plat->dev, 0xdc, &bios_cntl);
 		if (plat->ich_version == 9)
diff --git a/drivers/video/vesa_fb.c b/drivers/video/vesa_fb.c
index 47f824a726..909f8e8091 100644
--- a/drivers/video/vesa_fb.c
+++ b/drivers/video/vesa_fb.c
@@ -1,6 +1,5 @@
 /*
- *
- * Vesa frame buffer driver for x86
+ * VESA frame buffer driver
  *
  * Copyright (C) 2014 Google, Inc
  *
@@ -17,16 +16,6 @@
  */
 GraphicDevice ctfb;
 
-/* Devices to allow - only the last one works fully */
-struct pci_device_id vesa_video_ids[] = {
-	{ .vendor = 0x102b, .device = 0x0525 },
-	{ .vendor = 0x1002, .device = 0x5159 },
-	{ .vendor = 0x1002, .device = 0x4752 },
-	{ .vendor = 0x1002, .device = 0x5452 },
-	{ .vendor = 0x8086, .device = 0x0f31 },
-	{},
-};
-
 void *video_hw_init(void)
 {
 	GraphicDevice *gdev = &ctfb;
@@ -36,8 +25,7 @@ void *video_hw_init(void)
 
 	printf("Video: ");
 	if (vbe_get_video_info(gdev)) {
-		/* TODO: Should we look these up by class? */
-		dev = pci_find_devices(vesa_video_ids, 0);
+		dev = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8, 0);
 		if (dev == -1) {
 			printf("no card detected\n");
 			return NULL;