diff options
| author | Tom Rini <trini@konsulko.com> | 2015-09-24 12:28:10 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-09-24 12:28:10 -0400 |
| commit | 1a9c229bf754c89f42b085451ad506693f326427 (patch) | |
| tree | 288106d7498591ac889fa972d0c24fc5c9b811f9 /drivers | |
| parent | d0f30211e9823694c1c2c79f471dbe9d498a40fd (diff) | |
| parent | f697c2acca9ff02c9b0cf480a4a726ed9626a53a (diff) | |
| download | talos-obmc-uboot-1a9c229bf754c89f42b085451ad506693f326427.tar.gz talos-obmc-uboot-1a9c229bf754c89f42b085451ad506693f326427.zip | |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mtd/nand/mxs_nand.c | 9 | ||||
| -rw-r--r-- | drivers/watchdog/imx_watchdog.c | 3 |
2 files changed, 10 insertions, 2 deletions
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 1d689015a5..f15cf36c88 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -149,6 +149,13 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size, uint32_t page_oob_size) { int ecc_strength; + int max_ecc_strength_supported; + + /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */ + if (is_cpu_type(MXC_CPU_MX6SX)) + max_ecc_strength_supported = 62; + else + max_ecc_strength_supported = 40; /* * Determine the ECC layout with the formula: @@ -162,7 +169,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size, / (galois_field * mxs_nand_ecc_chunk_cnt(page_data_size)); - return round_down(ecc_strength, 2); + return min(round_down(ecc_strength, 2), max_ecc_strength_supported); } static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size, diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 1d18d4b269..9a77a54192 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -55,7 +55,8 @@ void reset_cpu(ulong addr) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - writew(WCR_WDE, &wdog->wcr); + clrsetbits_le16(&wdog->wcr, 0, WCR_WDE); + writew(0x5555, &wdog->wsr); writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ while (1) { |
