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authorPriyanka Jain <Priyanka.Jain@freescale.com>2015-06-29 15:39:23 +0530
committerYork Sun <yorksun@freescale.com>2015-09-01 21:37:23 -0500
commitc340941e443748bbcd0e35172b481ea2077d2582 (patch)
treef90085efd86b1abdb69abb100135ca190055dfdf /drivers/rtc
parentb7e84c93c450480ca4ff51ad2eb56bd83c1dc368 (diff)
downloadtalos-obmc-uboot-c340941e443748bbcd0e35172b481ea2077d2582.tar.gz
talos-obmc-uboot-c340941e443748bbcd0e35172b481ea2077d2582.zip
rtc:ds3232/ds3231: Add support to generate 32KHz output
RTC devices can generate 32KHz output if for -DS3232 device, EN32KHz bit and BB32KHz bit are set -DS3231 device, EN32KHz bit is set, BB32KHz bit is don't care Patch adds rtc_enable_32khz_output() which when called will enable 32KHz output on 32KHz pin Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/rtc')
-rw-r--r--drivers/rtc/ds3231.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c
index c84bbc647f..e5e1be134c 100644
--- a/drivers/rtc/ds3231.c
+++ b/drivers/rtc/ds3231.c
@@ -49,6 +49,8 @@
#define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
#define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
#define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
+#define RTC_STAT_BIT_BB32KHZ 0x40 /* Battery backed 32KHz Output */
+#define RTC_STAT_BIT_EN32KHZ 0x8 /* Enable 32KHz Output */
static uchar rtc_read (uchar reg);
@@ -141,6 +143,14 @@ void rtc_reset (void)
rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
}
+/*
+ * Enable 32KHz output
+ */
+void rtc_enable_32khz_output(void)
+{
+ rtc_write(RTC_STAT_REG_ADDR,
+ RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ);
+}
/*
* Helper functions
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