path: root/drivers/net/fsl-mc
diff options
authorBhupesh Sharma <>2015-03-19 09:20:43 -0700
committerYork Sun <>2015-04-21 10:26:29 -0700
commit422cb08acb1bc9a05ffa68ba68b4e196dad1af5b (patch)
tree1aae2fc085d1317f5ee6b9e26f44fffa5435be36 /drivers/net/fsl-mc
parent1fb5ff9ae732d63c8810bd1a6922273e14329093 (diff)
armv8/fsl-lsch3: Add Freescale Debug Server driver
The Debug Server driver is responsible for loading the Debug server FW on the Service Processor (Cortex-A5 core) on LS2085A like SoCs and then polling for the successful initialization of the same. TOP MEM HIDE is adjusted to ensure the space required by Debug Server FW is accounted for. MC uses the DDR area which is calculated as: MC DDR region start = Top of DDR - area reserved by Debug Server FW Signed-off-by: Bhupesh Sharma <> Reviewed-by: York Sun <>
Diffstat (limited to 'drivers/net/fsl-mc')
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 74b0085301..76581cbfda 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -9,6 +9,7 @@
#include <fsl-mc/fsl_mc.h>
#include <fsl-mc/fsl_mc_sys.h>
#include <fsl-mc/fsl_dpmng.h>
+#include <fsl_debug_server.h>
static int mc_boot_status;
@@ -112,6 +113,9 @@ int mc_init(bd_t *bis)
gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
+ mc_ram_addr -= debug_server_get_dram_block_size();
* Management Complex cores should be held at reset out of POR.
* U-boot should be the first software to touch MC. To be safe,
OpenPOWER on IntegriCloud