diff options
| author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2014-09-23 09:57:47 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-09-25 08:36:17 -0700 |
| commit | 5b8388a827c002c6c5e8da76bd99b66f1f26e92c (patch) | |
| tree | 21e2954e053658f8cc003ba2aa687c8cf95cd6cc /drivers/mtd/nand/fsl_elbc_nand.c | |
| parent | 1b35721f61207c5f3cdf924be3bb64e0ad12887c (diff) | |
| download | talos-obmc-uboot-5b8388a827c002c6c5e8da76bd99b66f1f26e92c.tar.gz talos-obmc-uboot-5b8388a827c002c6c5e8da76bd99b66f1f26e92c.zip | |
driver/mtd: Use generic timer API for FSL IFC, eLBC
Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks
Replace usec2ticks with get_timer() (generic timer API)
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/mtd/nand/fsl_elbc_nand.c')
| -rw-r--r-- | drivers/mtd/nand/fsl_elbc_nand.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 7e1e6ec78b..3372b64212 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -37,7 +37,6 @@ #define MAX_BANKS 8 #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ -#define FCM_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for FCM */ #define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC) @@ -199,7 +198,8 @@ static int fsl_elbc_run_command(struct mtd_info *mtd) struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; fsl_lbc_t *lbc = ctrl->regs; - long long end_tick; + u32 timeo = (CONFIG_SYS_HZ * 10) / 1000; + u32 time_start; u32 ltesr; /* Setup the FMR[OP] to execute without write protection */ @@ -218,10 +218,10 @@ static int fsl_elbc_run_command(struct mtd_info *mtd) out_be32(&lbc->lsor, priv->bank); /* wait for FCM complete flag or timeout */ - end_tick = usec2ticks(FCM_TIMEOUT_MSECS * 1000) + get_ticks(); + time_start = get_timer(0); ltesr = 0; - while (end_tick > get_ticks()) { + while (get_timer(time_start) < timeo) { ltesr = in_be32(&lbc->ltesr); if (ltesr & LTESR_CC) break; |
