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| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2015-12-16 16:45:41 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-01-25 08:24:15 -0800 |
| commit | a994b3deb00bf3177cdf9f92060baec4f640f466 (patch) | |
| tree | e7e7a70b20a26ab4d63ff55ea91b867343a03b23 /drivers/ddr | |
| parent | 6f14e257c472c895499c186b602861e90f2656b5 (diff) | |
| download | talos-obmc-uboot-a994b3deb00bf3177cdf9f92060baec4f640f466.tar.gz talos-obmc-uboot-a994b3deb00bf3177cdf9f92060baec4f640f466.zip | |
driver/ddr/fsl: Add workaround for A009663
Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0
before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE]
to the desired value after DDR initialization has completed.
When DDR controller is configured to operate in auto-precharge
mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/fsl/fsl_ddr_gen4.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 0d9dd0bb46..6f76980d31 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -155,7 +155,12 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, ddr_out32(&ddr->sdram_mode_15, regs->ddr_sdram_mode_15); ddr_out32(&ddr->sdram_mode_16, regs->ddr_sdram_mode_16); ddr_out32(&ddr->sdram_md_cntl, regs->ddr_sdram_md_cntl); +#ifdef CONFIG_SYS_FSL_ERRATUM_A009663 + ddr_out32(&ddr->sdram_interval, + regs->ddr_sdram_interval & ~SDRAM_INTERVAL_BSTOPRE); +#else ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); +#endif ddr_out32(&ddr->sdram_data_init, regs->ddr_data_init); ddr_out32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl); #ifndef CONFIG_SYS_FSL_DDR_EMU @@ -397,6 +402,11 @@ step2: if (timeout <= 0) printf("Waiting for D_INIT timeout. Memory may not work.\n"); + +#ifdef CONFIG_SYS_FSL_ERRATUM_A009663 + ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); +#endif + #ifdef CONFIG_DEEP_SLEEP if (is_warm_boot()) { /* exit self-refresh */ |
