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| author | York Sun <yorksun@freescale.com> | 2015-01-06 13:18:55 -0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-02-24 13:09:42 -0800 |
| commit | e32d59a2fa6446b64167bba31c0dd40eb023e8bb (patch) | |
| tree | d2d58e20f9d05aabb5d1d12a4a91ef4cbbb545bd /drivers/ddr/fsl/main.c | |
| parent | 064d031ca6490d9641bbe308690b1f15b1f56077 (diff) | |
| download | talos-obmc-uboot-e32d59a2fa6446b64167bba31c0dd40eb023e8bb.tar.gz talos-obmc-uboot-e32d59a2fa6446b64167bba31c0dd40eb023e8bb.zip | |
driver/ddr/fsl: Add sync of refresh
Add sync of refresh for multiple DDR controllers. DDRC initialization
needs to complete first. Code is re-ordered to keep refresh close.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/ddr/fsl/main.c')
| -rw-r--r-- | drivers/ddr/fsl/main.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index f49939b135..b72b24290e 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -692,6 +692,10 @@ phys_size_t __fsl_ddr_sdram(fsl_ddr_info_t *pinfo) } } +#ifdef CONFIG_FSL_DDR_SYNC_REFRESH + fsl_ddr_sync_memctl_refresh(first_ctrl, last_ctrl); +#endif + #ifdef CONFIG_PPC /* program LAWs */ for (i = first_ctrl; i <= last_ctrl; i++) { |
