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| author | York Sun <yorksun@freescale.com> | 2015-01-06 13:18:50 -0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-02-24 13:09:18 -0800 |
| commit | 03e664d8f4065010ccb6c75648192200a832fd8b (patch) | |
| tree | f0398fdcdc87e12da79a82cde310b1a11937641a /drivers/ddr/fsl/ddr4_dimm_params.c | |
| parent | b87e6f88e9218da3de371bb6cc8a34924153178e (diff) | |
| download | talos-obmc-uboot-03e664d8f4065010ccb6c75648192200a832fd8b.tar.gz talos-obmc-uboot-03e664d8f4065010ccb6c75648192200a832fd8b.zip | |
driver/ddr/fsl: Add support for multiple DDR clocks
Controller number is passed for function calls to support individual
DDR clock, depending on SoC implementation. It is backward compatible
with exising platforms. Multiple clocks have been verifyed on LS2085A
emulator.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/ddr/fsl/ddr4_dimm_params.c')
| -rw-r--r-- | drivers/ddr/fsl/ddr4_dimm_params.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c b/drivers/ddr/fsl/ddr4_dimm_params.c index aaddc8fa08..bbfb4ee417 100644 --- a/drivers/ddr/fsl/ddr4_dimm_params.c +++ b/drivers/ddr/fsl/ddr4_dimm_params.c @@ -119,10 +119,10 @@ compute_ranksize(const struct ddr4_spd_eeprom_s *spd) * Writes the results to the dimm_params_t structure pointed by pdimm. * */ -unsigned int -ddr_compute_dimm_parameters(const generic_spd_eeprom_t *spd, - dimm_params_t *pdimm, - unsigned int dimm_number) +unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num, + const generic_spd_eeprom_t *spd, + dimm_params_t *pdimm, + unsigned int dimm_number) { unsigned int retval; int i; |
