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author | Marek Vasut <marex@denx.de> | 2015-07-18 03:15:34 +0200 |
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committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:17 +0200 |
commit | 7c0a9df3659f5d722773b0e5ecbe4b004b0d02db (patch) | |
tree | 7fff0da4c3ea15e7af95a7ec64834b7c03d1f60e /drivers/ddr/altera | |
parent | c336ca3e5b62c275d15cef9cdf22eacbdef4405a (diff) | |
download | talos-obmc-uboot-7c0a9df3659f5d722773b0e5ecbe4b004b0d02db.tar.gz talos-obmc-uboot-7c0a9df3659f5d722773b0e5ecbe4b004b0d02db.zip |
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 7
Mildly reorder the function so that the reg_file_set*() calls are
in the same place. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr/altera')
-rw-r--r-- | drivers/ddr/altera/sequencer.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 62183414aa..48a90e90f3 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -2211,19 +2211,17 @@ static int rw_mgr_mem_calibrate_vfifo(const u32 rw_group, const u32 test_bgn) debug("%s:%d: %u %u\n", __func__, __LINE__, rw_group, test_bgn); - /* update info for sims */ + /* Update info for sims */ + reg_file_set_group(rw_group); reg_file_set_stage(CAL_STAGE_VFIFO); + reg_file_set_sub_stage(CAL_SUBSTAGE_GUARANTEED_READ); - /* USER Determine number of delay taps for each phase tap */ + failed_substage = CAL_SUBSTAGE_GUARANTEED_READ; + + /* USER Determine number of delay taps for each phase tap. */ dtaps_per_ptap = DIV_ROUND_UP(IO_DELAY_PER_OPA_TAP, IO_DELAY_PER_DQS_EN_DCHAIN_TAP) - 1; - /* update info for sims */ - reg_file_set_group(rw_group); - - reg_file_set_sub_stage(CAL_SUBSTAGE_GUARANTEED_READ); - failed_substage = CAL_SUBSTAGE_GUARANTEED_READ; - for (d = 0; d <= dtaps_per_ptap; d += 2) { /* * In RLDRAMX we may be messing the delay of pins in |