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| author | Tom Rini <trini@konsulko.com> | 2015-07-23 11:46:05 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-07-23 11:46:05 -0400 |
| commit | 413978d118bb7d7b0a8488d97d802f2899cd81ce (patch) | |
| tree | a0a42850eb5a9a13f2afa837b23582e23b4018a1 /doc | |
| parent | 3c9cc70d7153da442575112d9a2643eecd17d534 (diff) | |
| parent | 62102bee1ff32e7eda8b31558b0b646df74fecfd (diff) | |
| download | talos-obmc-uboot-413978d118bb7d7b0a8488d97d802f2899cd81ce.tar.gz talos-obmc-uboot-413978d118bb7d7b0a8488d97d802f2899cd81ce.zip | |
Merge git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.uniphier | 54 |
1 files changed, 50 insertions, 4 deletions
diff --git a/doc/README.uniphier b/doc/README.uniphier index 4902533544..52d681b57a 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -28,14 +28,18 @@ Tested toolchains Compile the source ------------------ -PH1-Pro4: - $ make ph1_pro4_defconfig +PH1-sLD3: + $ make ph1_sld3_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- PH1-LD4: $ make ph1_ld4_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- +PH1-Pro4: + $ make ph1_pro4_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- + PH1-sLD8: $ make ph1_sld8_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- @@ -81,6 +85,48 @@ Supported devices - Support card (SRAM, NOR flash, some peripherals) +Micro Support Card +------------------ + +The recommended bit switch settings are as follows: + + SW2 OFF(1)/ON(0) Description + ------------------------------------------ + bit 1 <---- BKSZ[0] + bit 2 ----> BKSZ[1] + bit 3 <---- SoC Bus Width 16/32 + bit 4 <---- SERIAL_SEL[0] + bit 5 ----> SERIAL_SEL[1] + bit 6 ----> BOOTSWAP_EN + bit 7 <---- CS1/CS5 + bit 8 <---- SOC_SERIAL_DISABLE + + SW8 OFF(1)/ON(0) Description + ------------------------------------------ + bit 1 ----> CS1_SPLIT + bit 2 <---- CASE9_ON + bit 3 <---- CASE10_ON + bit 4 Don't Care Reserve + bit 5 Don't Care Reserve + bit 6 Don't Care Reserve + bit 7 ----> BURST_EN + bit 8 ----> FLASHBUS32_16 + +The BKSZ[1:0] specifies the address range of memory slot and peripherals +as follows: + + BKSZ Description RAM slot Peripherals + -------------------------------------------------------------------- + 0b00 15MB RAM / 1MB Peri 00000000-0effffff 0f000000-0fffffff + 0b01 31MB RAM / 1MB Peri 00000000-1effffff 1f000000-1fffffff + 0b10 64MB RAM / 1MB Peri 00000000-3effffff 3f000000-3fffffff + 0b11 127MB RAM / 1MB Peri 00000000-7effffff 7f000000-7fffffff + +Set BSKZ[1:0] to 0b01 for U-Boot. +This mode is the most handy because EA[24] is always supported by the save pin +mode of the system bus. On the other hand, EA[25] is not supported for some +newer SoCs. Even if it is, EA[25] is not connected on most of the boards. + -- -Masahiro Yamada <yamada.m@jp.panasonic.com> -Feb. 2015 +Masahiro Yamada <yamada.masahiro@socionext.com> +Jul. 2015 |
