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authorEd Swarthout <Ed.Swarthout@freescale.com>2013-03-25 07:40:10 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-24 16:54:12 -0500
commitf41388159ac6b1a438ea65b6d326f976b99092e1 (patch)
tree924c876e73f8904b0f9866a1a4527e07596809fc /board
parent428ea86c646fd9b485bfb015cd6293e345e6bb3e (diff)
downloadtalos-obmc-uboot-f41388159ac6b1a438ea65b6d326f976b99092e1.tar.gz
talos-obmc-uboot-f41388159ac6b1a438ea65b6d326f976b99092e1.zip
powerpc/t4qds: use clock measurement for sysclk and ddr clock
Use QIXIS measurement registers to obtain sysclk and ddr clock. This allows using non-standard clock speeds, set by directly writing to clock chip or store the values in qixis clock data eeprom. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/t4qds/t4qds.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index 26539db2df..b48855e492 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -540,6 +540,20 @@ int board_early_init_r(void)
unsigned long get_board_sys_clk(void)
{
u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+#ifdef CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
+ /* use accurate clock measurement */
+ int freq = QIXIS_READ(clk_freq[0]) << 8 | QIXIS_READ(clk_freq[1]);
+ int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]);
+ u32 val;
+
+ val = freq * base;
+ if (val) {
+ debug("SYS Clock measurement is: %d\n", val);
+ return val;
+ } else {
+ printf("Warning: SYS clock measurement is invalid, using value from brdcfg1.\n");
+ }
+#endif
switch (sysclk_conf & 0x0F) {
case QIXIS_SYSCLK_83:
@@ -563,6 +577,20 @@ unsigned long get_board_sys_clk(void)
unsigned long get_board_ddr_clk(void)
{
u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
+#ifdef CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
+ /* use accurate clock measurement */
+ int freq = QIXIS_READ(clk_freq[2]) << 8 | QIXIS_READ(clk_freq[3]);
+ int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]);
+ u32 val;
+
+ val = freq * base;
+ if (val) {
+ debug("DDR Clock measurement is: %d\n", val);
+ return val;
+ } else {
+ printf("Warning: DDR clock measurement is invalid, using value from brdcfg1.\n");
+ }
+#endif
switch ((ddrclk_conf & 0x30) >> 4) {
case QIXIS_DDRCLK_100:
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