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authorShaohui Xie <Shaohui.Xie@freescale.com>2013-03-25 07:40:21 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-24 16:54:14 -0500
commite14cdc0a695d4cdb40843e1e7c6ee29c471a3fcc (patch)
treeb0e8c5704f0c16f4b7cdf0c84b77e65b2ac9c468 /board
parent8fa0102bcfd67203e44b656fb478bc358e102ee2 (diff)
downloadtalos-obmc-uboot-e14cdc0a695d4cdb40843e1e7c6ee29c471a3fcc.tar.gz
talos-obmc-uboot-e14cdc0a695d4cdb40843e1e7c6ee29c471a3fcc.zip
powerpc/p5040: fix mdio mux for 10G port
Current driver of p5040 assumes 10G port follows 1G port DTSEC5 in eth port enum structure, it will assign mdio mux depend on this assumption. This is not true with Fman V3, which added more 1G ports after port DTSEC5 in eth port enum structure, then 10G ports on p5040 will have wrong mdio mux. So we use dynamic index for 10G ports instead of hardcoded enum value when doing mdio mux for 10G ports. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/corenet_ds/eth_superhydra.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/board/freescale/corenet_ds/eth_superhydra.c b/board/freescale/corenet_ds/eth_superhydra.c
index ef9de25bd8..ae07073532 100644
--- a/board/freescale/corenet_ds/eth_superhydra.c
+++ b/board/freescale/corenet_ds/eth_superhydra.c
@@ -605,8 +605,8 @@ int board_eth_init(bd_t *bis)
lane = serdes_get_first_lane(XAUI_FM1);
if (lane >= 0) {
debug("FM1@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]);
- mdio_mux[FM1_10GEC1].mask = BRDCFG1_EMI2_SEL_MASK;
- mdio_mux[FM1_10GEC1].val = BRDCFG1_EMI2_SEL_SLOT2;
+ mdio_mux[i].mask = BRDCFG1_EMI2_SEL_MASK;
+ mdio_mux[i].val = BRDCFG1_EMI2_SEL_SLOT2;
super_hydra_mdio_set_mux("SUPER_HYDRA_FM1_TGEC_MDIO",
mdio_mux[i].mask, mdio_mux[i].val);
}
@@ -704,8 +704,8 @@ int board_eth_init(bd_t *bis)
lane = serdes_get_first_lane(XAUI_FM2);
if (lane >= 0) {
debug("FM2@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]);
- mdio_mux[FM2_10GEC1].mask = BRDCFG1_EMI2_SEL_MASK;
- mdio_mux[FM2_10GEC1].val = BRDCFG1_EMI2_SEL_SLOT1;
+ mdio_mux[i].mask = BRDCFG1_EMI2_SEL_MASK;
+ mdio_mux[i].val = BRDCFG1_EMI2_SEL_SLOT1;
super_hydra_mdio_set_mux("SUPER_HYDRA_FM2_TGEC_MDIO",
mdio_mux[i].mask, mdio_mux[i].val);
}
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