Merge git://git.denx.de/u-boot-dm

9 files changed, 390 insertions, 466 deletions

diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
index 5fb01ce783..6cbd90661b 100644
--- a/board/samsung/common/Makefile
+++ b/board/samsung/common/Makefile
@@ -11,4 +11,5 @@ obj-$(CONFIG_MISC_COMMON) += misc.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_BOARD_COMMON)	+= board.o
+obj-$(CONFIG_EXYNOS5_DT)	+= exynos5-dt.o
 endif
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 1a4e8c9c99..d32c75de50 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -152,13 +152,14 @@ int board_early_init_f(void)
 	board_i2c_init(gd->fdt_blob);
 #endif
 
-#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_EXYNOS_FB)
-/*
- * board_init_f(arch/arm/lib/board.c) calls lcd_setmem() which needs
- * panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix, to reserve
- * FB memory at a very early stage. So, we need to fill panel_info.vl_col,
- * panel_info.vl_row and panel_info.vl_bpix before lcd_setmem() is called.
- */
+#if defined(CONFIG_EXYNOS_FB)
+	/*
+	 * board_init_f(arch/arm/lib/board.c) calls lcd_setmem() which needs
+	 * panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix,
+	 * to reserve frame-buffer memory at a very early stage. So, we need
+	 * to fill panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix
+	 * before lcd_setmem() is called.
+	 */
 	err = exynos_lcd_early_init(gd->fdt_blob);
 	if (err) {
 		debug("LCD early init failed\n");
@@ -179,7 +180,6 @@ int power_init_board(void)
 }
 #endif
 
-#ifdef CONFIG_OF_CONTROL
 #ifdef CONFIG_SMC911X
 static int decode_sromc(const void *blob, struct fdt_sromc *config)
 {
@@ -310,7 +310,6 @@ int checkboard(void)
 	return 0;
 }
 #endif
-#endif /* CONFIG_OF_CONTROL */
 
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c
new file mode 100644
index 0000000000..7d1b88a9b8
--- /dev/null
+++ b/board/samsung/common/exynos5-dt.c
@@ -0,0 +1,362 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dwc3-uboot.h>
+#include <fdtdec.h>
+#include <asm/io.h>
+#include <errno.h>
+#include <i2c.h>
+#include <mmc.h>
+#include <netdev.h>
+#include <samsung-usb-phy-uboot.h>
+#include <spi.h>
+#include <usb.h>
+#include <video_bridge.h>
+#include <asm/gpio.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/dwmmc.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
+#include <asm/arch/sromc.h>
+#include <power/pmic.h>
+#include <power/max77686_pmic.h>
+#include <power/regulator.h>
+#include <power/s5m8767.h>
+#include <tmu.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void board_enable_audio_codec(void)
+{
+	int node, ret;
+	struct gpio_desc en_gpio;
+
+	node = fdtdec_next_compatible(gd->fdt_blob, 0,
+		COMPAT_SAMSUNG_EXYNOS5_SOUND);
+	if (node <= 0)
+		return;
+
+	ret = gpio_request_by_name_nodev(gd->fdt_blob, node,
+					 "codec-enable-gpio", 0, &en_gpio,
+					 GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+	if (ret == -FDT_ERR_NOTFOUND)
+		return;
+
+	/* Turn on the GPIO which connects to the codec's "enable" line. */
+	gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);
+
+#ifdef CONFIG_SOUND_MAX98095
+	/* Enable MAX98095 Codec */
+	gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
+	gpio_direction_output(EXYNOS5_GPIO_X17, 1);
+	gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
+#endif
+}
+
+int exynos_init(void)
+{
+	board_enable_audio_codec();
+
+	return 0;
+}
+
+static int exynos_set_regulator(const char *name, uint uv)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = regulator_get_by_platname(name, &dev);
+	if (ret) {
+		debug("%s: Cannot find regulator %s\n", __func__, name);
+		return ret;
+	}
+	ret = regulator_set_value(dev, uv);
+	if (ret) {
+		debug("%s: Cannot set regulator %s\n", __func__, name);
+		return ret;
+	}
+
+	return 0;
+}
+
+int exynos_power_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = pmic_get("max77686", &dev);
+	if (!ret) {
+		/* TODO(sjg@chromium.org): Move into the clock/pmic API */
+		ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
+				MAX77686_32KHCP_EN);
+		if (ret)
+			return ret;
+		ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
+				MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V);
+		if (ret)
+			return ret;
+	} else {
+		ret = pmic_get("s5m8767-pmic", &dev);
+		/* TODO(sjg@chromium.org): Use driver model to access clock */
+#ifdef CONFIG_PMIC_S5M8767
+		if (!ret)
+			s5m8767_enable_32khz_cp(dev);
+#endif
+	}
+	if (ret == -ENODEV)
+		return 0;
+
+	ret = regulators_enable_boot_on(false);
+	if (ret)
+		return ret;
+
+	ret = exynos_set_regulator("vdd_mif", 1100000);
+	if (ret)
+		return ret;
+
+	/*
+	 * This would normally be 1.3V, but since we are running slowly 1V
+	 * is enough. For spring it helps reduce CPU temperature and avoid
+	 * hangs with the case open.
+	 */
+	ret = exynos_set_regulator("vdd_arm", 1000000);
+	if (ret)
+		return ret;
+	ret = exynos_set_regulator("vdd_int", 1012500);
+	if (ret)
+		return ret;
+	ret = exynos_set_regulator("vdd_g3d", 1200000);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+int board_get_revision(void)
+{
+	return 0;
+}
+
+#ifdef CONFIG_LCD
+
+static int board_dp_bridge_init(struct udevice *dev)
+{
+	const int max_tries = 10;
+	int num_tries;
+	int ret;
+
+	debug("%s\n", __func__);
+	ret = video_bridge_attach(dev);
+	if (ret) {
+		debug("video bridge init failed: %d\n", ret);
+		return ret;
+	}
+
+	/*
+	 * We need to wait for 90ms after bringing up the bridge since there
+	 * is a phantom "high" on the HPD chip during its bootup.  The phantom
+	 * high comes within 7ms of de-asserting PD and persists for at least
+	 * 15ms.  The real high comes roughly 50ms after PD is de-asserted. The
+	 * phantom high makes it hard for us to know when the NXP chip is up.
+	 */
+	mdelay(90);
+
+	for (num_tries = 0; num_tries < max_tries; num_tries++) {
+		/* Check HPD. If it's high, or we don't have it, all is well */
+		ret = video_bridge_check_attached(dev);
+		if (!ret || ret == -ENOENT)
+			return 0;
+
+		debug("%s: eDP bridge failed to come up; try %d of %d\n",
+		      __func__, num_tries, max_tries);
+	}
+
+	/* Immediately go into bridge reset if the hp line is not high */
+	return -EIO;
+}
+
+static int board_dp_bridge_setup(const void *blob)
+{
+	const int max_tries = 2;
+	int num_tries;
+	struct udevice *dev;
+	int ret;
+
+	/* Configure I2C registers for Parade bridge */
+	ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev);
+	if (ret) {
+		debug("video bridge init failed: %d\n", ret);
+		return ret;
+	}
+
+	if (strncmp(dev->driver->name, "parade", 6)) {
+		/* Mux HPHPD to the special hotplug detect mode */
+		exynos_pinmux_config(PERIPH_ID_DPHPD, 0);
+	}
+
+	for (num_tries = 0; num_tries < max_tries; num_tries++) {
+		ret = board_dp_bridge_init(dev);
+		if (!ret)
+			return 0;
+		if (num_tries == max_tries - 1)
+			break;
+
+		/*
+		* If we're here, the bridge chip failed to initialise.
+		* Power down the bridge in an attempt to reset.
+		*/
+		video_bridge_set_active(dev, false);
+
+		/*
+		* Arbitrarily wait 300ms here with DP_N low.  Don't know for
+		* sure how long we should wait, but we're being paranoid.
+		*/
+		mdelay(300);
+	}
+
+	return ret;
+}
+
+void exynos_cfg_lcd_gpio(void)
+{
+	/* For Backlight */
+	gpio_request(EXYNOS5_GPIO_B20, "lcd_backlight");
+	gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_OUTPUT);
+	gpio_set_value(EXYNOS5_GPIO_B20, 1);
+}
+
+void exynos_set_dp_phy(unsigned int onoff)
+{
+	set_dp_phy_ctrl(onoff);
+}
+
+static int board_dp_set_backlight(int percent)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev);
+	if (!ret)
+		ret = video_bridge_set_backlight(dev, percent);
+
+	return ret;
+}
+
+void exynos_backlight_on(unsigned int on)
+{
+	struct udevice *dev;
+	int ret;
+
+	debug("%s(%u)\n", __func__, on);
+	if (!on)
+		return;
+
+	ret = regulator_get_by_platname("vcd_led", &dev);
+	if (!ret)
+		ret = regulator_set_enable(dev, true);
+	if (ret)
+		debug("Failed to enable backlight: ret=%d\n", ret);
+
+	/* T5 in the LCD timing spec (defined as > 10ms) */
+	mdelay(10);
+
+	/* board_dp_backlight_pwm */
+	gpio_direction_output(EXYNOS5_GPIO_B20, 1);
+
+	/* T6 in the LCD timing spec (defined as > 10ms) */
+	mdelay(10);
+
+	/* try to set the backlight in the bridge registers */
+	ret = board_dp_set_backlight(80);
+
+	/* if we have no bridge or it does not support backlight, use a GPIO */
+	if (ret == -ENODEV || ret == -ENOSYS) {
+		gpio_request(EXYNOS5_GPIO_X30, "board_dp_backlight_en");
+		gpio_direction_output(EXYNOS5_GPIO_X30, 1);
+	}
+}
+
+void exynos_lcd_power_on(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	debug("%s\n", __func__);
+	ret = regulator_get_by_platname("lcd_vdd", &dev);
+	if (!ret)
+		ret = regulator_set_enable(dev, true);
+	if (ret)
+		debug("Failed to enable LCD panel: ret=%d\n", ret);
+
+	ret = board_dp_bridge_setup(gd->fdt_blob);
+	if (ret && ret != -ENODEV)
+		printf("LCD bridge failed to enable: %d\n", ret);
+}
+
+#endif
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_SUPER,
+	.base = 0x12400000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
+		samsung_get_base_usb3_phy();
+
+	if (!phy) {
+		error("usb3 phy not supported");
+		return -ENODEV;
+	}
+
+	set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
+	exynos5_usb3_phy_init(phy);
+
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif
+#ifdef CONFIG_SET_DFU_ALT_INFO
+char *get_dfu_alt_system(char *interface, char *devstr)
+{
+	return getenv("dfu_alt_system");
+}
+
+char *get_dfu_alt_boot(char *interface, char *devstr)
+{
+	struct mmc *mmc;
+	char *alt_boot;
+	int dev_num;
+
+	dev_num = simple_strtoul(devstr, NULL, 10);
+
+	mmc = find_mmc_device(dev_num);
+	if (!mmc)
+		return NULL;
+
+	if (mmc_init(mmc))
+		return NULL;
+
+	if (IS_SD(mmc))
+		alt_boot = CONFIG_DFU_ALT_BOOT_SD;
+	else
+		alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
+
+	return alt_boot;
+}
+#endif
diff --git a/board/samsung/smdk5250/Kconfig b/board/samsung/smdk5250/Kconfig
index 698ee9125c..11ffaee5ce 100644
--- a/board/samsung/smdk5250/Kconfig
+++ b/board/samsung/smdk5250/Kconfig
@@ -23,3 +23,16 @@ config SYS_CONFIG_NAME
 	default "snow"
 
 endif
+
+if TARGET_SPRING
+
+config SYS_BOARD
+	default "smdk5250"
+
+config SYS_VENDOR
+	default "samsung"
+
+config SYS_CONFIG_NAME
+	default "spring"
+
+endif
diff --git a/board/samsung/smdk5250/MAINTAINERS b/board/samsung/smdk5250/MAINTAINERS
index 070593e266..cde966fdbf 100644
--- a/board/samsung/smdk5250/MAINTAINERS
+++ b/board/samsung/smdk5250/MAINTAINERS
@@ -10,3 +10,9 @@ M:	Akshay Saraswat <akshay.s@samsung.com>
 S:	Maintained
 F:	include/configs/snow.h
 F:	configs/snow_defconfig
+
+SPRING BOARD
+M:	Simon Glass <sjg@chromium.org>
+S:	Maintained
+F:	include/configs/spring.h
+F:	configs/spring_defconfig
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 3d96b077b4..501cab69e1 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -5,7 +5,3 @@
 #
 
 obj-y	+= smdk5250_spl.o
-
-ifndef CONFIG_SPL_BUILD
-obj-y	+= exynos5-dt.o
-endif
diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c
deleted file mode 100644
index 53ff7061d7..0000000000
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ /dev/null
@@ -1,306 +0,0 @@
-/*
- * Copyright (C) 2012 Samsung Electronics
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <fdtdec.h>
-#include <asm/io.h>
-#include <errno.h>
-#include <i2c.h>
-#include <netdev.h>
-#include <spi.h>
-#include <asm/gpio.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/dwmmc.h>
-#include <asm/arch/mmc.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/power.h>
-#include <asm/arch/sromc.h>
-#include <power/pmic.h>
-#include <power/max77686_pmic.h>
-#include <power/tps65090_pmic.h>
-#include <tmu.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_SOUND_MAX98095
-static void board_enable_audio_codec(void)
-{
-	/* Enable MAX98095 Codec */
-	gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
-	gpio_direction_output(EXYNOS5_GPIO_X17, 1);
-	gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
-}
-#endif
-
-int exynos_init(void)
-{
-#ifdef CONFIG_SOUND_MAX98095
-	board_enable_audio_codec();
-#endif
-	return 0;
-}
-
-#if defined(CONFIG_POWER)
-#ifdef CONFIG_POWER_MAX77686
-static int pmic_reg_update(struct pmic *p, int reg, uint regval)
-{
-	u32 val;
-	int ret = 0;
-
-	ret = pmic_reg_read(p, reg, &val);
-	if (ret) {
-		debug("%s: PMIC %d register read failed\n", __func__, reg);
-		return -1;
-	}
-	val |= regval;
-	ret = pmic_reg_write(p, reg, val);
-	if (ret) {
-		debug("%s: PMIC %d register write failed\n", __func__, reg);
-		return -1;
-	}
-	return 0;
-}
-
-static int max77686_init(void)
-{
-	struct pmic *p;
-
-	if (pmic_init(I2C_PMIC))
-		return -1;
-
-	p = pmic_get("MAX77686_PMIC");
-	if (!p)
-		return -ENODEV;
-
-	if (pmic_probe(p))
-		return -1;
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
-		return -1;
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
-			    MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
-		return -1;
-
-	/* VDD_MIF */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
-			   MAX77686_BUCK1OUT_1V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-		      MAX77686_REG_PMIC_BUCK1OUT);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
-			    MAX77686_BUCK1CTRL_EN))
-		return -1;
-
-	/* VDD_ARM */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
-			   MAX77686_BUCK2DVS1_1_3V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-		      MAX77686_REG_PMIC_BUCK2DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
-			    MAX77686_BUCK2CTRL_ON))
-		return -1;
-
-	/* VDD_INT */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
-			   MAX77686_BUCK3DVS1_1_0125V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-		      MAX77686_REG_PMIC_BUCK3DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
-			    MAX77686_BUCK3CTRL_ON))
-		return -1;
-
-	/* VDD_G3D */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
-			   MAX77686_BUCK4DVS1_1_2V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-		      MAX77686_REG_PMIC_BUCK4DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
-			    MAX77686_BUCK3CTRL_ON))
-		return -1;
-
-	/* VDD_LDO2 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
-			    MAX77686_LD02CTRL1_1_5V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO3 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
-			    MAX77686_LD03CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO5 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
-			    MAX77686_LD05CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO10 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
-			    MAX77686_LD10CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	return 0;
-}
-#endif	/* CONFIG_POWER_MAX77686 */
-
-int exynos_power_init(void)
-{
-	int ret = 0;
-
-#ifdef CONFIG_POWER_MAX77686
-	ret = max77686_init();
-	if (ret)
-		return ret;
-#endif
-#ifdef CONFIG_POWER_TPS65090
-	/*
-	 * The TPS65090 may not be in the device tree. If so, it is not
-	 * an error.
-	 */
-	ret = tps65090_init();
-	if (ret == 0 || ret == -ENODEV)
-		return 0;
-#endif
-
-	return ret;
-}
-#endif	/* CONFIG_POWER */
-
-#ifdef CONFIG_LCD
-static int board_dp_bridge_setup(void)
-{
-	const int max_tries = 10;
-	int num_tries, node;
-
-	/*
-	 * TODO(sjg): Use device tree for GPIOs when exynos GPIO
-	 * numbering patch is in mainline.
-	 */
-	debug("%s\n", __func__);
-	node = fdtdec_next_compatible(gd->fdt_blob, 0, COMPAT_NXP_PTN3460);
-	if (node < 0) {
-		debug("%s: No node for DP bridge in device tree\n", __func__);
-		return -ENODEV;
-	}
-
-	/* Setup the GPIOs */
-
-	/* PD is ACTIVE_LOW, and initially de-asserted */
-	gpio_request(EXYNOS5_GPIO_Y25, "dp_bridge_pd");
-	gpio_set_pull(EXYNOS5_GPIO_Y25, S5P_GPIO_PULL_NONE);
-	gpio_direction_output(EXYNOS5_GPIO_Y25, 1);
-
-	/* Reset is ACTIVE_LOW */
-	gpio_request(EXYNOS5_GPIO_X15, "dp_bridge_reset");
-	gpio_set_pull(EXYNOS5_GPIO_X15, S5P_GPIO_PULL_NONE);
-	gpio_direction_output(EXYNOS5_GPIO_X15, 0);
-
-	udelay(10);
-	gpio_set_value(EXYNOS5_GPIO_X15, 1);
-
-	gpio_request(EXYNOS5_GPIO_X07, "dp_bridge_hpd");
-	gpio_direction_input(EXYNOS5_GPIO_X07);
-
-	/*
-	 * We need to wait for 90ms after bringing up the bridge since there
-	 * is a phantom "high" on the HPD chip during its bootup.  The phantom
-	 * high comes within 7ms of de-asserting PD and persists for at least
-	 * 15ms.  The real high comes roughly 50ms after PD is de-asserted. The
-	 * phantom high makes it hard for us to know when the NXP chip is up.
-	 */
-	mdelay(90);
-
-	for (num_tries = 0; num_tries < max_tries; num_tries++) {
-		/* Check HPD.  If it's high, we're all good. */
-		if (gpio_get_value(EXYNOS5_GPIO_X07))
-				return 0;
-
-		debug("%s: eDP bridge failed to come up; try %d of %d\n",
-		      __func__, num_tries, max_tries);
-	}
-
-	/* Immediately go into bridge reset if the hp line is not high */
-	return -ENODEV;
-}
-
-void exynos_cfg_lcd_gpio(void)
-{
-	/* For Backlight */
-	gpio_request(EXYNOS5_GPIO_B20, "lcd_backlight");
-	gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_OUTPUT);
-	gpio_set_value(EXYNOS5_GPIO_B20, 1);
-
-	/* LCD power on */
-	gpio_request(EXYNOS5_GPIO_X15, "lcd_power");
-	gpio_cfg_pin(EXYNOS5_GPIO_X15, S5P_GPIO_OUTPUT);
-	gpio_set_value(EXYNOS5_GPIO_X15, 1);
-
-	/* Set Hotplug detect for DP */
-	gpio_cfg_pin(EXYNOS5_GPIO_X07, S5P_GPIO_FUNC(0x3));
-}
-
-void exynos_set_dp_phy(unsigned int onoff)
-{
-	set_dp_phy_ctrl(onoff);
-}
-
-void exynos_backlight_on(unsigned int on)
-{
-	debug("%s(%u)\n", __func__, on);
-
-	if (!on)
-		return;
-
-#ifdef CONFIG_POWER_TPS65090
-	int ret;
-
-	ret = tps65090_fet_enable(1); /* Enable FET1, backlight */
-	if (ret)
-		return;
-
-	/* T5 in the LCD timing spec (defined as > 10ms) */
-	mdelay(10);
-
-	/* board_dp_backlight_pwm */
-	gpio_direction_output(EXYNOS5_GPIO_B20, 1);
-
-	/* T6 in the LCD timing spec (defined as > 10ms) */
-	mdelay(10);
-
-	/* board_dp_backlight_en */
-	gpio_request(EXYNOS5_GPIO_X30, "board_dp_backlight_en");
-	gpio_direction_output(EXYNOS5_GPIO_X30, 1);
-#endif
-}
-
-void exynos_lcd_power_on(void)
-{
-	int ret;
-
-	debug("%s\n", __func__);
-
-#ifdef CONFIG_POWER_TPS65090
-	/* board_dp_lcd_vdd */
-	tps65090_fet_enable(6); /* Enable FET6, lcd panel */
-#endif
-
-	ret = board_dp_bridge_setup();
-	if (ret && ret != -ENODEV)
-		printf("LCD bridge failed to enable: %d\n", ret);
-}
-
-#endif
diff --git a/board/samsung/smdk5420/Makefile b/board/samsung/smdk5420/Makefile
index c2f8886c99..96a400aacb 100644
--- a/board/samsung/smdk5420/Makefile
+++ b/board/samsung/smdk5420/Makefile
@@ -5,7 +5,3 @@
 #
 
 obj-y	+= smdk5420_spl.o
-
-ifndef CONFIG_SPL_BUILD
-obj-y	+= smdk5420.o
-endif
diff --git a/board/samsung/smdk5420/smdk5420.c b/board/samsung/smdk5420/smdk5420.c
deleted file mode 100644
index 88f4044d63..0000000000
--- a/board/samsung/smdk5420/smdk5420.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * Copyright (C) 2013 Samsung Electronics
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <fdtdec.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/board.h>
-#include <asm/arch/power.h>
-#include <asm/arch/system.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/dp_info.h>
-#include <asm/arch/xhci-exynos.h>
-#include <power/tps65090_pmic.h>
-#include <i2c.h>
-#include <lcd.h>
-#include <mmc.h>
-#include <parade.h>
-#include <spi.h>
-#include <usb.h>
-#include <dwc3-uboot.h>
-#include <samsung-usb-phy-uboot.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int exynos_init(void)
-{
-	return 0;
-}
-
-#ifdef CONFIG_LCD
-static int has_edp_bridge(void)
-{
-	int node;
-
-	node = fdtdec_next_compatible(gd->fdt_blob, 0, COMPAT_PARADE_PS8625);
-
-	/* No node for bridge in device tree. */
-	if (node <= 0)
-		return 0;
-
-	/* Default is with bridge ic */
-	return 1;
-}
-
-void exynos_lcd_power_on(void)
-{
-	int ret;
-
-#ifdef CONFIG_POWER_TPS65090
-	ret = tps65090_init();
-	if (ret < 0) {
-		printf("%s: tps65090_init() failed\n", __func__);
-		return;
-	}
-
-	tps65090_fet_enable(6);
-#endif
-
-	mdelay(5);
-
-	if (has_edp_bridge())
-		if (parade_init(gd->fdt_blob))
-			printf("%s: ps8625_init() failed\n", __func__);
-}
-
-void exynos_backlight_on(unsigned int onoff)
-{
-#ifdef CONFIG_POWER_TPS65090
-	tps65090_fet_enable(1);
-#endif
-}
-#endif
-
-int board_get_revision(void)
-{
-	return 0;
-}
-
-#ifdef CONFIG_USB_DWC3
-static struct dwc3_device dwc3_device_data = {
-	.maximum_speed = USB_SPEED_SUPER,
-	.base = 0x12400000,
-	.dr_mode = USB_DR_MODE_PERIPHERAL,
-	.index = 0,
-};
-
-int usb_gadget_handle_interrupts(void)
-{
-	dwc3_uboot_handle_interrupt(0);
-	return 0;
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
-		samsung_get_base_usb3_phy();
-
-	if (!phy) {
-		error("usb3 phy not supported");
-		return -ENODEV;
-	}
-
-	set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
-	exynos5_usb3_phy_init(phy);
-
-	return dwc3_uboot_init(&dwc3_device_data);
-}
-#endif
-#ifdef CONFIG_SET_DFU_ALT_INFO
-char *get_dfu_alt_system(char *interface, char *devstr)
-{
-	return getenv("dfu_alt_system");
-}
-
-char *get_dfu_alt_boot(char *interface, char *devstr)
-{
-	struct mmc *mmc;
-	char *alt_boot;
-	int dev_num;
-
-	dev_num = simple_strtoul(devstr, NULL, 10);
-
-	mmc = find_mmc_device(dev_num);
-	if (!mmc)
-		return NULL;
-
-	if (mmc_init(mmc))
-		return NULL;
-
-	if (IS_SD(mmc))
-		alt_boot = CONFIG_DFU_ALT_BOOT_SD;
-	else
-		alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
-
-	return alt_boot;
-}
-#endif