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| author | Tom Rini <trini@konsulko.com> | 2015-08-08 20:20:17 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-08 20:20:17 -0400 |
| commit | 15f8876b1dd95dd6bcee686ada36369871bbcdc9 (patch) | |
| tree | 8695ca6182a99fea5a4f79ab67e9ec5b015069ac /board | |
| parent | bd48c0617b5c7212e5bf22169e716da878842da4 (diff) | |
| parent | 39920c81ce4431b7ea08f5e80feb5ec8b156864e (diff) | |
| download | talos-obmc-uboot-15f8876b1dd95dd6bcee686ada36369871bbcdc9.tar.gz talos-obmc-uboot-15f8876b1dd95dd6bcee686ada36369871bbcdc9.zip | |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
Diffstat (limited to 'board')
| -rw-r--r-- | board/sunxi/Kconfig | 7 | ||||
| -rw-r--r-- | board/sunxi/board.c | 27 |
2 files changed, 34 insertions, 0 deletions
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index c4b5a855a5..13f453733f 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -410,6 +410,13 @@ config VIDEO_VGA_EXTERNAL_DAC_EN Set the enable pin for the external VGA DAC. This takes a string in the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. +config VIDEO_COMPOSITE + boolean "Composite video output support" + depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) + default n + ---help--- + Say Y here to add support for outputting composite video. + config VIDEO_LCD_MODE string "LCD panel timing details" depends on VIDEO diff --git a/board/sunxi/board.c b/board/sunxi/board.c index afed6a31ca..f85e825891 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -107,6 +107,28 @@ int dram_init(void) return 0; } +#if defined(CONFIG_SPL_NAND_SUNXI) && defined(CONFIG_SPL_BUILD) +static void nand_pinmux_setup(void) +{ + unsigned int pin; + for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(6); pin++) + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_NAND); + + for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(22); pin++) + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_NAND); + + sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_NAND); +} + +static void nand_clock_setup(void) +{ + struct sunxi_ccm_reg *const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); + setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); +} +#endif + #ifdef CONFIG_GENERIC_MMC static void mmc_pinmux_setup(int sdc) { @@ -431,6 +453,11 @@ void sunxi_board_init(void) power_failed |= axp221_set_eldo(3, CONFIG_AXP221_ELDO3_VOLT); #endif +#ifdef CONFIG_SPL_NAND_SUNXI + nand_pinmux_setup(); + nand_clock_setup(); +#endif + printf("DRAM:"); ramsize = sunxi_dram_init(); printf(" %lu MiB\n", ramsize >> 20); |
